Martin Brox

11 papers Journal 3Unranked 8
YearRankTypeTitle / Venue / Authors
2022 J jnl
An 8-Gb GDDR6X DRAM Achieving 22 Gb/s/pin With Single-Ended PAM-4 Signaling.
IEEE J. Solid State Circuits
Timothy M. Hollis, Ronny Schneider, Martin Brox, Thomas Hein, Wolfgang Spirkl, Martin Bach, Mani Balakrishnan, Stefan Dietrich, Fabien Funfrock, Milena Ivanov, Natalija Jovanovic, Maksim Kuzmenka, Daniel Lauber, Juan Ocon Garrido, David Ovard, Karl Pfefferl, Sven Piatkowski, Gabriele Piscopo, Manfred Plan, Jens Polney, Jan Pottgiesser, Stephan Rau, Filippo Vitale, Marc Walter, Marcos Alvarez Gonzalez, Cristian Chetreanu, Andrea Sorrentino, Jörg Weller, Peter Mayer, Michael Richter, Casto Salobrena Garcia, Andreas Schneider, Shih Nern Wong
2021 — conf
25.3 An 8Gb GDDR6X DRAM Achieving 22Gb/s/pin with Single-Ended PAM4 Signaling.
ISSCC
Timothy M. Hollis, Ronny Schneider, Martin Brox, Thomas Hein, Wolfgang Spirkl, Martin Bach, Mani Balakrishnan, Stefan Dietrich, Fabien Funfrock, Milena Ivanov, Natalija Jovanovic, Maksim Kuzmenka, Daniel Lauber, Juan Ocon Garrido, David Ovard, Karl Pfefferl, Sven Piatkowski, Gabriele Piscopo, Manfred Plan, Jens Polney, Jan Pottgiesser, Stephan Rau, Filippo Vitale, Marc Walter, Marcos Alvarez Gonzalez, Martin Broschwitz, Cristian Chetreanu, Andrea Sorrentino, Jörg Weller, Peter Mayer, Michael Richter, Casto Salobrena Garcia, Andreas Schneider, Shih Nern Wong
2018 J jnl
An 8-Gb 12-Gb/s/pin GDDR5X DRAM for Cost-Effective High-Performance Applications.
IEEE J. Solid State Circuits
Martin Brox, Mani Balakrishnan, Martin Broschwitz, Cristian Chetreanu, Stefan Dietrich, Fabien Funfrock, Marcos Alvarez Gonzalez, Thomas Hein, Eugen Huber, Daniel Lauber, Milena Ivanov, Maksim Kuzmenka, Chris Mohr, Juan Ocon Garrido, Swetha Padaraju, Sven Piatkowski, Jan Pottgiesser, Peter Pfefferl, Manfred Plan, Jens Polney, Stephan Rau, Michael Richter, Ronny Schneider, Ralf Oliver Seitter, Wolfgang Spirkl, Marc Walter, Jörg Weller, Filippo Vitale
2017 — conf
23.1 An 8Gb 12Gb/s/pin GDDR5X DRAM for cost-effective high-performance applications.
ISSCC
Martin Brox, Mani Balakrishnan, Martin Broschwitz, Cristian Chetreanu, Stefan Dietrich, Fabien Funfrock, Marcos Alvarez Gonzalez, Thomas Hein, Eugen Huber, Daniel Lauber, Milena Ivanov, Maksim Kuzmenka, Chris Mohr, Francisco Emiliano Munoz, Juan Ocon Garrido, Swetha Padaraju, Sven Piatkowski, Jan Pottgiesser, Peter Pfefferl, Manfred Plan, Jens Polney, Stefan Rau, Michael Richter, Ronny Schneider, Ralf Oliver Seitter, Wolfgang Spirkl, Marc Walter, Jörg Weller, Filippo Vitale
2017 — conf
EE5: When will we stop driving our cars?
ISSCC
Martin Brox, Jonathan Chang, Howard C. Luong, Paul Liang, Riccardo Mariani
2016 — conf
F4: Emerging short-reach and high-density interconnect solutions for internet of everything.
ISSCC
Ichiro Fujimori, Martin Brox, Elad Alon, Pavan Kumar Hanumolu, Gerrit den Besten, Hideyuki Nosaka
2016 — conf
Session 18 overview: High-bandwidth DRAM.
ISSCC
Chulwoo Kim, Martin Brox
2010 J jnl
A 75 nm 7 Gb/s/pin 1 Gb GDDR5 Graphics Memory Device With Bandwidth Improvement Techniques.
IEEE J. Solid State Circuits
Rex Kho, David Boursin, Martin Brox, Peter Gregorius, Heinz Hoenigschmid, Bianka Kho, Sabine Kieser, Daniel Kehrer, Maksim Kuzmenka, Udo Moeller, Pavel Veselinov Petkov, Manfred Plan, Michael Richter, Ian Russell, Kai Schiller, Ronny Schneider, Kartik Swaminathan, Bradley Weber, Julien Weber, Ingo Bormann, Fabien Funfrock, Mario Gjukic, Wolfgang Spirkl, Holger Steffens, Jörg Weller, Thomas Hein
2009 — conf
75nm 7Gb/s/pin 1Gb GDDR5 graphics memory device with bandwidth-improvement techniques.
ISSCC
Rex Kho, David Boursin, Martin Brox, Peter Gregorius, Heinz Hoenigschmid, Bianka Kho, Sabine Kieser, Daniel Kehrer, Maksim Kuzmenka, Udo Moeller, Pavel Veselinov Petkov, Manfred Plan, Michael Richter, Ian Russell, Kai Schiller, Ronny Schneider, Kartik Swaminathan, Bradley Weber, Julien Weber, Ingo Bormann, Fabien Funfrock, Mario Gjukic, Wolfgang Spirkl, Holger Steffens, Jörg Weller, Thomas Hein
2007 — conf
DRAM and eRAM.
ISSCC
Martin Brox, Kazuhiko Kajigaya
2006 — conf
A 2Gb/s/pin 512Mb Graphics DRAM with NoiseReduction Techniques.
ISSCC
Martin Brox, H. Fibranz, Maksim Kuzmenka, F. Lu, S. Mann, M. Markert, U. Möller, Manfred Plan, Kai Schiller, P. Schmölz, P. Schrögmeier, A. Täuber, Bradley Weber, Peter Mayer, Wolfgang Spirkl, Holger Steffens, Jörg Weller