Marta Andronic

17 papers A* 1A 2B 1Misc 2Journal 9Unranked 2

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	Bit-Serial Acceleration of LLM Inference With Mixture-of-Datatype Quantization. IEEE Trans. Computers Yuzong Chen, Chi-Chih Chang, Xilai Dai, Ahmed F. AbouElhamayed, Marta Andronic, George A. Constantinides, Mohamed S. Abdelfattah
2025	A*	`conf`	BitMoD: Bit-serial Mixture-of-Datatype LLM Acceleration. HPCA Yuzong Chen, Ahmed F. AbouElhamayed, Xilai Dai, Yang Wang, Marta Andronic, George A. Constantinides, Mohamed S. Abdelfattah
2025	A	`conf`	Greater than the Sum of its LUTs: Scaling Up LUT-based Neural Networks with AmigoLUT. FPGA Olivia Weng, Marta Andronic, Danial Zuberi, Jiaqing Chen, Caleb Geniesse, George A. Constantinides, Nhan Tran, Nicholas J. Fraser, Javier Mauricio Duarte, Ryan Kastner
2025	Misc	`conf`	NeuraLUT-Assemble: Hardware-Aware Assembling of Sub-Neural Networks for Efficient LUT Inference. FCCM Marta Andronic, George A. Constantinides
2025	J	`jnl`	NeuraLUT-Assemble: Hardware-aware Assembling of Sub-Neural Networks for Efficient LUT Inference. CoRR Marta Andronic, George A. Constantinides
2025	Misc	`conf`	Ph.D. Project Hardware-Aware Neural Networks. FCCM Marta Andronic, George A. Constantinides
2025	J	`jnl`	PolyLUT: Ultra-Low Latency Polynomial Inference With Hardware-Aware Structured Pruning. IEEE Trans. Computers Marta Andronic, Jiawen Li, George A. Constantinides
2025	J	`jnl`	PolyLUT: Ultra-low Latency Polynomial Inference with Hardware-Aware Structured Pruning. CoRR Marta Andronic, Jiawen Li, George A. Constantinides
2025	A	`conf`	ReducedLUT: Table Decomposition with "Don't Care" Conditions. FPGA Oliver Cassidy, Marta Andronic, Samuel Coward, George A. Constantinides
2025	—	`conf`	Training with Fewer Bits: Unlocking Edge LLMs Training with Stochastic Rounding. EMNLP (Findings) Taowen Liu, Marta Andronic, Deniz Gündüz, George Anthony Constantinides
2025	J	`jnl`	Training with Fewer Bits: Unlocking Edge LLMs Training with Stochastic Rounding. CoRR Taowen Liu, Marta Andronic, Deniz Gündüz, George A. Constantinides
2024	J	`jnl`	BitMoD: Bit-serial Mixture-of-Datatype LLM Acceleration. CoRR Yuzong Chen, Ahmed F. AbouElhamayed, Xilai Dai, Yang Wang, Marta Andronic, George A. Constantinides, Mohamed S. Abdelfattah
2024	B	`conf`	NeuraLUT: Hiding Neural Network Density in Boolean Synthesizable Functions. FPL Marta Andronic, George A. Constantinides
2024	J	`jnl`	NeuraLUT: Hiding Neural Network Density in Boolean Synthesizable Functions. CoRR Marta Andronic, George A. Constantinides
2024	J	`jnl`	ReducedLUT: Table Decomposition with "Don't Care" Conditions. CoRR Oliver Cassidy, Marta Andronic, Samuel Coward, George A. Constantinides
2023	—	`conf`	PolyLUT: Learning Piecewise Polynomials for Ultra-Low Latency FPGA LUT-based Inference. ICFPT Marta Andronic, George A. Constantinides
2023	J	`jnl`	PolyLUT: Learning Piecewise Polynomials for Ultra-Low Latency FPGA LUT-based Inference. CoRR Marta Andronic, George A. Constantinides