Markus Olbrich

46 papers A* 2A 7B 1C 12Misc 1Journal 2Unranked 20

Year	Rank	Type	Title / Venue / Authors
2025	A	`conf`	Formally Verifying Analog Neural Networks with Device Mismatch Variations. DATE Yasmine Abu-Haeyeh, Thomas Bartelsmeier, Tobias Ladner, Matthias Althoff, Lars Hedrich, Markus Olbrich
2020	—	`conf`	Automated Model Generation Including Variations for Formal Verification of Nonlinear Analog Circuits. NEWCAS Malgorzata Rechmal-Lesse, Gerald Alexander Koroa, Yeremia Gunawan Adhisantoso, Markus Olbrich
2020	C	`conf`	Automatically Generated Nonlinear Analog Circuit Models Enclosing Variations with Intervals and Affine Forms for Reachability Analysis. DDECS Malgorzata Rechmal-Lesse, Gerald Alexander Koroa, Yeremia Gunawan Adhisantoso, Markus Olbrich
2020	—	`conf`	Equivalence Checking Methods for Analog Circuits Using Continuous Reachable Sets. ISVLSI Ahmad Tarraf, Lars Hedrich, Niklas Kochdumper, Malgorzata Rechmal-Lesse, Markus Olbrich
2020	—	`conf`	Establishing Reachset Conformance for the Formal Analysis of Analog Circuits. ASP-DAC Niklas Kochdumper, Ahmad Tarraf, Malgorzata Rechmal, Markus Olbrich, Lars Hedrich, Matthias Althoff
2020	—	`conf`	Extended Probability Distribution Arithmetic. ICECOCS Markus Olbrich
2019	A*	`conf`	Enabling Complex Stimuli in Accelerated Mixed-Signal Simulation. DAC Sara Divanbeigi, Evan Aditya, Zhongpin Wang, Markus Olbrich
2019	J	`jnl`	Hierarchical Verification of AMS Systems With Affine Arithmetic Decision Diagrams. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Carna Zivkovic, Christoph Grimm, Markus Olbrich, Oliver Scharf, Erich Barke
2018	C	`conf`	Modeling and Accelerated Mixed-Signal Simulation of a Control System. DDECS Sara Divanbeigi, Felix Winkler, Martin Bergen, Markus Olbrich
2018	C	`conf`	STP - A Quadratic VLSI Placement Tool Using Graphic Processing Units. ISPDC Bjorn Bredthauer, Markus Olbrich, Erich Barke
2017	C	`conf`	Novel metrics for Analog Mixed-Signal coverage. DDECS Andreas Furtig, Georg Glaeser, Christoph Grimm, Lars Hedrich, Stefan Heinen, Hyun-Sek Lukas Lee, Gregor Nitsche, Markus Olbrich, Carna Radojicic, Fabian Speicher
2016	A	`conf`	Embedded tutorial: Analog-/mixed-signal verification methods for AMS coverage analysis. DATE Erich Barke, Andreas Furtig, Georg Glaeser, Christoph Grimm, Lars Hedrich, Stefan Heinen, Eckhard Hennig, Hyun-Sek Lukas Lee, Wolfgang Nebel, Gregor Nitsche, Markus Olbrich, Carna Radojicic, Fabian Speicher
2015	—	`conf`	Automated generation of hybrid system models for reachability analysis of nonlinear analog circuits. ASP-DAC Hyun-Sek Lukas Lee, Matthias Althoff, Stefan Hoelldampf, Markus Olbrich, Erich Barke
2015	C	`conf`	Fast global interconnnect driven 3D floorplanning. VLSI-SoC Artur Quiring, Markus Olbrich, Erich Barke
2015	—	`conf`	Split and merge strategies for solving uncertain equations using affine arithmetic. SimuTools Oliver Scharf, Markus Olbrich, Erich Barke
2014	A	`conf`	Application of Mission Profiles to enable cross-domain constraint-driven design. DATE C. Katzschke, M.-P. Sohn, Markus Olbrich, Volker Meyer zu Bexten, Markus Tristl, Erich Barke
2014	J	`jnl`	Robustness measurement of integrated circuits and its adaptation to aging effects. Microelectron. Reliab. Martin Barke, Michael Kärgel, Markus Olbrich, Ulf Schlichtmann
2014	—	`conf`	Simulation Based Verification with Range Based Signal Representations for Mixed-Signal Systems. SBCCI Michael Kärgel, Markus Olbrich, Erich Barke
2013	—	`conf`	Improving 3D-Floorplanning using smart selection operations in meta-heuristic optimization. 3DIC Artur Quiring, Markus Olbrich, Erich Barke
2012	—	`conf`	Efficient generation of analog circuit models for accelerated mixed-signal simulation. SoCC Stefan Hoelldampf, Hyun-Sek Lukas Lee, Daniel Zaum, Markus Olbrich, Erich Barke
2011	—	`conf`	3D floorplanning considering vertically aligned rectilinear modules using T 3DIC Artur Quiring, Marc Lindenberg, Markus Olbrich, Erich Barke
2011	Misc	`conf`	A Statistical Learning Based Modeling Approach and Its Application in Leakage Library Characterization. VLSI Design Min Zhang, R. Häußler, Markus Olbrich, Harald Kinzelbach, Erich Barke
2011	—	`conf`	A gate sizing method for glitch power reduction. SoCC Lei Wang, Markus Olbrich, Erich Barke, Thomas Büchner, Markus Bühler, Philipp V. Panitz
2011	A	`conf`	A theoretical probabilistic simulation framework for dynamic power estimation. ICCAD Lei Wang, Markus Olbrich, Erich Barke, Thomas Büchner, Markus Bühler, Philipp V. Panitz
2011	C	`conf`	Using analog circuit behavior to generate SystemC events for an acceleration of mixed-signal simulation. ICCD Stefan Hoelldampf, Daniel Zaum, Markus Olbrich, Erich Barke
2010	C	`conf`	An Accelerated Mixed-Signal Simulation Kernel for SystemC. FDL Daniel Zaum, Stefan Hoelldampf, Markus Olbrich, Erich Barke, Ingmar Neumann
2010	C	`conf`	Towards Abstract Analysis Techniques for Range Based System Simulations. FDL Florian Schupfer, Christoph Grimm, Markus Olbrich, Michael Kärgel, Erich Barke
2009	—	`conf`	Fast dynamic power estimation considering glitch filtering. SoCC Lei Wang, Markus Olbrich, Erich Barke, Thomas Büchner, Markus Bühler
2009	—	`conf`	The PRAISE approach for accelerated transient analysis applied to wire models. BMAS Daniel Zaum, Stefan Hoelldampf, Markus Olbrich, Erich Barke, Ingmar Neumann, Sebastian Schmidt
2008	C	`conf`	A Trapezoidal Approach to Corner Stitching Data Structures for Arbitrary Routing Angles. DDECS Thomas Jambor, Daniel Zaum, Markus Olbrich, Erich Barke
2008	—	`conf`	Analog circuit simulation using range arithmetics. ASP-DAC Darius Grabowski, Markus Olbrich, Erich Barke
2008	—	`conf`	Considering possible opens in non-tree topology wire delay calculation. ACM Great Lakes Symposium on VLSI Philipp V. Panitz, Markus Olbrich, Erich Barke, Markus Bühler, Jürgen Koehl
2008	—	`conf`	Distribution arithmetic for stochastical analysis. ASP-DAC Markus Olbrich, Erich Barke
2008	C	`conf`	Methodologies for High-Level Modelling and Evaluation in the Automotive Domain (invited). FDL Stefan Hoelldampf, Daniel Zaum, Markus Olbrich, Erich Barke, Ingmar Neumann, Sebastian Schmidt
2007	A	`conf`	CMCal: an accurate analytical approach for the analysis of process variations with non-gaussian parameters and nonlinear functions. DATE Min Zhang, Markus Olbrich, David Seider, Martin Frerichs, Harald Kinzelbach, Erich Barke
2007	A*	`conf`	Efficient Modeling Techniques for Dynamic Voltage Drop Analysis. DAC Hedi Harizi, Robert HauBler, Markus Olbrich, Erich Barke
2007	C	`conf`	Range Arithmetics to Speed up Reachability Analysis of Analog Systems. FDL Darius Grabowski, Markus Olbrich, Christoph Grimm, Erich Barke
2007	—	`conf`	Robust wiring networks for DfY considering timing constraints. ACM Great Lakes Symposium on VLSI Philipp V. Panitz, Markus Olbrich, Erich Barke, Jürgen Koehl
2005	—	`conf`	Routing of analog busses with parasitic symmetry. ISPD Lars A. Schreiner, Markus Olbrich, Erich Barke, Volker Meyer zu Bexten
2004	A	`conf`	Placement Using a Localization Probability Model (LPM). DATE Markus Olbrich, Erich Barke
2004	—	`conf`	Wirelength Reduction Using 3-D Physical Design. PATMOS Idris Kaya, Silke Salewski, Markus Olbrich, Erich Barke
2003	—	`conf`	Placing substrate contacts into mixed-signal circuits controlling circuit performance. CICC Andreas Hermann, Markus Olbrich, Erich Barke
2003	C	`conf`	Substrate Modeling and Noise Reduction in Mixed-Signal Circuits. VLSI-SOC Andreas Hermann, Markus Olbrich, Erich Barke
2001	A	`conf`	An improved hierarchical classification algorithm for structural analysis of integrated circuits. DATE Markus Olbrich, Achim Rein, Erich Barke
1998	B	`conf`	An Optimized Design Flow for Fast FPGA-Based Rapid Prototyping. FPL Jörn Stohmann, Klaus Harbich, Markus Olbrich, Erich Barke
1998	—	`—`	Relationenorientiertes Modellieren mit Objekten in der Bauinformatik. Markus Olbrich