Mark Zwolinski

136 papers A* 1A 10B 5C 17Misc 5Journal 44Unranked 53

Year	Rank	Type	Title / Venue / Authors
2025	—	`conf`	Design of a Retentive and Single-Event Upset Tolerant TSPC Flip-Flop. ICECS Ahmet Cirakoglu, Alexander Serb, Khaled Humood, Mark Zwolinski, Themis Prodromakis
2025	C	`conf`	Design of a Single-Event Upset Tolerant Low-Power Double-Tail Comparator. ISCAS Ahmet Cirakoglu, Alexander Serb, Khaled Humood, Mark Zwolinski, Themis Prodromakis
2025	—	`conf`	Enabling Efficient Pure-NMOS Circuits Through Adiabatic Complementary Pass-Transistor Logic. NewCAS Keyu Chen, Geoff V. Merrett, Mark Zwolinski
2025	Misc	`conf`	Miti-CAT: Mitigating Power Side-Channel Vulnerabilities in FPGA-Based CNN Accelerators Through Distributed Convolution Computation. CSR Jing He, Mark Zwolinski
2024	—	`conf`	Investigation of Single-Event Upsets in Radiation Hardened RRAM Memory Cells. NewCAS Ahmet Cirakoglu, Alexander Serb, Mark Zwolinski, Themis Prodromakis
2024	J	`jnl`	SEA Cache: A Performance-Efficient Countermeasure for Contention-based Attacks. CoRR Xiao Liu, Mark Zwolinski, Basel Halak
2024	J	`jnl`	Using Formal Verification to Evaluate Single Event Upsets in a RISC-V Core. CoRR Bing Xue, Mark Zwolinski
2022	—	`conf`	Mitigating Cache Contention-Based Attacks by Logical Associativity. PRIME Xiao Liu, Mark Zwolinski
2022	—	`conf`	Session details: Session 4A: Testing, Reliability and Fault Tolerance. ACM Great Lakes Symposium on VLSI Mark Zwolinski
2022	—	`conf`	Using Formal Methods to Evaluate Hardware Reliability in the Presence of Soft Errors. PRIME Bing Xue, Mark Zwolinski
2021	J	`jnl`	A Survey on the Susceptibility of PUFs to Invasive, Semi-Invasive and Noninvasive Attacks: Challenges and Opportunities for Future Directions. J. Circuits Syst. Comput. Mohd Syafiq Mispan, Basel Halak, Mark Zwolinski
2021	J	`jnl`	Learning-based BTI stress estimation and mitigation in multi-core processor systems. Microprocess. Microsystems Haider Muhi Abbas, Basel Halak, Mark Zwolinski
2019	J	`jnl`	A reliable PUF in a dual function SRAM. Integr. Mohd Syafiq Mispan, Shengyu Duan, Basel Halak, Mark Zwolinski
2019	J	`jnl`	Editorial TVLSI Positioning - Continuing and Accelerating an Upward Trajectory. IEEE Trans. Very Large Scale Integr. Syst. Massimo Alioto, Magdy S. Abadir, Tughrul Arslan, Chirn Chye Boon, Andreas Burg, Chip-Hong Chang, Meng-Fan Chang, Yao-Wen Chang, Poki Chen, Pasquale Corsonello, Paolo Crovetti, Shiro Dosho, Rolf Drechsler, Ibrahim Abe M. Elfadel, Ruonan Han, Masanori Hashimoto, Chun-Huat Heng, Deukhyoun Heo, Tsung-Yi Ho, Houman Homayoun, Yuh-Shyan Hwang, Ajay Joshi, Rajiv V. Joshi, Tanay Karnik, Chulwoo Kim, Tony Tae-Hyoung Kim, Jaydeep P. Kulkarni, Volkan Kursun, Yoonmyung Lee, Hai Helen Li, Huawei Li, Prabhat Mishra, Baker Mohammad, Mehran Mozaffari Kermani, Makoto Nagata, Koji Nii, Partha Pratim Pande, Bipul C. Paul, Vasilis F. Pavlidis, José Pineda de Gyvez, Ioannis Savidis, Patrick Schaumont, Fabio Sebastiano, Anirban Sengupta, Mingoo Seok, Mircea R. Stan, Mark Tehranipoor, Aida Todri-Sanial, Marian Verhelst, Valerio Vignoli, Xiaoqing Wen, Jiang Xu, Wei Zhang, Zhengya Zhang, Jun Zhou, Mark Zwolinski, Stacey Weber
2019	—	`conf`	Two-Stage Architectures for Resilient Lightweight PUFs. IVSW Haibo Su, Basel Halak, Mark Zwolinski
2019	—	`conf`	Using Hardware Performance Counters to Detect Control Hijacking Attacks. IVSW Miao Yu, Basel Halak, Mark Zwolinski
2019	J	`jnl`	VLSI Implementation of a Fully-Pipelined K-Best MIMO Detector with Successive Interference Cancellation. Circuits Syst. Signal Process. Ibrahim A. Bello, Basel Halak, Mohammed El-Hajjar, Mark Zwolinski
2018	—	`conf`	A Machine Learning Attacks Resistant Two Stage Physical Unclonable Functions Design. IVSW Haibo Su, Mark Zwolinski, Basel Halak
2018	—	`conf`	A Power Efficient Crossbar Arbitration in Multi-NoC for Multicast and Broadcast Traffic. iSES Sonal Yadav, Vijay Laxmi, Hemangee K. Kapoor, Manoj Singh Gaur, Mark Zwolinski
2018	—	`conf`	A Reliable PUF in a Dual Function SRAM. PATMOS Mohd Syafiq Mispan, Shengyu Duan, Basel Halak, Mark Zwolinski
2018	—	`conf`	Cell Flipping with Distributed Refresh for Cache Ageing Minimization. ATS Shengyu Duan, Basel Halak, Mark Zwolinski
2018	A	`conf`	Cost-efficient design for modeling attacks resistant PUFs. DATE Mohd Syafiq Mispan, Haibo Su, Mark Zwolinski, Basel Halak
2018	A	`conf`	Early detection of system-level anomalous behaviour using hardware performance counters. DATE Lai Leng Woo, Mark Zwolinski, Basel Halak
2018	—	`conf`	Hardware Implementation of a Low-Power K-Best MIMO Detector Based on a Hybrid Merge Network. PATMOS Ibrahim A. Bello, Basel Halak, Mohammed El-Hajjar, Mark Zwolinski
2018	J	`jnl`	Lifetime Reliability-Aware Digital Synthesis. IEEE Trans. Very Large Scale Integr. Syst. Shengyu Duan, Mark Zwolinski, Basel Halak
2018	J	`jnl`	Multi-Path Aging Sensor for Cost-Efficient Delay Fault Prediction. IEEE Trans. Circuits Syst. II Express Briefs Gaole Sai, Basel Halak, Mark Zwolinski
2017	C	`conf`	A cost-efficient delay-fault monitor. ISCAS Gaole Sai, Basel Halak, Mark Zwolinski
2017	—	`conf`	An ageing-aware digital synthesis approach. SMACD Shengyu Duan, Basel Halak, Mark Zwolinski
2017	J	`jnl`	BTI mitigation by anti-ageing software patterns. Microelectron. Reliab. Haider Muhi Abbas, Basel Halak, Mark Zwolinski
2017	—	`conf`	Fault Analysis in Analog Circuits Through Language Manipulation and Abstraction. FDL (Selected Papers) Enrico Fraccaroli, Francesco Stefanni, Franco Fummi, Mark Zwolinski
2017	C	`conf`	Fault analysis in analog circuits through language manipulation and abstraction. FDL Enrico Fraccaroli, Francesco Stefanni, Franco Fummi, Mark Zwolinski
2017	—	`conf`	Hardware performance counters for system reliability monitoring. IVSW Elena Lai Leng Woo, Mark Zwolinski, Basel Halak
2017	—	`conf`	Lightweight obfuscation techniques for modeling attacks resistant PUFs. IVSW Mohd Syafiq Mispan, Basel Halak, Mark Zwolinski
2016	J	`jnl`	A Low-Cost, Radiation-Hardened Method for Pipeline Protection in Microprocessors. IEEE Trans. Very Large Scale Integr. Syst. Yang Lin, Mark Zwolinski, Basel Halak
2016	J	`jnl`	A Survey of VLSI Implementations of Tree Search Algorithms for MIMO Detection. Circuits Syst. Signal Process. Ibrahim A. Bello, Basel Halak, Mohammed El-Hajjar, Mark Zwolinski
2016	—	`conf`	Ageing Impact on a High Speed Voltage Comparator with Hysteresis. ERMAVSS@DATE Illani Mohd Nawi, Basel Halak, Mark Zwolinski
2016	J	`jnl`	Guest Editorial. IET Comput. Digit. Tech. Mark Zwolinski, Manoj Singh Gaur, Vijay Laxmi, Usha Sandeep Mehta
2016	B	`conf`	High accuracy implementation of Adaptive Exponential integrated and fire neuron model. IJCNN Aliasghar Makhlooghpour, Hamid Soleimani, Arash Ahmadi, Mark Zwolinski, Mehrdad Saif
2016	J	`jnl`	IEEE Access Special Section Editorial: Security and Reliability Aware System Design for Mobile Computing Devices. IEEE Access Anirban Sengupta, Saraju P. Mohanty, Fabrizio Lombardi, Mark Zwolinski
2016	—	`conf`	NBTI Lifetime Evaluation and Extension in Instruction Caches. ERMAVSS@DATE Shengyu Duan, Basel Halak, Rick Wong, Mark Zwolinski
2016	C	`conf`	NBTI aging evaluation of PUF-based differential architectures. IOLTS Mohd Syafiq Mispan, Basel Halak, Mark Zwolinski
2016	—	`conf`	Overview of PUF-based hardware security solutions for the internet of things. MWSCAS Basel Halak, Mark Zwolinski, Mohd Syafiq Mispan
2016	J	`jnl`	Resilient routing implementation in 2D mesh NoC. Microelectron. Reliab. Rimpy Bishnoi, Vijay Laxmi, Manoj Singh Gaur, Mark Zwolinski
2016	—	`conf`	Static Aging Analysis Using 3-Dimensional Delay Library. ERMAVSS@DATE Haider Abbas, Mark Zwolinski, Basel Halak
2016	—	`conf`	The European Masters in Embedded Computing Systems (EMECS). EWME Mark Zwolinski, Wolfgang Kunz, Kjetil Svarstad, Andrew D. Brown
2016	B	`conf`	The influence of hysteresis voltage on single event transients in a 65nm CMOS high speed comparator. ETS Illani Mohd Nawi, Basel Halak, Mark Zwolinski
2016	—	`conf`	Using Iddt current degradation to monitor ageing in CMOS circuits. PATMOS Radi Husin Bin Ramlee, Mark Zwolinski
2015	—	`conf`	A framework for thermal aware reliability estimation in 2D NoC. VDAT Ashish Sharma, Prachi Upadhyay, Ruby Ansar, Vijay Laxmi, Lava Bhargava, Manoj Singh Gaur, Mark Zwolinski
2015	Misc	`conf`	CERI: Cost-Effective Routing Implementation Technique for Network-on-Chip. VLSID Rimpy Bishnoi, Vijay Laxmi, Manoj Singh Gaur, Radi Husin Bin Ramlee, Mark Zwolinski
2015	C	`conf`	Conservative behavioural modelling in systemc-AMS. FDL Sara Vinco, Michele Lora, Mark Zwolinski
2015	J	`jnl`	Fault Tolerance in Distributed Neural Computing. CoRR Anton Kulakov, Mark Zwolinski, Jeffrey S. Reeve
2015	J	`jnl`	Implications of Burn-In Stress on NBTI Degradation. CoRR Mohd Azman Abdul Latif, Noohul Basheer Zain Ali, Fawnizu Azmadi Hussin, Mark Zwolinski
2015	J	`jnl`	In-Field Logic Repair of Deep Sub-Micron CMOS Processors. CoRR Massoud Mokhtarpour Ghahroodi, Mark Zwolinski
2015	—	`conf`	Network-on-chip: Current issues and challenges. VDAT Manoj Singh Gaur, Vijay Laxmi, Mark Zwolinski, Manoj Kumar, Niyati Gupta, Ashish Sharma
2015	J	`jnl`	Parallel Sparse Matrix Solution for Circuit Simulation on FPGAs. IEEE Trans. Computers Tarek Nechma, Mark Zwolinski
2015	J	`jnl`	Resistive Open Faults Detectability Analysis and Implications for Testing Low Power Nanometric ICs. IEEE Trans. Very Large Scale Integr. Syst. Mohamed Tagelsir Mohammadat, Noohul Basheer Zain Ali, Fawnizu Azmadi Hussin, Mark Zwolinski
2015	—	`conf`	VLSI implementation of a scalable K-best MIMO detector. ISCIT Ibrahim A. Bello, Basel Halak, Mohammed El-Hajjar, Mark Zwolinski
2015	—	`conf`	σLBDR: Congestion-aware logic based distributed routing for 2D NoC. VDAT Niyati Gupta, Manoj Kumar, Vijay Laxmi, Manoj Singh Gaur, Mark Zwolinski
2014	C	`conf`	A cost-efficient self-checking register architecture for radiation hardened designs. ISCAS Yang Lin, Mark Zwolinski
2014	A	`conf`	A low-cost radiation hardened flip-flop. DATE Yang Lin, Mark Zwolinski, Basel Halak
2014	C	`conf`	A novel non-minimal turn model for highly adaptive routing in 2D NoCs. VLSI-SoC Manoj Kumar, Vijay Laxmi, Manoj Singh Gaur, Masoud Daneshtalab, Mark Zwolinski
2014	—	`conf`	A novel non-minimal/minimal turn model for highly adaptive routing in 2D NoCs. NOCS Manoj Kumar, Vijay Laxmi, Manoj Singh Gaur, Masoud Daneshtalab, Pankaj Kumar Srivastava, Seok-Bum Ko, Mark Zwolinski
2014	Misc	`conf`	CARM: Congestion Adaptive Routing Method for On Chip Networks. VLSID Manoj Kumar, Vijay Laxmi, Manoj Singh Gaur, Seok-Bum Ko, Mark Zwolinski
2014	A	`conf`	Efficient simulation and modelling of non-rectangular NoC topologies. DATE Ji Qi, Mark Zwolinski
2014	—	`conf`	Fault tolerant and highly adaptive routing for 2D NoCs. DFT Manoj Kumar, Vijay Laxmi, Manoj Singh Gaur, Masoud Daneshtalab, Masoumeh Ebrahimi, Mark Zwolinski
2014	—	`conf`	Fault tolerant routing implementation mechanism for irregular 2D mesh NoCs. NORCHIP Rimpy Bishnoi, Vijay Laxmi, Manoj Singh Gaur, Radi Husin Bin Ramlee, Mark Zwolinski
2014	—	`conf`	Highly adaptive and congestion-aware routing for 3D NoCs. ACM Great Lakes Symposium on VLSI Manoj Kumar, Vijay Laxmi, Manoj Singh Gaur, Masoud Daneshtalab, Seok-Bum Ko, Mark Zwolinski
2014	J	`jnl`	Monte Carlo Static Timing Analysis with statistical sampling. Microelectron. Reliab. Michael Merrett, Mark Zwolinski
2014	J	`jnl`	Multivoltage Aware Resistive Open Fault Model. IEEE Trans. Very Large Scale Integr. Syst. Mohamed Tagelsir Mohammadat, Noohul Basheer Zain Ali, Fawnizu Azmadi Hussin, Mark Zwolinski
2013	—	`conf`	Circuit Transient Analysis Using State Space Equations. VDAT Kai Chi Alex Lam, Mark Zwolinski
2013	J	`jnl`	Energy-Conscious Turbo Decoder Design: A Joint Signal Processing and Transmit Energy Reduction Approach. IEEE Trans. Veh. Technol. Liang Li, Robert G. Maunder, Bashir M. Al-Hashimi, Mark Zwolinski, Lajos Hanzo
2013	—	`conf`	ISPD 2013 expert designer/user session (eds). ISPD Cliff C. N. Sze, Laleh Behjat, Nikhil Jayakumar, Atul Walimbe, Gregory Ford, Mark Zwolinski, Harish Dangat, Giriraj Kakol
2013	J	`jnl`	Oscillation-based analog diagnosis using artificial neural networks based inference mechanism. Comput. Electr. Eng. Miona Andrejevic Stosovic, Miljana Milic, Mark Zwolinski, Vanco B. Litovski
2013	—	`ed.`	VLSI Design and Test, 17th International Symposium, VDAT 2013, Jaipur, India, July 27-30, 2013, Revised Selected Papers VDAT Manoj Singh Gaur, Mark Zwolinski, Vijay Laxmi, Dharmendar Boolchandani, Virendra Singh, Adit D. Singh
2012	—	`conf`	A Large Scale Digital Simulation of Spiking Neural Networks (SNN) on Fast SystemC Simulator. UKSim Hamid Soleimani, Arash Ahmadi, Mohammad Bavandpour, Amirali Amirsoleimani, Mark Zwolinski
2012	C	`conf`	SETTOFF: A fault tolerant flip-flop for building Cost-efficient Reliable Systems. IOLTS Yang Lin, Mark Zwolinski
2011	—	`conf`	Acceleration of Functional Validation Using GPGPU. DELTA P. Lalith Suresh, Navaneeth Rameshan, Manoj Singh Gaur, Mark Zwolinski, Vijay Laxmi
2011	C	`conf`	Acceleration of packet filtering using gpgpu. SIN Manoj Singh Gaur, Vijay Laxmi, Lakshminarayanan V., Kamal Cahndra, Mark Zwolinski
2011	J	`jnl`	Fixed-point multiplication: A probabilistic bit-pattern view. Microelectron. Reliab. Arash Ahmadi, Mark Zwolinski
2011	A	`conf`	Modelling circuit performance variations due to statistical variability: Monte Carlo static timing analysis. DATE Michael Merrett, Plamen Asenov, Yangang Wang, Mark Zwolinski, Dave Reid, Campbell Millar, Scott Roy, Zhenyu Liu, Stephen B. Furber, Asen Asenov
2011	J	`jnl`	On the VLSI Implementation of Adaptive-Frequency Hopf Oscillator. IEEE Trans. Circuits Syst. I Regul. Pap. Arash Ahmadi, Eduardo Mangieri, Koushik Maharatna, Srinandan Dasmahapatra, Mark Zwolinski
2011	C	`conf`	Parallelizing TUNAMI-N1 Using GPGPU. HPCC Harsh Gidra, Israrul Haque, Nitin P. Kumar, M. Sargurunathan, Manoj Singh Gaur, Vijay Laxmi, Mark Zwolinski, Virendra Singh
2011	—	`conf`	Radiation hardening by design: A novel gate level approach. AHS Massoud Mokhtarpour Ghahroodi, Mark Zwolinski, Emre Özer
2011	B	`conf`	Timing Vulnerability Factors of Ultra Deep-sub-micron CMOS. ETS Massoud Mokhtarpour Ghahroodi, Mark Zwolinski, Rick Wong, Shi-Jie Wen
2010	—	`conf`	A communication infrastructure for a million processor machine. Conf. Computing Frontiers Andrew D. Brown, Steve B. Furber, Jeff S. Reeve, Peter R. Wilson, Mark Zwolinski, John E. Chad, Luis A. Plana, David R. Lester
2010	C	`conf`	Design metrics for RTL level estimation of delay variability due to intradie (random) variations. ISCAS Michael Merrett, Yangang Wang, Mark Zwolinski, Koushik Maharatna, Massimo Alioto
2010	C	`conf`	Modelling Smart Card Security Protocols in SystemC TLM. EUC Aisha Fouad Bushager, Mark Zwolinski
2010	C	`conf`	Parallel sparse matrix solver for direct circuit simulations on FPGAs. ISCAS Tarek Nechma, Mark Zwolinski, Jeff S. Reeve
2010	J	`jnl`	Very large scale integration architecture for integer wavelet transform. IET Comput. Digit. Tech. Ahmed K. Al-Sulaifanie, Arash Ahmadi, Mark Zwolinski
2009	C	`conf`	Analytical Transient Response and Propagation Delay Model for Nanoscale CMOS Inverter. ISCAS Yangang Wang, Mark Zwolinski
2009	J	`jnl`	New concepts of worst-case delay and yield estimation in asynchronous VLSI circuits. Microelectron. Reliab. Miljana Sokolovic, Vanco B. Litovski, Mark Zwolinski
2009	A	`conf`	Variation resilient adaptive controller for subthreshold circuits. DATE Biswajit Mishra, Bashir M. Al-Hashimi, Mark Zwolinski
2008	—	`conf`	Behavioural Modelling for Stability of CMOS SRAM Cells Subject to Random Discrete Doping. BMAS Yangang Wang, Mark Zwolinski, Michael Merrett
2008	A	`conf`	Divided Backend Duplication Methodology for Balanced Dual Rail Routing. CHES Karthik Baddam, Mark Zwolinski
2008	—	`conf`	On the probability distribution of fixed-point multiplication. ICECS Arash Ahmadi, Mark Zwolinski
2008	J	`jnl`	Path switching: a technique to tolerate dual rail routing imbalances. Des. Autom. Embed. Syst. Karthik Baddam, Mark Zwolinski
2008	A*	`conf`	Symbolic noise analysis approach to computational hardware optimization. DAC Arash Ahmadi, Mark Zwolinski
2007	—	`conf`	A novel self-routing reconfigurable fault-tolerant cell array. AHS Xiaoxuan She, Mark Zwolinski
2007	Misc	`conf`	Evaluation of Dynamic Voltage and Frequency Scaling as a Differential Power Analysis Countermeasure. VLSI Design Karthik Baddam, Mark Zwolinski
2007	—	`conf`	General and Technical Program Chairs' Message. ICECS Driss Bouami, El Mostapha Aboulhamid, Mohsine Eleuldj, Mark Zwolinski
2007	C	`conf`	Multiple-Width Bus Partitioning Approach to Datapath Synthesis. ISCAS Arash Ahmadi, Mark Zwolinski
2007	—	`conf`	Testing of Level Shifters in Multiple Voltage Designs. ICECS Noohul Basheer Zain Ali, Mark Zwolinski, Bashir M. Al-Hashimi
2007	J	`jnl`	Using neural networks as a fault detection mechanism in MEMS devices. Microelectron. Reliab. Reza Asgary, Karim Mohammadi, Mark Zwolinski
2006	J	`jnl`	An Integrated High-Level On-Line Test Synthesis Tool. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Petros Oikonomakos, Mark Zwolinski
2006	J	`jnl`	Analogue electronic circuit diagnosis based on ANNs. Microelectron. Reliab. Vanco B. Litovski, Miona Andrejevic, Mark Zwolinski
2006	B	`conf`	Dynamic Voltage Scaling Aware Delay Fault Testing. ETS Noohul Basheer Zain Ali, Mark Zwolinski, Bashir M. Al-Hashimi, Peter Harrod
2006	J	`jnl`	On the Design of Self-Checking Controllers with Datapath Interactions. IEEE Trans. Computers Petros Oikonomakos, Mark Zwolinski
2006	J	`jnl`	Reversible Logic to Cryptographic Hardware: A New Paradigm CoRR Himanshu Thapliyal, Mark Zwolinski
2005	—	`conf`	Behavioural modelling, simulation, test and diagnosis of MEMS using ANNs. ISCAS (5) Vanco B. Litovski, Mark Zwolinski, Miona Andrejevic
2004	—	`conf`	Behavioural modelling of analogue faults in VHDL-AMS - a case study. ISCAS (5) Mark Zwolinski, Andrew D. Brown
2004	J	`jnl`	Concurrent analogue fault simulation, the equation formulation aspect. Int. J. Circuit Theory Appl. Vanco B. Litovski, Ivan Litovski, Mark Zwolinski
2004	J	`jnl`	Generation and Verification of Tests for Analog Circuits Subject to Process Parameter Deviations. J. Electron. Test. Stephen J. Spinks, Chris D. Chalk, Ian M. Bell, Mark Zwolinski
2004	Misc	`conf`	Integrating Self Testability with Design Space Exploration by a Controller based Estimation Technique. VLSI Design Manoj Singh Gaur, Mark Zwolinski
2003	C	`conf`	Foundation of Combined Datapath and Controller Self-checking Design. IOLTS Petros Oikonomakos, Mark Zwolinski
2003	J	`jnl`	Globally convergent algorithms for DC operating point analysis of nonlinear circuits. IEEE Trans. Evol. Comput. Duncan Crutchley, Mark Zwolinski
2003	J	`jnl`	Integrating testability with design space exploration. Microelectron. Reliab. Mark Zwolinski, Manoj Singh Gaur
2003	—	`conf`	The continuous-discrete interface - What does this really mean? Modelling and simulation issues. ISCAS (3) Andrew D. Brown, Mark Zwolinski
2003	A	`conf`	Versatile High-Level Synthesis of Self-Checking Datapaths Using an On-Line Testability Metric. DATE Petros Oikonomakos, Mark Zwolinski, Bashir M. Al-Hashimi
2002	A	`conf`	Behavioural Modelling of Operational Amplifier Faults Using VHDL-AMS. DATE Peter R. Wilson, J. Neil Ross, Mark Zwolinski, Andrew D. Brown, Yavuz Kiliç
2002	—	`conf`	Transformation Based Insertion of On-Line Testing Resources in a High-Level Synthesis Environment. IOLTW Petros Oikonomakos, Mark Zwolinski
2002	B	`conf`	Using evolutionary and hybrid algorithms for DC operating point analysis of nonlinear circuits. IEEE Congress on Evolutionary Computation Duncan Crutchley, Mark Zwolinski
2001	J	`jnl`	A technique for transparent fault injection and simulation in VHDL. Microelectron. Reliab. Mark Zwolinski
2001	J	`jnl`	Mutual Information Theory for Adaptive Mixture Models. IEEE Trans. Pattern Anal. Mach. Intell. Zheng Rong Yang, Mark Zwolinski
2001	—	`conf`	Practical algorithms for fully decoupled mixed-mode simulation of electronic circuits. ISCAS (5) Mark Zwolinski, R. W. Allen
2001	—	`conf`	Process variation independent built-in current sensor for analogue built-in self-test. ISCAS (4) Yavuz Kiliç, Mark Zwolinski
2000	C	`conf`	Applying Mutual Information to Adaptive Mixture Models. IDEAL Zheng Rong Yang, Mark Zwolinski
2000	J	`jnl`	Applying a robust heteroscedastic probabilistic neural network toanalog fault detection and classification. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Zheng Rong Yang, Mark Zwolinski, Chris D. Chalk, Alan Christopher Williams
1999	A	`conf`	Fast, Robust DC and Transient Fault Simulation for Nonlinear Analog Circuits. DATE Zheng Rong Yang, Mark Zwolinski
1999	—	`conf`	Testing analog circuits by supply voltage variation and supply current monitoring. CICC Yavuz Kiliç, Mark Zwolinski
1998	—	`conf`	A design for test technique to increase the resolution of analogue supply current tests. ICECS Chris D. Chalk, Mark Zwolinski
1997	—	`conf`	Generation and Verification of Tests for Analogue Circuits Subject to Process Parameter Deviations. DFT Stephen J. Spinks, Chris D. Chalk, Ian M. Bell, Mark Zwolinski
1996	—	`conf`	Analogue Fault Modelling and Simulation for Supply Current Monitoring. ED&TC Mark Zwolinski, Chris D. Chalk, Brian R. Wilkins
1992	J	`jnl`	Confidence in mixed-mode circuit simulation. Comput. Aided Des. Andrew D. Brown, Mark Zwolinski, Ken G. Nichols, Tom J. Kazmierski
1992	J	`jnl`	Interleaving: an additional topological compaction technique for Weinberger array generation. Comput. Aided Des. Keith Richard Baker, Mark Zwolinski
1991	—	`conf`	A General Purpose Network Solving System. VLSI Tom J. Kazmierski, Andrew D. Brown, Ken G. Nichols, Mark Zwolinski
1990	J	`jnl`	Lee router modified for global routing. Comput. Aided Des. Andrew D. Brown, Mark Zwolinski