Mark Vesterbacka

42 papers C 2Journal 6Unranked 34
YearRankTypeTitle / Venue / Authors
2018 — conf
Ring Counters as Phase Accumulator in VCO-Based ADCs.
ICECS
Mark Vesterbacka, Vishnu Unnikrishnan
2017 — conf
An RNS based modular multiplier with reduced complexity.
NORCAS
Shahzad Asif, Mark Vesterbacka
2017 J jnl
Mitigation of Sampling Errors in VCO-Based ADCs.
IEEE Trans. Circuits Syst. I Regul. Pap.
Vishnu Unnikrishnan, Mark Vesterbacka
2016 — conf
Design of a VCO-based ADC in 28 nm CMOS.
NORCAS
Vishnu Unnikrishnan, Mark Vesterbacka
2016 — conf
Linearization of VCO-based ADCs using asynchronous sigma-delta modulation.
MWSCAS
Vishnu Unnikrishnan, Mark Vesterbacka
2016 — conf
Mixed-Signal Design Using Digital CAD.
ISVLSI
Vishnu Unnikrishnan, Mark Vesterbacka
2016 — conf
VCO-based ADCs for IoT applications.
ISIC
Vishnu Unnikrishnan, Mark Vesterbacka, Atila Alvandpour
2015 — conf
A NAND gate based standard cell VCO for use in synthesizable ADCs.
NORCAS
Vishnu Unnikrishnan, Mark Vesterbacka
2015 — conf
A fully synthesized all-digital VCO-based analog-to-digital converter.
NORCAS
Vishnu Unnikrishnan, Srinivasa Rao Pathapati, Mark Vesterbacka
2015 — conf
Linearization of synthesizable VCO-based ADCs using delta modulation.
ECCTD
Vishnu Unnikrishnan, Mark Vesterbacka
2015 — conf
Power-efficient time-to-digital converter for all-digital frequency locked loops.
ECCTD
Muhammad Touqir Pasha, Niklas U. Andersson, Mark Vesterbacka
2014 J jnl
A Vernier Time-to-Digital Converter With Delay Latch Chain Architecture.
IEEE Trans. Circuits Syst. II Express Briefs
Niklas U. Andersson, Mark Vesterbacka
2014 — conf
A modified switching scheme for multiplexer based thermometer-to-binary encoders.
NORCHIP
Muhammad Touqir Pasha, Mark Vesterbacka
2014 J jnl
Time-Mode Analog-to-Digital Conversion Using Standard Cells.
IEEE Trans. Circuits Syst. I Regul. Pap.
Vishnu Unnikrishnan, Mark Vesterbacka
2012 J jnl
Performance analysis of radix-4 adders.
Integr.
Shahzad Asif, Mark Vesterbacka
2011 — conf
Frequency control schemes for single-ended ring oscillators.
ECCTD
Muhammad Touqir Pasha, Mark Vesterbacka
2010 — conf
Calibration of high-resolution flash ADCS based on histogram test methods.
ICECS
Armin Jalili, Sayed Masoud Sayedi, J. Jacob Wikner, Kent Palmkvist, Mark Vesterbacka
2010 J jnl
Reduction of Substrate Noise in Sub Clock Frequency Range.
IEEE Trans. Circuits Syst. I Regul. Pap.
S. M. Yasser Sherazi, Shahzad Asif, Erik Backenius, Mark Vesterbacka
2007 — conf
Reduction of simultaneous switching noise in analog signal band.
ECCTD
Erik Backenius, Mark Vesterbacka, V. B. Settu
2007 — conf
Thermometer-to-binary decoders for flash analog-to-digital converters.
ECCTD
Erik Säll, Mark Vesterbacka
2006 C conf
Digit-serial/parallel multipliers with improved throughput and latency.
ISCAS
Magnus Karlsson, Mark Vesterbacka
2006 — conf
Effect of Simultaneous Switching Noise on an Analog Filter.
ICECS
Erik Backenius, Mark Vesterbacka
2005 — conf
6 bit 1 GHz CMOS silicon-on-insulator flash analog-to-digital converter for read channel applications.
ECCTD
Erik Säll, Mark Vesterbacka
2005 — conf
A yield-enhancement strategy for binary-weighted DACs.
ECCTD
K. Ola Andersson, Mark Vesterbacka
2005 — conf
Glitch reduction in digit-serial recursive filters using retiming.
ICECS
Krister Landernäs, Johnny Holmberg, Mark Vesterbacka
2005 J jnl
Modeling of glitches due to rise/fall asymmetry in current-steering digital-to-analog converters.
IEEE Trans. Circuits Syst. I Regul. Pap.
K. Ola Andersson, Mark Vesterbacka
2004 — conf
A Parameterized Cell-Based Design Approach for Digital-to-Analog Converters.
IWSOC
K. Ola Andersson, Mark Vesterbacka
2004 — conf
A high-speed low-latency digit-serial hybrid adder.
ISCAS (3)
Krister Landernäs, Johnny Holmberg, Mark Vesterbacka
2004 — conf
A method for increasing the throughput of fixed coefficient digit-serial/parallel multipliers.
ISCAS (2)
Magnus Karlsson, Mark Vesterbacka, Wlodek Kulesza
2004 — conf
A study of digital decoders in flash analog-to-digital converters.
ISCAS (1)
Erik Säll, Mark Vesterbacka, K. Ola Andersson
2004 — conf
Design of a Comparator in CMOS SOI.
IWSOC
Erik Säll, Mark Vesterbacka
2002 — conf
A differential DAC architecture with variable common-mode level.
ISCAS (1)
K. Ola Andersson, Niklas U. Andersson, Mark Vesterbacka, J. Jacob Wikner
2002 — conf
A polynomial-based division algorithm.
ISCAS (3)
Robert Hägglund, Per Löwenborg, Mark Vesterbacka
2001 — conf
Design of encoders for linear-coded D/A converters.
ISCAS (1)
Mark Vesterbacka, J. Jacob Wikner
2000 — conf
A static CMOS master-slave flip-flop experiment.
ICECS
Mark Vesterbacka
2000 — conf
Dynamic element matching in D/A converters with restricted scrambling.
ICECS
Mark Vesterbacka, Mikael Rudberg, J. Jacob Wikner, Niklas U. Andersson
2000 — conf
Glitch minimization and dynamic element matching in D/A converters.
ICECS
Mikael Karlsson Rudberg, Mark Vesterbacka, Niklas U. Andersson, J. Jacob Wikner
1999 — conf
A robust differential scan flip-flop.
ISCAS (1)
Mark Vesterbacka
1996 — conf
Implementation of static DSP algorithms using multiplexed PE: s.
ICECS
Kent Palmkvist, Mark Vesterbacka, Lars Wanhammar
1996 — conf
Sign-extension and quantization in bit-serial digital filters.
ICECS
Mark Vesterbacka, Kent Palmkvist, Lars Wanhammar
1994 — conf
A Bit-Serial CMOS Digital IF-Filter for Mobile Radio Using an On-Chip Clock.
Mobile Communications
Peter Nilsson, Mats Torkelson, Kent Palmkvist, Mark Vesterbacka, Lars Wanhammar
1994 C conf
Implementation of Fast Bit-Serial Lattice Wave Digital Filters.
ISCAS
Mark Vesterbacka, Kent Palmkvist, Peter Sandberg, Lars Wanhammar