Mark Tehranipoor

294 papers A* 13A 30B 5C 11Misc 14Journal 155Unranked 66
YearRankTypeTitle / Venue / Authors
2026 — conf
GEmFuzz: Uncovering System-Level Vulnerabilities in SoCs via Emulation-Based Grey-Box Fuzzing.
ASP-DAC
Shuvagata Saha, Ahmed Alhurubi, Tanvir Rahman, Hasan Al Shaikh, Sujan Kumar Saha, Farimah Farahmandi, Mark Tehranipoor
2026 J jnl
IFV: Information Flow Verification at the Pre-silicon Stage Utilizing Static-Formal Methodology.
IACR Cryptol. ePrint Arch.
Rasheed Kibria, Farimah Farahmandi, Mark Tehranipoor
2026 J jnl
LAsset: An LLM-assisted Security Asset Identification Framework for System-on-Chip (SoC) Verification.
CoRR
Md. Ajoad Hasan, Dipayan Saha, Khan Thamid Hasan, Nashmin Alam, Azim Uddin, Sujan Kumar Saha, Mark Tehranipoor, Farimah Farahmandi
2025 C conf
Cultivating Security: Debug Authentication for Ensuring the Security of SoC's Root of Trust.
VLSI-SoC
Arash Vafaei, Sujan Kumar Saha, Mark Tehranipoor, Farimah Farahmandi
2025 J jnl
DeepV: A Model-Agnostic Retrieval-Augmented Framework for Verilog Code Generation with a High-Quality Knowledge Base.
CoRR
Zahin Ibnat, Paul E. Calzada, Rasin Mohammed Ihtemam, Sujan Kumar Saha, Jingbo Zhou, Farimah Farahmandi, Mark Tehranipoor
2025 C conf
EmFIA: A Novel Emulation-based Fault Injection Vulnerability Assessment Framework at RTL Level.
VLSI-SoC
Tanvir Rahman, Shuvagata Saha, Sujan Kumar Saha, Farimah Farahmandi, Mark Tehranipoor
2025 J jnl
EvoLUTe+: Fine-Grained Look-Up-Table-based RTL IP Redaction.
IACR Cryptol. ePrint Arch.
Rui Guo, M. Sazadur Rahman, Jingbo Zhou, Hadi Mardani Kamali, Fahim Rahman, Farimah Farahmandi, Mark Tehranipoor
2025 J jnl
GEM-Water: Generation of EM-Based Watermark With Hidden FSM for SoC IPs to Combat Piracy.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Pantha Protim Sarker, Upoma Das, Mohammad Bin Monjil, Jingbo Zhou, Farimah Farahmandi, Mark Tehranipoor
2025 — conf
ML-EMFI: A Machine Learning-Driven Pre-Silicon Electromagnetic Fault Injection Security Evaluation for Robust IC Design.
HOST
Pantha Protim Sarker, Tianze Kan, Jingchen Liang, Ozgur Tuncer, Bo He, Zelin Lu, Sudarshan Mallu, Lang Lin, Norman Chang, Rikuu Hasegawa, Kazuki Monta, Makoto Nagata, Farimah Farahmandi, Mark Tehranipoor
2025 — conf
NoXLock: SiP Activation and Licensing through Obfuscated on-Chip Network and Fuzzy Traffic.
ASP-DAC
Md. Saad Ul Haque, Azim Uddin, Jingbo Zhou, Hadi Mardani Kamali, Farimah Farahmandi, Mark Tehranipoor
2025 J jnl
POCA: First Power-on Chip Authentication and Key Exchange for Secure Provisioning in System-on-Chip.
IEEE Trans. Very Large Scale Integr. Syst.
Md Sami Ul Islam Sami, Amit Mazumder Shuvo, Fahim Rahman, Adam Cron, Dale R. Donchin, Mike Borza, Farimah Farahmandi, Mark Tehranipoor
2025 J jnl
PSCMark: Power Side Channel-based Watermarking for SoC IPs Using Clock Gates.
ACM Trans. Design Autom. Electr. Syst.
Upoma Das, Mohammad Sazadur Rahman, Akshay Kulkarni, Mark Tehranipoor, Farimah Farahmandi
2025 J jnl
Re-Pen: Reinforcement Learning-Enforced Penetration Testing for SoC Security Verification.
IEEE Trans. Very Large Scale Integr. Syst.
Hasan Al Shaikh, Shuvagata Saha, Kimia Zamiri Azar, Farimah Farahmandi, Mark Tehranipoor, Fahim Rahman
2025 — conf
ReFID: A System-Aware Remote Fault-Injection Attack Detection & Mitigation for Secure Heterogeneous System.
HOST
Amit Mazumder Shuvo, Md Latifur Rahman, Jingbo Zhou, Farimah Farahmandi, Mark Tehranipoor
2025 J jnl
Rethinking SoC Verification for Secure Cross-Layer Interactions.
IEEE Des. Test
Hasan Al Shaikh, Shuvagata Saha, Sujan Kumar Saha, Kimia Zamiri Azar, Farimah Farahmandi, Mark Tehranipoor
2025 J jnl
SPY-PMU: Side-Channel Profiling of Your Performance Monitoring Unit to Leak Remote User Activity.
IACR Cryptol. ePrint Arch.
Md Kawser Bepary, Arunabho Basu, Sajeed Mohammad, Rakibul Hassan, Farimah Farahmandi, Mark Tehranipoor
2025 J jnl
SV-LLM: An Agentic Approach for SoC Security Verification using Large Language Models.
CoRR
Dipayan Saha, Shams Tarek, Hasan Al Shaikh, Khan Thamid Hasan, Pavan Sai Nalluri, Md. Ajoad Hasan, Nashmin Alam, Jingbo Zhou, Sujan Kumar Saha, Mark Tehranipoor, Farimah Farahmandi
2025 J jnl
SV-LLM: An Agentic Approach for SoC Security Verification using Large Language Models.
IACR Cryptol. ePrint Arch.
Dipayan Saha, Shams Tarek, Hasan Al Shaikh, Khan Thamid Hasan, Pavan Sai Nalluri, Md. Ajoad Hasan, Nashmin Alam, Jingbo Zhou, Sujan Kumar Saha, Mark Tehranipoor, Farimah Farahmandi
2025 — conf
SoCureLLM: An LLM-Driven Approach for Large-Scale System-on-Chip Security Verification and Policy Generation.
HOST
Shams Tarek, Dipayan Saha, Sujan Kumar Saha, Mark Tehranipoor, Farimah Farahmandi
2025 A* conf
SoK: A Security Architect's View of Printed Circuit Board Attacks.
USENIX Security Symposium
Jacob Harrison, Nathan Jessurun, Mark Tehranipoor
2025 J jnl
Towards Efficient Gate-Level Electromagnetic Side-Channel Leakage Modeling and Vulnerability Assessment.
J. Hardw. Syst. Secur.
Md Kawser Bepary, Tao Zhang, Jingbo Zhou, Fahim Rahman, Farimah Farahmandi, Mark Tehranipoor
2025 — conf
Trusting the Machine: How Secure is LLM-Generated RTL Code?
MLCAD
Zahin Ibnat, Paul E. Calzada, Dipayan Saha, Hasan Al Shaikh, Sujan Kumar Saha, Jingbo Zhou, Farimah Farahmandi, Mark Tehranipoor
2025 J jnl
VerilogDB: The Largest, Highest-Quality Dataset with a Preprocessing Framework for LLM-based RTL Generation.
CoRR
Paul E. Calzada, Zahin Ibnat, Tanvir Rahman, Kamal Kandula, Danyu Lu, Sujan Kumar Saha, Farimah Farahmandi, Mark Tehranipoor
2025 J jnl
When Everyday Devices Become Weapons: A Closer Look at the Pager and Walkie-talkie Attacks.
CoRR
Pantha Protim Sarker, Upoma Das, Nitin Varshney, Shang Shi, Akshay Kulkarni, Farimah Farahmandi, Mark Tehranipoor
2024 J jnl
A Survey on SoC Security Verification Methods at the Pre-silicon Stage.
IACR Cryptol. ePrint Arch.
Rasheed Kibria, Farimah Farahmandi, Mark Tehranipoor
2024 J jnl
AGILE: Automated Assertion Generation to Detect Information Leakage Vulnerabilities.
IEEE Trans. Inf. Forensics Secur.
Nusrat Farzana Dipu, Avinash Ayalasomayajula, Mark Tehranipoor, Farimah Farahmandi
2024 J jnl
Automatic Asset Identification for Assertion-Based SoC Security Verification.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Avinash Ayalasomayajula, Nusrat Farzana Dipu, Mark Tehranipoor, Farimah Farahmandi
2024 Misc conf
CAD Tools Pathway in Hardware Security.
VLSID
Sree Ranjani Rajendran, Farimah Farahmandi, Mark Tehranipoor
2024 C conf
Continuity in Security: Leveraging LLM for Translating Security Properties Across Hardware Designs.
VLSI-SoC
Bulbul Ahmed, Sujan Kumar Saha, Jingbo Zhou, Sohrab Aftabjahani, Mark Tehranipoor, Farimah Farahmandi
2024 J jnl
Efficient SoC Security Monitoring: Quality Attributes and Potential Solutions.
IEEE Des. Test
Mridha Md Mashahedur Rahman, Shams Tarek, Kimia Zamiri Azar, Mark Tehranipoor, Farimah Farahmandi
2024 — conf
Empowering Hardware Security with LLM: The Development of a Vulnerable Hardware Database.
HOST
Dipayan Saha, Katayoon Yahyaei, Sujan Kumar Saha, Mark Tehranipoor, Farimah Farahmandi
2024 J jnl
Exploring the Abyss? Unveiling Systems-on-Chip Hardware Vulnerabilities Beneath Software.
IEEE Trans. Inf. Forensics Secur.
Sree Ranjani Rajendran, Nusrat Farzana Dipu, Shams Tarek, Hadi Mardani Kamali, Farimah Farahmandi, Mark Tehranipoor
2024 J jnl
FTC: A Universal Framework for Fault-Injection Attack Detection and Prevention.
IEEE Trans. Very Large Scale Integr. Syst.
Md Rafid Muttaki, Md. Habibur Rahman, Akshay Kulkarni, Mark Tehranipoor, Farimah Farahmandi
2024 B conf
FormalFuzzer: Formal Verification Assisted Fuzz Testing for SoC Vulnerability Detection.
ASPDAC
Nusrat Farzana Dipu, Muhammad Monir Hossain, Kimia Zamiri Azar, Farimah Farahmandi, Mark Tehranipoor
2024 J jnl
Fuzzing for Automated SoC Security Verification: Challenges and Solution.
IEEE Des. Test
Muhammad Monir Hossain, Kimia Zamiri Azar, Fahim Rahman, Farimah Farahmandi, Mark Tehranipoor
2024 A* conf
GATE-SiP: Enabling Authenticated Encryption Testing in Systems-in-Package.
DAC
Galib Ibne Haidar, Kimia Zamiri Azar, Hadi Mardani Kamali, Mark Tehranipoor, Farimah Farahmandi
2024 — conf
HI-SST: Safeguarding SiP Authenticity Through Secure Split-Test in Heterogeneous Integration.
ISVLSI
Paul E. Calzada, Md Sami Ul Islam Sami, Jingbo Zhou, Kimia Zamiri Azar, Farimah Farahmandi, Mark Tehranipoor
2024 J jnl
Heterogeneous Integration Supply Chain Integrity Through Blockchain and CHSM.
ACM Trans. Design Autom. Electr. Syst.
Paul E. Calzada, Md Sami Ul Islam Sami, Kimia Zamiri Azar, Fahim Rahman, Farimah Farahmandi, Mark Tehranipoor
2024 J jnl
INSPECT: Investigating Supply Chain and Cyber-Physical Security of Battery Systems.
IACR Cryptol. ePrint Arch.
Tao Zhang, Shang Shi, Md. Habibur Rahman, Nitin Varshney, Akshay Kulkarni, Farimah Farahmandi, Mark Tehranipoor
2024 J jnl
Improving Bounded Model Checkers Scalability for Circuit De-Obfuscation: An Exploration.
IEEE Trans. Inf. Forensics Secur.
Kimia Zamiri Azar, Hadi Mardani Kamali, Farimah Farahmandi, Mark Tehranipoor
2024 J jnl
LLM for SoC Security: A Paradigm Shift.
IEEE Access
Dipayan Saha, Shams Tarek, Katayoon Yahyaei, Sujan Kumar Saha, Jingbo Zhou, Mark Tehranipoor, Farimah Farahmandi
2024 — conf
Photon Emission Modeling and Machine-Learning Assisted Pre-Silicon Optical Side-Channel Simulation.
HOST
Henian Li, Lang Lin, Norman Chang, Sreeja Chowdhury, Dylan Mcguire, Bozidar Novakovic, Kazuki Monta, Makoto Nagata, Ying-Shiun Li, Pramod M. S, Piin-Chen Yeh, Jyh-Shing Roger Jang, Chengjie Xi, Qiutong Jin, Navid Asadi, Mark Tehranipoor
2024 A conf
RL-TPG: Automated Pre-Silicon Security Verification through Reinforcement Learning-Based Test Pattern Generation.
DATE
Nurun Nahar Mondol, Arash Vafaei, Kimia Zamiri Azar, Farimah Farahmandi, Mark Tehranipoor
2024 B conf
SAP: Silicon Authentication Platform for System-on-Chip Supply Chain Vulnerabilities.
ISPASS
Md Sami Ul Islam Sami, Jingbo Zhou, Sujan Kumar Saha, Fahim Rahman, Farimah Farahmandi, Mark Tehranipoor
2024 A conf
SECT-HI: Enabling Secure Testing for Heterogeneous Integration to Prevent SiP Counterfeits.
ITC
Galib Ibne Haidar, Md Sami Ul Islam Sami, Jingbo Zhou, Kimia Zamiri Azar, Mark Tehranipoor, Farimah Farahmandi
2024 — conf
SeeMLess: Security Evaluation of Logic Locking using Machine Learning oriented Estimation.
ACM Great Lakes Symposium on VLSI
Bulbul Ahmed, M. Sazadur Rahman, Kimia Zamiri Azar, Farimah Farahmandi, Fahim Rahman, Mark Tehranipoor
2024 J jnl
SoCureLLM: An LLM-driven Approach for Large-Scale System-on-Chip Security Verification and Policy Generation.
IACR Cryptol. ePrint Arch.
Shams Tarek, Dipayan Saha, Sujan Kumar Saha, Mark Tehranipoor, Farimah Farahmandi
2024 J jnl
SoK: A Security Architect's View of Printed Circuit Board Attacks.
CoRR
Jacob Harrison, Nathan Jessurun, Mark Tehranipoor
2024 J jnl
The Road Not Taken: eFPGA Accelerators Utilized for SoC Security Auditing.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Mridha Md Mashahedur Rahman, Shams Tarek, Kimia Zamiri Azar, Mark Tehranipoor, Farimah Farahmandi
2024 J jnl
VLSI Test and Trust Roundtable.
IEEE Des. Test
Ramesh Karri, Janusz Rajski, Rob Aitken, Subhasish Mitra, Mark Tehranipoor
2023 J jnl
A Comprehensive Survey on Non-Invasive Fault Injection Attacks.
IACR Cryptol. ePrint Arch.
Amit Mazumder Shuvo, Tao Zhang, Farimah Farahmandi, Mark Tehranipoor
2023 A conf
ARC-FSM-G: Automatic Security Rule Checking for Finite State Machine at the Netlist Abstraction.
ITC
Rasheed Kibria, Farimah Farahmandi, Mark Tehranipoor
2023 J jnl
ARC-FSM-G: Automatic Security Rule Checking for Finite State Machine at the Netlist Abstraction.
IACR Cryptol. ePrint Arch.
Rasheed Kibria, Farimah Farahmandi, Mark Tehranipoor
2023 A* conf
ActiWate: Adaptive and Design-agnostic Active Watermarking for IP Ownership in Modern SoCs.
DAC
Zahin Ibnat, M. Sazadur Rahman, Mridha Md Mashahedur Rahman, Hadi Mardani Kamali, Mark Tehranipoor, Farimah Farahmandi
2023 B conf
BitFREE: On Significant Speedup and Security Applications of FPGA Bitstream Format Reverse Engineering.
ETS
Tao Zhang, Mark Tehranipoor, Farimah Farahmandi
2023 Misc conf
CAPEC: A Cellular Automata Guided FSM-based IP Authentication Scheme.
VTS
Mridha Md Mashahedur Rahman, M. Sazadur Rahman, Rasheed Kibria, Mike Borza, Bandy Reddy, Adam Cron, Fahim Rahman, Mark Tehranipoor, Farimah Farahmandi
2023 — conf
Dual Channel EM/Power Attack Using Mutual Information and its Real-time Implementation.
HOST
Yunkai Bai, Jungmin Park, Mark Tehranipoor, Domenic Forte
2023 J jnl
Enabling Security of Heterogeneous Integration: From Supply Chain to In-Field Operations.
IEEE Des. Test
Md Sami Ul Islam Sami, Hadi Mardani Kamali, Farimah Farahmandi, Fahim Rahman, Mark Tehranipoor
2023 A conf
EvoLUTe: Evaluation of Look-Up-Table-based Fine-Grained IP Redaction.
DATE
Rui Guo, M. Sazadur Rahman, Hadi Mardani Kamali, Fahim Rahman, Farimah Farahmandi, Mark Tehranipoor
2023 J jnl
FPIC: A Novel Semantic Dataset for Optical PCB Assurance.
ACM J. Emerg. Technol. Comput. Syst.
Nathan Jessurun, Olivia P. Dizon-Paradis, Jacob Harrison, Shajib Ghosh, Mark Tehranipoor, Damon L. Woodard, Navid Asadizanjani
2023 J jnl
FSMx-Ultra: Finite State Machine Extraction From Gate-Level Netlist for Security Assessment.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Rasheed Kibria, Farimah Farahmandi, Mark Tehranipoor
2023 J jnl
HLock+: A Robust and Low-Overhead Logic Locking at the High-Level Language.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Md Rafid Muttaki, Roshanak Mohammadivojdan, Hadi Mardani Kamali, Mark Tehranipoor, Farimah Farahmandi
2023 A conf
HUnTer: Hardware Underneath Trigger for Exploiting SoC-level Vulnerabilities.
DATE
Sree Ranjani Rajendran, Shams Tarek, Benjamin M. Hicks, Hadi Mardani Kamali, Farimah Farahmandi, Mark Tehranipoor
2023 J jnl
Introduction to the Special Issue on CAD for Security: Pre-silicon Security Sign-off Solutions Through Design Cycle.
ACM J. Emerg. Technol. Comput. Syst.
Farimah Farahmandi, Ankur Srivastava, Giorgio Di Natale, Mark Tehranipoor
2023 J jnl
LLM for SoC Security: A Paradigm Shift.
CoRR
Dipayan Saha, Shams Tarek, Katayoon Yahyaei, Sujan Kumar Saha, Jingbo Zhou, Mark Tehranipoor, Farimah Farahmandi
2023 J jnl
LLM for SoC Security: A Paradigm Shift.
IACR Cryptol. ePrint Arch.
Dipayan Saha, Shams Tarek, Katayoon Yahyaei, Sujan Kumar Saha, Jingbo Zhou, Mark Tehranipoor, Farimah Farahmandi
2023 — conf
Microelectronics Security in CHIPS Era.
ACM Great Lakes Symposium on VLSI
Mark Tehranipoor
2023 B conf
PSC-Watermark: Power Side Channel Based IP Watermarking Using Clock Gates.
ETS
Upoma Das, M. Sazadur Rahman, N. Nalla Anandakumar, Kimia Zamiri Azar, Fahim Rahman, Mark Tehranipoor, Farimah Farahmandi
2023 — conf
QuardTropy: Detecting and Quantifying Unauthorized Information Leakage in Hardware Designs using g-entropy.
DFT
Hasan Al Shaikh, Mohammad Bin Monjil, Kimia Zamiri Azar, Farimah Farahmandi, Mark Tehranipoor, Fahim Rahman
2023 A conf
RTLock: IP Protection using Scan-Aware Logic Locking at RTL.
DATE
Md Rafid Muttaki, Shyvagata Saha, Hadi Mardani Kamali, Fahim Rahman, Mark Tehranipoor, Farimah Farahmandi
2023 J jnl
ReTrustFSM: Toward RTL Hardware Obfuscation-A Hybrid FSM Approach.
IEEE Access
M. Sazadur Rahman, Rui Guo, Hadi Mardani Kamali, Fahim Rahman, Farimah Farahmandi, Mark Tehranipoor
2023 — conf
SHarPen: SoC Security Verification by Hardware Penetration Test.
ASP-DAC
Hasan Al Shaikh, Arash Vafaei, Mridha Md Mashahedur Rahman, Kimia Zamiri Azar, Fahim Rahman, Farimah Farahmandi, Mark Tehranipoor
2023 — conf
SecHLS: Enabling Security Awareness in High-Level Synthesis.
ASP-DAC
Shang Shi, Nitin Pundir, Hadi Mardani Kamali, Mark Tehranipoor, Farimah Farahmandi
2023 A conf
SheLL: Shrinking eFPGA Fabrics for Logic Locking.
DATE
Hadi Mardani Kamali, Kimia Zamiri Azar, Farimah Farahmandi, Mark Tehranipoor
2023 A conf
SoCFuzzer: SoC Vulnerability Detection using Cost Function enabled Fuzz Testing.
DATE
Muhammad Monir Hossain, Arash Vafaei, Kimia Zamiri Azar, Fahim Rahman, Farimah Farahmandi, Mark Tehranipoor
2023 Misc conf
Special Session: CAD for Hardware Security - Promising Directions for Automation of Security Assurance.
VTS
Sohrab Aftabjahani, Mark Tehranipoor, Farimah Farahmandi, Bulbul Ahmed, Ryan Kastner, Francesco Restuccia, Andres Meza, Kaki Ryan, Nicole Fern, Jasper Van Woudenberg, Rajesh Velegalati, Cees-Bart Breunesse, Cynthia Sturton, Calvin Deutschbein
2023 A conf
TaintFuzzer: SoC Security Verification using Taint Inference-enabled Fuzzing.
ICCAD
Muhammad Monir Hossain, Nusrat Farzana Dipu, Kimia Zamiri Azar, Fahim Rahman, Farimah Farahmandi, Mark Tehranipoor
2023 — conf
Towards Secure Classical-Quantum Systems.
HOST
Daniel Volya, Tao Zhang, Nashmin Alam, Mark Tehranipoor, Prabhat Mishra
2023 J jnl
iPROBE: Internal Shielding Approach for Protecting Against Front-Side and Back-Side Probing Attacks.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Minyan Gao, M. Sazadur Rahman, Nitin Varshney, Mark Tehranipoor, Domenic Forte
2022 J jnl
ACED-IT: Assuring Confidential Electronic Design Against Insider Threats in a Zero-Trust Environment.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Andrew Stern, Huanyu Wang, Fahim Rahman, Farimah Farahmandi, Mark Tehranipoor
2022 A conf
ADWIL: A Zero-Overhead Analog Device Watermarking Using Inherent IP Features.
ITC
Upoma Das, Md Rafid Muttaki, Mark Tehranipoor, Farimah Farahmandi
2022 A conf
AIME: Watermarking AI Models by Leveraging Errors.
DATE
Dhwani Mehta, Nurun N. Mondol, Farimah Farahmandi, Mark Tehranipoor
2022 J jnl
Advances in Logic Locking: Past, Present, and Prospects.
IACR Cryptol. ePrint Arch.
Hadi Mardani Kamali, Kimia Zamiri Azar, Farimah Farahmandi, Mark Tehranipoor
2022 J jnl
Analyzing Security Vulnerabilities Induced by High-level Synthesis.
ACM J. Emerg. Technol. Comput. Syst.
Nitin Pundir, Sohrab Aftabjahani, Rosario Cammarota, Mark Tehranipoor, Farimah Farahmandi
2022 J jnl
Detecting Hardware Trojans Using Combined Self-Testing and Imaging.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Nidish Vashistha, Hangwei Lu, Qihang Shi, Damon L. Woodard, Navid Asadizanjani, Mark Tehranipoor
2022 J jnl
Digital Twin for Secure Semiconductor Lifecycle Management: Prospects and Applications.
CoRR
Hasan Al Shaikh, Mohammad Bin Monjil, Shigang Chen, Navid Asadizanjani, Farimah Farahmandi, Mark Tehranipoor, Fahim Rahman
2022 J jnl
Digital Twin for Secure Semiconductor Lifecycle Management: Prospects and Applications.
IACR Cryptol. ePrint Arch.
Hasan Al Shaikh, Mohammad Bin Monjil, Shigang Chen, Farimah Farahmandi, Navid Asadizanjani, Mark Tehranipoor, Fahim Rahman
2022 J jnl
EM Side Channels in Hardware Security: Attacks and Defenses.
IEEE Des. Test
Jiaji He, Xiaolong Guo, Mark Tehranipoor, Apostol Vassilev, Yier Jin
2022 J jnl
FICS PCB X-ray: A dataset for automated printed circuit board inter-layers inspection.
IACR Cryptol. ePrint Arch.
Dhwani Mehta, John True, Olivia P. Dizon-Paradis, Nathan Jessurun, Damon L. Woodard, Navid Asadizanjani, Mark Tehranipoor
2022 J jnl
FPIC: A Novel Semantic Dataset for Optical PCB Assurance.
CoRR
Nathan Jessurun, Olivia P. Dizon-Paradis, Jacob Harrison, Shajib Ghosh, Mark Tehranipoor, Damon L. Woodard, Navid Asadizanjani
2022 J jnl
FSMx-Ultra: Finite State Machine Extraction from Gate-Level Netlist for Security Assessment.
IACR Cryptol. ePrint Arch.
Rasheed Kibria, Farimah Farahmandi, Mark Tehranipoor
2022 Misc conf
FSMx: Finite State Machine Extraction from Flattened Netlist With Application to Security.
VTS
Rasheed Kibria, Nusrat Farzana, Farimah Farahmandi, Mark Tehranipoor
2022 — conf
FTC: A Universal Sensor for Fault Injection Attack Detection.
HOST
Md Rafid Muttaki, Tao Zhang, Mark Tehranipoor, Farimah Farahmandi
2022 J jnl
Fuzz, Penetration, and AI Testing for SoC Security Verification: Challenges and Solutions.
IACR Cryptol. ePrint Arch.
Kimia Zamiri Azar, Muhammad Monir Hossain, Arash Vafaei, Hasan Al Shaikh, Nurun N. Mondol, Fahim Rahman, Mark Tehranipoor, Farimah Farahmandi
2022 — conf
LDTFI: Layout-aware Timing Fault-Injection Attack Assessment Against Differential Fault Analysis.
ISVLSI
Amit Mazumder Shuvo, Nitin Pundir, Jungmin Park, Farimah Farahmandi, Mark Tehranipoor
2022 A* conf
O'clock: lock the clock via clock-gating for SoC IP protection.
DAC
M. Sazadur Rahman, Rui Guo, Hadi Mardani Kamali, Fahim Rahman, Farimah Farahmandi, Mohamed Abdel-Moneum, Mark Tehranipoor
2022 J jnl
On Backside Probing Techniques and Their Emerging Security Threats.
IEEE Des. Test
Liton Kumar Biswas, Leonidas Lavdas, M. Tanjidur Rahman, Mark Tehranipoor, Navid Asadizanjani
2022 J jnl
PQC-SEP: Power Side-channel Evaluation Platform for Post-Quantum Cryptography Algorithms.
IACR Cryptol. ePrint Arch.
Jungmin Park, N. Nalla Anandakumar, Dipayan Saha, Dhwani Mehta, Nitin Pundir, Fahim Rahman, Farimah Farahmandi, Mark Tehranipoor
2022 J jnl
Power Side-Channel Leakage Assessment Framework at Register-Transfer Level.
IEEE Trans. Very Large Scale Integr. Syst.
Nitin Pundir, Jungmin Park, Farimah Farahmandi, Mark Tehranipoor
2022 J jnl
Quantifiable Assurance: From IPs to Platforms.
CoRR
Bulbul Ahmed, Md Kawser Bepary, Nitin Pundir, Mike Borza, Oleg Raikhman, Amit Garg, Dale R. Donchin, Adam Cron, Mohamed Abdel-Moneum, Farimah Farahmandi, Fahim Rahman, Mark Tehranipoor
2022 J jnl
RASCv2: Enabling Remote Access to Side-Channels for Mission Critical and IoT Systems.
ACM Trans. Design Autom. Electr. Syst.
Yunkai Bai, Andrew Stern, Jungmin Park, Mark Tehranipoor, Domenic Forte
2022 A conf
RTL-FSMx: Fast and Accurate Finite State Machine Extraction at the RTL for Security Applications.
ITC
Rasheed Kibria, M. Sazadur Rahman, Farimah Farahmandi, Mark Tehranipoor
2022 J jnl
Real-time instruction-level verification of remote IoT/CPS devices via side channels.
Discov. Internet Things
Yunkai Bai, Jungmin Park, Mark Tehranipoor, Domenic Forte
2022 J jnl
Rethinking Watermark: Providing Proof of IP Ownership in Modern SoCs.
IACR Cryptol. ePrint Arch.
N. Nalla Anandakumar, M. Sazadur Rahman, Mridha Md Mashahedur Rahman, Rasheed Kibria, Upoma Das, Farimah Farahmandi, Fahim Rahman, Mark Tehranipoor
2022 J jnl
Secure Interposer-Based Heterogeneous Integration.
IEEE Des. Test
M. Shafkat M. Khan, Chengjie Xi, Aslam A. Khan, M. Tanjidur Rahman, Mark Tehranipoor, Navid Asadizanjani
2022 J jnl
Secure Physical Design.
IACR Cryptol. ePrint Arch.
Sukanta Dey, Jungmin Park, Nitin Pundir, Dipayan Saha, Amit Mazumder Shuvo, Dhwani Mehta, Navid Asadi, Fahim Rahman, Farimah Farahmandi, Mark Tehranipoor
2022 — conf
Security Properties Driven Pre-Silicon Laser Fault Injection Assessment.
HOST
Nitin Pundir, Henian Li, Lang Lin, Norman Chang, Farimah Farahmandi, Mark Tehranipoor
2022 J jnl
SoFI: Security Property-Driven Vulnerability Assessments of ICs Against Fault-Injection Attacks.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Huanyu Wang, Henian Li, Fahim Rahman, Mark Tehranipoor, Farimah Farahmandi
2022 J jnl
ToSHI - Towards Secure Heterogeneous Integration: Security Risks, Threat Assessment, and Assurance.
IACR Cryptol. ePrint Arch.
Nidish Vashistha, Md Latifur Rahman, Md. Saad Ul Haque, Azim Uddin, Md Sami Ul Islam Sami, Amit Mazumder Shuo, Paul E. Calzada, Farimah Farahmandi, Navid Asadizanjani, Fahim Rahman, Mark Tehranipoor
2022 — conf
Warm Up before Circuit De-obfuscation? An Exploration through Bounded-Model-Checkers.
HOST
Kimia Zamiri Azar, Hadi Mardani Kamali, Farimah Farahmandi, Mark Tehranipoor
2022 J jnl
eChain: A Blockchain-Enabled Ecosystem for Electronic Device Authenticity Verification.
IEEE Trans. Consumer Electron.
Nidish Vashistha, Muhammad Monir Hossain, Md Rakib Shahriar, Farimah Farahmandi, Fahim Rahman, Mark Tehranipoor
2021 J jnl
A Metal-Via Resistance Based Physically Unclonable Function With Backend Incremental ADC.
IEEE Trans. Circuits Syst. I Regul. Pap.
Beomsoo Park, Domenic Forte, Mark Tehranipoor, Nima Maghari
2021 J jnl
An End-to-End Bitstream Tamper Attack Against Flip-Chip FPGAs.
IACR Cryptol. ePrint Arch.
Fahim Rahman, Farimah Farahmandi, Mark Tehranipoor
2021 A conf
AutoMap: Automated Mapping of Security Properties Between Different Levels of Abstraction in Design Flow.
ICCAD
Bulbul Ahmed, Fahim Rahman, Nick Hooten, Farimah Farahmandi, Mark Tehranipoor
2021 A conf
BOFT: Exploitable Buffer Overflow Detection by Information Flow Tracking.
DATE
Muhammad Monir Hossain, Farimah Farahmandi, Mark Tehranipoor, Fahim Rahman
2021 J jnl
CONCEALING-Gate: Optical Contactless Probing Resilient Design.
ACM J. Emerg. Technol. Comput. Syst.
M. Tanjidur Rahman, Nusrat Farzana, Dhwani Mehta, Shahin Tajik, Mark Tehranipoor, Navid Asadizanjani
2021 J jnl
FPGA-based Physical Unclonable Functions: A comprehensive overview of theory and architectures.
Integr.
N. Nalla Anandakumar, Mohammad S. Hashmi, Mark Tehranipoor
2021 — conf
HEXON: Protecting Firmware Using Hardware-Assisted Execution-Level Obfuscation.
ISVLSI
Muhammad Monir Hossain, Sajeed Mohammad, Jason Vosatka, Jeffery S. Allen, Monica Allen, Farimah Farahmandi, Fahim Rahman, Mark Tehranipoor
2021 A* conf
HLock: Locking IPs at the High-Level Language.
DAC
Md Rafid Muttaki, Roshanak Mohammadivojdan, Mark Tehranipoor, Farimah Farahmandi
2021 J jnl
Hardware Trust and Assurance through Reverse Engineering: A Tutorial and Outlook from Image Analysis and Machine Learning Perspectives.
ACM J. Emerg. Technol. Comput. Syst.
Ulbert J. Botero, Ronald Wilson, Hangwei Lu, Mir Tanjidur Rahman, Mukhil A. Mallaiyan, Fatemeh Ganji, Navid Asadizanjani, Mark Tehranipoor, Damon L. Woodard, Domenic Forte
2021 A* conf
Invited: End-to-End Secure SoC Lifecycle Management.
DAC
Md Sami Ul Islam Sami, Fahim Rahman, Farimah Farahmandi, Adam Cron, Mike Borza, Mark Tehranipoor
2021 A conf
LL-ATPG: Logic-Locking Aware Test Using Valet Keys in an Untrusted Environment.
ITC
M. Sazadur Rahman, Henian Li, Rui Guo, Fahim Rahman, Farimah Farahmandi, Mark Tehranipoor
2021 J jnl
On malicious implants in PCBs throughout the supply chain.
Integr.
Jacob Harrison, Navid Asadizanjani, Mark Tehranipoor
2021 — conf
POCA: First Power-on Chip Authentication in Untrusted Foundry and Assembly.
HOST
Md Sami Ul Islam Sami, Fahim Rahman, Adam Cron, Dale R. Donchin, Mike Borza, Farimah Farahmandi, Mark Tehranipoor
2021 A* conf
PSC-TG: RTL Power Side-Channel Leakage Assessment with Test Pattern Generation.
DAC
Tao Zhang, Jungmin Park, Mark Tehranipoor, Farimah Farahmandi
2021 J jnl
Quantifiable Assurance: From IPs to Platforms.
IACR Cryptol. ePrint Arch.
Bulbul Ahmed, Md Kawser Bepary, Nitin Pundir, Mike Borza, Oleg Raikhman, Amit Garg, Dale R. Donchin, Adam Cron, Mohamed A. Abdelmoneum, Farimah Farahmandi, Fahim Rahman, Mark Tehranipoor
2021 B conf
RHAT: Efficient RowHammer-Aware Test for Modern DRAM Modules.
ETS
Mohammad Farmani, Mark Tehranipoor, Fahim Rahman
2021 J jnl
Rock'n'roll PUFs: crafting provably secure pufs from less secure ones (extended version).
J. Cryptogr. Eng.
Fatemeh Ganji, Shahin Tajik, Pascal Stauss, Jean-Pierre Seifert, Mark Tehranipoor, Domenic Forte
2021 Misc conf
SAIF: Automated Asset Identification for Security Verification at the Register Transfer Level.
VTS
Nusrat Farzana, Avinash Ayalasomayajula, Fahim Rahman, Farimah Farahmandi, Mark Tehranipoor
2021 — conf
Secure High-Level Synthesis: Challenges and Solutions.
ISQED
Nitin Pundir, Farimah Farahmandi, Mark Tehranipoor
2021 J jnl
Security Assessment of Dynamically Obfuscated Scan Chain Against Oracle-guided Attacks.
ACM Trans. Design Autom. Electr. Syst.
M. Sazadur Rahman, Adib Nahiyan, Fahim Rahman, Saverio Fazzari, Kenneth Plaks, Farimah Farahmandi, Domenic Forte, Mark Tehranipoor
2021 J jnl
SoC Security Properties and Rules.
IACR Cryptol. ePrint Arch.
Nusrat Farzana, Farimah Farahmandi, Mark Tehranipoor
2021 Misc conf
Special Session: CAD for Hardware Security - Automation is Key to Adoption of Solutions.
VTS
Sohrab Aftabjahani, Ryan Kastner, Mark Tehranipoor, Farimah Farahmandi, Jason Oberg, Anders Nordstrom, Nicole Fern, Alric Althoff
2021 A conf
SymbA: Symbolic Execution at C-level for Hardware Trojan Activation.
ITC
Arash Vafaei, Nick Hooten, Mark Tehranipoor, Farimah Farahmandi
2021 J jnl
What is All the FaaS About? - Remote Exploitation of FPGA-as-a-Service Platforms.
IACR Cryptol. ePrint Arch.
Nitin Pundir, Fahim Rahman, Farimah Farahmandi, Mark Tehranipoor
2020 J jnl
A Physical Design Flow Against Front-Side Probing Attacks by Internal Shielding.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Huanyu Wang, Qihang Shi, Adib Nahiyan, Domenic Forte, Mark Tehranipoor
2020 J jnl
CAS-Lock: A Security-Corruptibility Trade-off Resilient Logic Locking Scheme.
IACR Trans. Cryptogr. Hardw. Embed. Syst.
Bicky Shakya, Xiaolin Xu, Mark Tehranipoor, Domenic Forte
2020 J jnl
Defeating CAS-Unlock.
IACR Cryptol. ePrint Arch.
Bicky Shakya, Xiaolin Xu, Mark Tehranipoor, Domenic Forte
2020 J jnl
Defense-in-depth: A recipe for logic locking to prevail.
Integr.
M. Tanjidur Rahman, M. Sazadur Rahman, Huanyu Wang, Shahin Tajik, Waleed Khalil, Farimah Farahmandi, Domenic Forte, Navid Asadizanjani, Mark Tehranipoor
2020 J jnl
EMFORCED: EM-Based Fingerprinting Framework for Remarked and Cloned Counterfeit IC Detection Using Machine Learning Classification.
IEEE Trans. Very Large Scale Integr. Syst.
Andrew Stern, Ulbert Botero, Fahim Rahman, Domenic Forte, Mark Tehranipoor
2020 J jnl
FICS-PCB: A Multi-Modal Image Dataset for Automated Printed Circuit Board Visual Inspection.
IACR Cryptol. ePrint Arch.
Hangwei Lu, Dhwani Mehta, Olivia P. Paradis, Navid Asadizanjani, Mark Tehranipoor, Damon L. Woodard
2020 J jnl
Hardware Trust and Assurance through Reverse Engineering: A Survey and Outlook from Image Analysis and Machine Learning Perspectives.
CoRR
Ulbert J. Botero, Ronald Wilson, Hangwei Lu, Mir Tanjidur Rahman, Mukhil Azhagan Mallaiyan Sathiaseelan, Fatemeh Ganji, Navid Asadizanjani, Mark Tehranipoor, Damon L. Woodard, Domenic Forte
2020 J jnl
Hidden in Plaintext: An Obfuscation-based Countermeasure against FPGA Bitstream Tampering Attacks.
ACM Trans. Design Autom. Electr. Syst.
Tamzidul Hoque, Kai Yang, Robert Karam, Shahin Tajik, Domenic Forte, Mark Tehranipoor, Swarup Bhunia
2020 J jnl
Interconnect-Based PUF With Signature Uniqueness Enhancement.
IEEE Trans. Very Large Scale Integr. Syst.
Liting Yu, Xiaoxiao Wang, Fahim Rahman, Mark Tehranipoor
2020 J jnl
Leveraging Side-Channel Information for Disassembly and Security.
ACM J. Emerg. Technol. Comput. Syst.
Jungmin Park, Fahim Rahman, Apostol Vassilev, Domenic Forte, Mark Tehranipoor
2020 — conf
On Optical Attacks Making Logic Obfuscation Fragile.
ITC-Asia
Leonidas Lavdas, M. Tanjidur Rahman, Mark Tehranipoor, Navid Asadizanjani
2020 J jnl
Permutation Network De-obfuscation: A Delay-based Attack and Countermeasure Investigation.
ACM J. Emerg. Technol. Comput. Syst.
Zimu Guo, Sreeja Chowdhury, Mark Tehranipoor, Domenic Forte
2020 J jnl
QEC: A Quantum Entropy Chip and Its Applications.
IEEE Trans. Very Large Scale Integr. Syst.
Jungmin Park, Seongjoon Cho, Taejin Lim, Mark Tehranipoor
2020 J jnl
RanStop: A Hardware-assisted Runtime Crypto-Ransomware Detection Technique.
CoRR
Nitin Pundir, Mark Tehranipoor, Fahim Rahman
2020 J jnl
SCRIPT: A CAD Framework for Power Side-channel Vulnerability Assessment Using Information Flow Tracking and Pattern Generation.
ACM Trans. Design Autom. Electr. Syst.
Adib Nahiyan, Jungmin Park, Miao Tony He, Yousef Iskander, Farimah Farahmandi, Domenic Forte, Mark Tehranipoor
2020 A conf
SPARTA: A Laser Probing Approach for Trojan Detection.
ITC
Andrew Stern, Dhwani Mehta, Shahin Tajik, Farimah Farahmandi, Mark Tehranipoor
2020 Misc conf
SeRFI: Secure Remote FPGA Initialization in an Untrusted Environment.
VTS
Adam Duncan, Adib Nahiyan, Fahim Rahman, Grant Skipper, Martin Swany, Andrew Lukefahr, Farimah Farahmandi, Mark Tehranipoor
2020 J jnl
Soft-HaT: Software-Based Silicon Reprogramming for Hardware Trojan Implementation.
ACM Trans. Design Autom. Electr. Syst.
Md. Mahbub Alam, Adib Nahiyan, Mehdi Sadi, Domenic Forte, Mark Tehranipoor
2020 J jnl
Special Issue: 2019 PAINE Conference - Physical Assurance and Inspection of Electronics.
J. Hardw. Syst. Secur.
Navid Asadi, Mark Tehranipoor
2020 J jnl
The Big Hack Explained: Detection and Prevention of PCB Supply Chain Implants.
ACM J. Emerg. Technol. Comput. Syst.
Dhwani Mehta, Hangwei Lu, Olivia P. Paradis, Mukhil Azhagan Mallaiyan Sathiaseelan, M. Tanjidur Rahman, Yousef Iskander, Praveen Chawla, Damon L. Woodard, Mark Tehranipoor, Navid Asadizanjani
2020 — conf
The Key is Left under the Mat: On the Inappropriate Security Assumption of Logic Locking Schemes.
HOST
M. Tanjidur Rahman, Shahin Tajik, M. Sazadur Rahman, Mark Tehranipoor, Navid Asadizanjani
2020 — conf
The Pursuit of Happiness: Establishing Hardware Root-of-Trust for Cyber Security.
ASHES@CCS
Mark Tehranipoor
2019 — conf
A Metal-Via Resistance Based Physically Unclonable Function with 1.18% Native Instability.
CICC
Beomsoo Park, Mark Tehranipoor, Domenic Forte, Nima Maghari
2019 J jnl
Covert Gates: Protecting Integrated Circuits with Undetectable Camouflaging.
IACR Trans. Cryptogr. Hardw. Embed. Syst.
Bicky Shakya, Hao-Ting Shen, Mark Tehranipoor, Domenic Forte
2019 J jnl
Defense-in-Depth: A Recipe for Logic Locking to Prevail.
CoRR
M. Tanjidur Rahman, M. Sazadur Rahman, Huanyu Wang, Shahin Tajik, Waleed Khalil, Farimah Farahmandi, Domenic Forte, Navid Asadizanjani, Mark Tehranipoor
2019 J jnl
Dynamically Obfuscated Scan Chain To Resist Oracle-Guided Attacks On Logic Locked Design.
IACR Cryptol. ePrint Arch.
M. Sazadur Rahman, Adib Nahiyan, Sarah Amir, Fahim Rahman, Farimah Farahmandi, Domenic Forte, Mark Tehranipoor
2019 J jnl
EOP: An Encryption-Obfuscation Solution for Protecting PCBs Against Tampering and Reverse Engineering.
CoRR
Zimu Guo, Xiaolin Xu, Mark Tehranipoor, Domenic Forte
2019 J jnl
Editorial TVLSI Positioning - Continuing and Accelerating an Upward Trajectory.
IEEE Trans. Very Large Scale Integr. Syst.
Massimo Alioto, Magdy S. Abadir, Tughrul Arslan, Chirn Chye Boon, Andreas Burg, Chip-Hong Chang, Meng-Fan Chang, Yao-Wen Chang, Poki Chen, Pasquale Corsonello, Paolo Crovetti, Shiro Dosho, Rolf Drechsler, Ibrahim Abe M. Elfadel, Ruonan Han, Masanori Hashimoto, Chun-Huat Heng, Deukhyoun Heo, Tsung-Yi Ho, Houman Homayoun, Yuh-Shyan Hwang, Ajay Joshi, Rajiv V. Joshi, Tanay Karnik, Chulwoo Kim, Tony Tae-Hyoung Kim, Jaydeep P. Kulkarni, Volkan Kursun, Yoonmyung Lee, Hai Helen Li, Huawei Li, Prabhat Mishra, Baker Mohammad, Mehran Mozaffari Kermani, Makoto Nagata, Koji Nii, Partha Pratim Pande, Bipul C. Paul, Vasilis F. Pavlidis, José Pineda de Gyvez, Ioannis Savidis, Patrick Schaumont, Fabio Sebastiano, Anirban Sengupta, Mingoo Seok, Mircea R. Stan, Mark Tehranipoor, Aida Todri-Sanial, Marian Verhelst, Valerio Vignoli, Xiaoqing Wen, Jiang Xu, Wei Zhang, Zhengya Zhang, Jun Zhou, Mark Zwolinski, Stacey Weber
2019 J jnl
Electronics Supply Chain Integrity Enabled by Blockchain.
ACM Trans. Design Autom. Electr. Syst.
Xiaolin Xu, Fahim Rahman, Bicky Shakya, Apostol Vassilev, Domenic Forte, Mark Tehranipoor
2019 J jnl
Emerging Attacks and Solutions for Secure Hardware in the Internet of Things.
IEEE Trans. Dependable Secur. Comput.
Chip-Hong Chang, Marten van Dijk, Ulrich Rührmair, Mark Tehranipoor
2019 — conf
FLATS: Filling Logic and Testing Spatially for FPGA Authentication and Tamper Detection.
HOST
Adam Duncan, Grant Skipper, Andrew Stern, Adib Nahiyan, Fahim Rahman, Andrew Lukefahr, Mark Tehranipoor, Martin Swany
2019 A conf
FPGA Bitstream Security: A Day in the Life.
ITC
Adam Duncan, Fahim Rahman, Andrew Lukefahr, Farimah Farahmandi, Mark Tehranipoor
2019 A conf
IEEE International Symposium on Hardware Oriented Security and Trust (HOST): Past, Present, and Future.
ITC
Domenic Forte, Swarup Bhunia, Ramesh Karri, Jim Plusquellic, Mark Tehranipoor
2019 — conf
LPN-based Device Authentication Using Resistive Memory.
ACM Great Lakes Symposium on VLSI
Md Tanvir Arafin, Hao-Ting Shen, Mark Tehranipoor, Gang Qu
2019 J jnl
Obfuscated Built-In Self-Authentication With Secure and Efficient Wire-Lifting.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Qihang Shi, Mark Tehranipoor, Domenic Forte
2019 J jnl
Probing Assessment Framework and Evaluation of Antiprobing Solutions.
IEEE Trans. Very Large Scale Integr. Syst.
Huanyu Wang, Qihang Shi, Domenic Forte, Mark Tehranipoor
2019 — conf
QIF-Verilog: Quantitative Information-Flow based Hardware Description Languages for Pre-Silicon Security Assessment.
HOST
Xiaolong Guo, Raj Gautam Dutta, Jiaji He, Mark Tehranipoor, Yier Jin
2019 C conf
RAM-Jam: Remote Temperature and Voltage Fault Attack on FPGAs using Memory Collisions.
FDTC
Md. Mahbub Alam, Shahin Tajik, Fatemeh Ganji, Mark Tehranipoor, Domenic Forte
2019 Misc conf
RTL-PSC: Automated Power Side-Channel Leakage Assessment at Register-Transfer Level.
VTS
Miao Tony He, Jungmin Park, Adib Nahiyan, Apostol Vassilev, Yier Jin, Mark Tehranipoor
2019 J jnl
RTL-PSC: Automated Power Side-Channel Leakage Assessment at Register-Transfer Level.
CoRR
Miao Tony He, Jungmin Park, Adib Nahiyan, Apostol Vassilev, Yier Jin, Mark Tehranipoor
2019 J jnl
Recycled FPGA Detection Using Exhaustive LUT Path Delay Characterization and Voltage Scaling.
IEEE Trans. Very Large Scale Integr. Syst.
Md. Mahbub Alam, Mark Tehranipoor, Domenic Forte
2019 — conf
Rock'n'roll PUFs: Crafting Provably Secure PUFs from Less Secure Ones.
PROOFS
Fatemeh Ganji, Shahin Tajik, Pascal Stauss, Jean-Pierre Seifert, Domenic Forte, Mark Tehranipoor
2019 A conf
SCR-QRNG: Side-Channel Resistant Design using Quantum Random Number Generator.
ICCAD
Jungmin Park, Seongjoon Cho, Taejin Lim, Swarup Bhunia, Mark Tehranipoor
2019 J jnl
Security-Aware FSM Design Flow for Identifying and Mitigating Vulnerabilities to Fault Attacks.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Adib Nahiyan, Farimah Farahmandi, Prabhat Mishra, Domenic Forte, Mark Tehranipoor
2019 A conf
SoC Security Verification using Property Checking.
ITC
Nusrat Farzana, Fahim Rahman, Mark Tehranipoor, Farimah Farahmandi
2019 J jnl
Standards for Hardware Security.
GetMobile Mob. Comput. Commun.
Ujjwal Guin, Navid Asadizanjani, Mark Tehranipoor
2019 J jnl
System-Level Counterfeit Detection Using On-Chip Ring Oscillator Array.
IEEE Trans. Very Large Scale Integr. Syst.
Xiaoxiao Wang, Yueying Han, Mark Tehranipoor
2019 J jnl
Theoretical and Practical Approaches for Hardness Amplification of PUFs.
IACR Cryptol. ePrint Arch.
Fatemeh Ganji, Shahin Tajik, Pascal Stauss, Jean-Pierre Seifert, Domenic Forte, Mark Tehranipoor
2019 J jnl
Unlock Your Heart: Next Generation Biometric in Resource-Constrained Healthcare Systems and IoT.
IEEE Access
Nima Karimian, Mark Tehranipoor, Damon L. Woodard, Domenic Forte
2019 J jnl
Upgrade/Downgrade: Efficient and Secure Legacy Electronic System Replacement.
IEEE Des. Test
Ulbert J. Botero, Mark Tehranipoor, Domenic Forte
2018 — conf
A Comprehensive Analysis on Vulnerability of Active Shields to Tilted Microprobing Attacks.
AsianHOST
Qihang Shi, Huanyu Wang, Navid Asadizanjani, Mark Tehranipoor, Domenic Forte
2018 J jnl
An On-Chip Dynamically Obfuscated Wrapper for Protecting Supply Chain Against IP and IC Piracies.
IEEE Trans. Very Large Scale Integr. Syst.
Dongrong Zhang, Xiaoxiao Wang, Md. Tauhidur Rahman, Mark Tehranipoor
2018 J jnl
Bimodal Oscillation as a Mechanism for Autonomous Majority Voting in PUFs.
IEEE Trans. Very Large Scale Integr. Syst.
Xiaolin Xu, Shahrzad Keshavarz, Domenic Forte, Mark Tehranipoor, Daniel E. Holcomb
2018 — conf
CIPA: Concurrent IC and PCB Authentication Using On-chip Ring Oscillator Array.
ATS
Yueying Han, Xiaoxiao Wang, Mark Tehranipoor
2018 J jnl
Challenges and Opportunities in Analog and Mixed Signal (AMS) Integrated Circuit (IC) Security.
J. Hardw. Syst. Secur.
Md. Mahbub Alam, Sreeja Chowdhury, Beomsoo Park, David Joseph Munzer, Nima Maghari, Mark Tehranipoor, Domenic Forte
2018 J jnl
Detecting Hardware Trojans Inserted by Untrusted Foundry Using Physical Inspection and Advanced Image Processing.
J. Hardw. Syst. Secur.
Nidish Vashistha, M. Tanjidur Rahman, Hao-Ting Shen, Damon L. Woodard, Navid Asadizanjani, Mark Tehranipoor
2018 J jnl
Development and Evaluation of Hardware Obfuscation Benchmarks.
J. Hardw. Syst. Secur.
Sarah Amir, Bicky Shakya, Xiaolin Xu, Yier Jin, Swarup Bhunia, Mark Tehranipoor, Domenic Forte
2018 A conf
Device attestation: Past, present, and future.
DATE
Orlando Arias, Fahim Rahman, Mark Tehranipoor, Yier Jin
2018 A conf
EMFORCED: EM-based Fingerprinting Framework for Counterfeit Detection with Demonstration on Remarked and Cloned ICs.
ITC
Andrew Stern, Ulbert Botero, Bicky Shakya, Hao-Ting Shen, Domenic Forte, Mark Tehranipoor
2018 J jnl
Hardware Trojan Detection through Information Flow Security Verification.
CoRR
Adib Nahiyan, Mehdi Sadi, Rahul Vittal, Gustavo K. Contreras, Domenic Forte, Mark Tehranipoor
2018 — conf
Hardware virtualization for protection against power analysis attack.
HOST
Kai Yang, Jungmin Park, Mark Tehranipoor, Swarup Bhunia
2018 J jnl
Hardware-Enabled Pharmaceutical Supply Chain Security.
ACM Trans. Design Autom. Electr. Syst.
Kun Yang, Hao-Ting Shen, Domenic Forte, Swarup Bhunia, Mark Tehranipoor
2018 J jnl
LDPUF: Exploiting DRAM Latency Variations to Generate Robust Device Signatures.
CoRR
Bashir M. Sabquat Bahar Talukder, Biswajit Ray, Mark Tehranipoor, Domenic Forte, Md. Tauhidur Rahman
2018 — conf
Physical Inspection & Attacks: New Frontier in Hardware Security.
IVSW
M. Tanjidur Rahman, Qihang Shi, Shahin Tajik, Hao-Ting Shen, Damon L. Woodard, Mark Tehranipoor, Navid Asadizanjani
2018 A* conf
Power-based side-channel instruction-level disassembler.
DAC
Jungmin Park, Xiaolin Xu, Yier Jin, Domenic Forte, Mark Tehranipoor
2018 J jnl
ReSC: An RFID-Enabled Solution for Defending IoT Supply Chain.
ACM Trans. Design Autom. Electr. Syst.
Kun Yang, Domenic Forte, Mark Tehranipoor
2018 — conf
Robust Timing Attack Countermeasure on Virtual Hardware.
ISVLSI
Kai Yang, Jungmin Park, Mark Tehranipoor, Swarup Bhunia
2018 — conf
Robust, low-cost, and accurate detection of recycled ICs using digital signatures.
HOST
Mahabubul Alam, Sreeja Chowdhury, Mark Tehranipoor, Ujjwal Guin
2018 J jnl
SCARe: An SRAM-Based Countermeasure Against IC Recycling.
IEEE Trans. Very Large Scale Integr. Syst.
Zimu Guo, Xiaolin Xu, Md. Tauhidur Rahman, Mark Tehranipoor, Domenic Forte
2018 J jnl
Secure Scan and Test Using Obfuscation Throughout Supply Chain.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Xiaoxiao Wang, Dongrong Zhang, Miao Tony He, Donglin Su, Mark Tehranipoor
2018 J jnl
Secure and Reliable Biometric Access Control for Resource-Constrained Systems and IoT.
CoRR
Nima Karimian, Zimu Guo, Fatemeh Tehranipoor, Damon L. Woodard, Mark Tehranipoor, Domenic Forte
2018 J jnl
System-on-Chip Platform Security Assurance: Architecture and Validation.
Proc. IEEE
Sandip Ray, Eric Peeters, Mark Tehranipoor, Swarup Bhunia
2018 J jnl
UCR: An Unclonable Environmentally Sensitive Chipless RFID Tag For Protecting Supply Chain.
ACM Trans. Design Autom. Electr. Syst.
Kun Yang, Ulbert Botero, Hao-Ting Shen, Damon L. Woodard, Domenic Forte, Mark Tehranipoor
2017 — conf
A split manufacturing approach for unclonable chipless RFIDs for pharmaceutical supply chain security.
AsianHOST
Kun Yang, Ulbert Botero, Hao-Ting Shen, Domenic Forte, Mark Tehranipoor
2017 — conf
A stochastic all-digital weak physically unclonable function for analog/mixed-signal applications.
HOST
Troy Bryant, Sreeja Chowdhury, Domenic Forte, Mark Tehranipoor, Nima Maghari
2017 A* conf
ASHES 2017: Workshop on Attacks and Solutions in Hardware Security.
CCS
Chip-Hong Chang, Marten van Dijk, Farinaz Koushanfar, Ulrich Rührmair, Mark Tehranipoor
2017 — conf
ATAVE: A framework for automatic timing attack vulnerability evaluation.
MWSCAS
Jungmin Park, Massimiliano Corba, Antonio E. de la Sema, Richard L. Vigeant, Mark Tehranipoor, Swarup Bhunia
2017 — conf
Aging resilient RO PUF with increased reliability in FPGA.
ReConFig
Sreeja Chowdhury, Xiaolin Xu, Mark Tehranipoor, Domenic Forte
2017 J jnl
An Access Mechanism for Embedded Sensors in Modern SoCs.
J. Electron. Test.
Miao Tony He, Mark Tehranipoor
2017 J jnl
Benchmarking of Hardware Trojans and Maliciously Affected Circuits.
J. Hardw. Syst. Secur.
Bicky Shakya, Miao Tony He, Hassan Salmani, Domenic Forte, Swarup Bhunia, Mark Tehranipoor
2017 J jnl
CDTA: A Comprehensive Solution for Counterfeit Detection, Traceability, and Authentication in the IoT Supply Chain.
ACM Trans. Design Autom. Electr. Syst.
Kun Yang, Domenic Forte, Mark Tehranipoor
2017 — conf
Comparative Analysis of Hardware Obfuscation for IP Protection.
ACM Great Lakes Symposium on VLSI
Sarah Amir, Bicky Shakya, Domenic Forte, Mark Tehranipoor, Swarup Bhunia
2017 — conf
DOST: Dynamically obfuscated wrapper for split test against IC piracy.
AsianHOST
Xiaoxiao Wang, Yueyu Guo, Tauhid Ramhan, Dongrong Zhang, Mark Tehranipoor
2017 J jnl
Design of Reliable SoCs With BIST Hardware and Machine Learning.
IEEE Trans. Very Large Scale Integr. Syst.
Mehdi Sadi, Gustavo K. Contreras, Jifeng Chen, LeRoy Winemberg, Mark Tehranipoor
2017 C conf
Design of a digital IP for 3D-IC die-to-die clock synchronization.
ISCAS
Mehdi Sadi, Sukeshwar Kannan, Luke England, Mark Tehranipoor
2017 Misc conf
Dynamically obfuscated scan for protecting IPs against scan-based attacks throughout supply chain.
VTS
Dongrong Zhang, Miao Tony He, Xiaoxiao Wang, Mark Tehranipoor
2017 J jnl
Editorial for the Introductory Issue of the
J. Hardw. Syst. Secur.
Swarup Bhunia, Mark Tehranipoor
2017 J jnl
Editorial.
IEEE Trans. Very Large Scale Integr. Syst.
Krishnendu Chakrabarty, Massimo Alioto, Bevan M. Baas, Chirn Chye Boon, Meng-Fan Chang, Naehyuck Chang, Yao-Wen Chang, Chip-Hong Chang, Shih-Chieh Chang, Poki Chen, Masud H. Chowdhury, Pasquale Corsonello, Ibrahim Abe M. Elfadel, Said Hamdioui, Masanori Hashimoto, Tsung-Yi Ho, Houman Homayoun, Yuh-Shyan Hwang, Rajiv V. Joshi, Tanay Karnik, Mehran Mozaffari Kermani, Chulwoo Kim, Tae-Hyoung Kim, Jaydeep P. Kulkarni, Eren Kursun, Erik Larsson, Hai (Helen) Li, Huawei Li, Patrick P. Mercier, Prabhat Mishra, Makoto Nagata, Arun S. Natarajan, Koji Nii, Partha Pratim Pande, Ioannis Savidis, Mingoo Seok, Sheldon X.-D. Tan, Mark Tehranipoor, Aida Todri-Sanial, Miroslav N. Velev, Xiaoqing Wen, Jiang Xu, Wei Zhang, Zhengya Zhang, Stacey Weber Jackson
2017 A* conf
FFD: A Framework for Fake Flash Detection.
DAC
Zimu Guo, Xiaolin Xu, Mark Tehranipoor, Domenic Forte
2017 A conf
Hardware trojan detection through information flow security verification.
ITC
Adib Nahiyan, Mehdi Sadi, Rahul Vittal, Gustavo K. Contreras, Domenic Forte, Mark Tehranipoor
2017 — conf
Hardware-Assisted Cybersecurity for IoT Devices.
MTV
Fahim Rahman, Mohammad Farmani, Mark Tehranipoor, Yier Jin
2017 J jnl
Highly Reliable Key Generation From Electrocardiogram (ECG).
IEEE Trans. Biomed. Eng.
Nima Karimian, Zimu Guo, Mark Tehranipoor, Domenic Forte
2017 Misc conf
Human recognition from photoplethysmography (PPG) based on non-fiducial features.
ICASSP
Nima Karimian, Zimu Guo, Mark Tehranipoor, Domenic Forte
2017 J jnl
Introduction to Cyber-Physical System Security: A Cross-Layer Perspective.
IEEE Trans. Multi Scale Comput. Syst.
Jacob Wurm, Yier Jin, Yang Liu, Shiyan Hu, Kenneth Heffner, Fahim Rahman, Mark Tehranipoor
2017 — conf
MPA: Model-assisted PCB attestation via board-level RO and temperature compensation.
AsianHOST
Zimu Guo, Xiaolin Xu, Mark Tehranipoor, Domenic Forte
2017 — conf
MUTARCH: Architectural diversity for FPGA device and IP security.
ASP-DAC
Robert Karam, Tamzidul Hoque, Sandip Ray, Mark Tehranipoor, Swarup Bhunia
2017 — conf
Non-fiducial PPG-based authentication for healthcare application.
BHI
Nima Karimian, Mark Tehranipoor, Domenic Forte
2017 A conf
Novel Bypass Attack and BDD-based Tradeoff Analysis Against All Known Logic Locking Attacks.
CHES
Xiaolin Xu, Bicky Shakya, Mark Tehranipoor, Domenic Forte
2017 J jnl
Novel Bypass Attack and BDD-based Tradeoff Analysis Against all Known Logic Locking Attacks.
IACR Cryptol. ePrint Arch.
Xiaolin Xu, Bicky Shakya, Mark Tehranipoor, Domenic Forte
2017 J jnl
Obfuscation-Based Protection Framework against Printed Circuit Boards Unauthorized Operation and Reverse Engineering.
ACM Trans. Design Autom. Electr. Syst.
Zimu Guo, Jia Di, Mark Tehranipoor, Domenic Forte
2017 J jnl
Poly-Si-Based Physical Unclonable Functions.
IEEE Trans. Very Large Scale Integr. Syst.
Hao-Ting Shen, Fahim Rahman, Bicky Shakya, Xiaolin Xu, Mark Tehranipoor, Domenic Forte
2017 J jnl
Probing Attacks on Integrated Circuits: Challenges and Research Opportunities.
IEEE Des. Test
Huanyu Wang, Domenic Forte, Mark Tehranipoor, Qihang Shi
2017 J jnl
SMA: A System-Level Mutual Authentication for Protecting Electronic Hardware and Firmware.
IEEE Trans. Dependable Secur. Comput.
Ujjwal Guin, Swarup Bhunia, Domenic Forte, Mark Tehranipoor
2017 — conf
Securing Split Manufactured ICs with Wire Lifting Obfuscated Built-In Self-Authentication.
ACM Great Lakes Symposium on VLSI
Qihang Shi, Kan Xiao, Domenic Forte, Mark Tehranipoor
2017 J jnl
Security Beyond CMOS: Fundamentals, Applications, and Roadmap.
IEEE Trans. Very Large Scale Integr. Syst.
Fahim Rahman, Bicky Shakya, Xiaolin Xu, Domenic Forte, Mark Tehranipoor
2017 — conf
Security vulnerability analysis of design-for-test exploits for asset protection in SoCs.
ASP-DAC
Gustavo K. Contreras, Adib Nahiyan, Swarup Bhunia, Domenic Forte, Mark Tehranipoor
2017 J jnl
SoC Speed Binning Using Machine Learning and On-Chip Slack Sensors.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Mehdi Sadi, Sukeshwar Kannan, LeRoy Winemberg, Mark Tehranipoor
2017 A* conf
Standardizing Bad Cryptographic Practice: A Teardown of the IEEE Standard for Protecting Electronic-design Intellectual Property.
CCS
Animesh Chhotaray, Adib Nahiyan, Thomas Shrimpton, Domenic Forte, Mark Tehranipoor
2017 J jnl
Systematic Correlation and Cell Neighborhood Analysis of SRAM PUF for Robust and Unique Key Generation.
J. Hardw. Syst. Secur.
Md. Tauhidur Rahman, Alison Hosey, Zimu Guo, Jackson Carroll, Domenic Forte, Mark Tehranipoor
2017 J jnl
TRO: An On-Chip Ring Oscillator-Based GHz Transient IR-Drop Monitor.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Xiaoxiao Wang, Pengyuan Jiao, Mehdi Sadi, Donglin Su, LeRoy Winemberg, Mark Tehranipoor
2017 J jnl
TSensors Vision, Infrastructure and Security Challenges in Trillion Sensor Era.
J. Hardw. Syst. Secur.
Mahabubul Alam, Mark Tehranipoor, Ujjwal Guin
2017 J jnl
Test-Point Insertion Efficiency Analysis for LBIST in High-Assurance Applications.
IEEE Trans. Very Large Scale Integr. Syst.
Miao Tony He, Gustavo K. Contreras, Dat Tran, LeRoy Winemberg, Mark Tehranipoor
2017 — conf
iPUF: Interconnect PUF with Self-Masking Circuit for Performance Enhancement.
MTV
Liting Yu, Xiaoxiao Wang, Fahim Rahman, Mark Tehranipoor
2016 J jnl
A Novel Peak Power Supply Noise Measurement and Adaptation System for Integrated Circuits.
IEEE Trans. Very Large Scale Integr. Syst.
Xiaoxiao Wang, Dongrong Zhang, Donglin Su, LeRoy Winemberg, Mark Tehranipoor
2016 J jnl
A Survey on Chip to System Reverse Engineering.
ACM J. Emerg. Technol. Comput. Syst.
Shahed E. Quadir, Junlin Chen, Domenic Forte, Navid Asadizanjani, Sina Shahbazmohamadi, Lei Wang, John A. Chandy, Mark Tehranipoor
2016 — conf
A layout-driven framework to assess vulnerability of ICs to microprobing attacks.
HOST
Qihang Shi, Navid Asadizanjani, Domenic Forte, Mark Tehranipoor
2016 — conf
A stochastic approach to analog physical unclonable function.
MWSCAS
Troy Bryant, Sreeja Chowdhury, Domenic Forte, Mark Tehranipoor, Nima Maghari
2016 — conf
A zero-cost approach to detect recycled SoC chips using embedded SRAM.
HOST
Zimu Guo, Md. Tauhidur Rahman, Mark Tehranipoor, Domenic Forte
2016 C conf
AES design improvement towards information safety.
ISCAS
Liang Wu, Xiaoxiao Wang, Xiaoying Zhao, Yuanqing Cheng, Donglin Su, Aixin Chen, Qihang Shi, Mark Tehranipoor
2016 A* conf
AVFSM: a framework for identifying and mitigating vulnerabilities in FSMs.
DAC
Adib Nahiyan, Kan Xiao, Kun Yang, Yier Jin, Domenic Forte, Mark Tehranipoor
2016 — conf
Aging attacks for key extraction on permutation-based obfuscation.
AsianHOST
Zimu Guo, Mark Tehranipoor, Domenic Forte
2016 J jnl
An Aging-Resistant RO-PUF for Reliable Key Generation.
IEEE Trans. Emerg. Top. Comput.
Md. Tauhidur Rahman, Fahim Rahman, Domenic Forte, Mark Tehranipoor
2016 C conf
An efficient all-digital IR-Drop Alarmer for DVFS-based SoC.
ISCAS
Liting Yu, Xiaoxiao Wang, Yuanqing Cheng, Xiaoying Zhao, Pengyuan Jiao, Aixin Chen, Donglin Su, LeRoy Winemberg, Mehdi Sadi, Mark Tehranipoor
2016 A conf
BIST-RM: BIST-assisted reliability management of SoCs using on-chip clock sweeping and machine learning.
ITC
Mehdi Sadi, Gustavo K. Contreras, Dat Tran, Jifeng Chen, LeRoy Winemberg, Mark Tehranipoor
2016 A conf
Chip editor: leveraging circuit edit for logic obfuscation and trusted fabrication.
ICCAD
Bicky Shakya, Navid Asadizanjani, Domenic Forte, Mark Tehranipoor
2016 J jnl
Design of Accurate Low-Cost On-Chip Structures for Protecting Integrated Circuits Against Recycling.
IEEE Trans. Very Large Scale Integr. Syst.
Ujjwal Guin, Domenic Forte, Mark Tehranipoor
2016 J jnl
Design of a Network of Digital Sensor Macros for Extracting Power Supply Noise Profile in SoCs.
IEEE Trans. Very Large Scale Integr. Syst.
Mehdi Sadi, Mark Tehranipoor
2016 — conf
Enhancing noise sensitivity of embedded SRAMs for robust true random number generation in SoCs.
AsianHOST
Md. Tauhidur Rahman, Domenic Forte, Xiaoxiao Wang, Mark Tehranipoor
2016 J jnl
FORTIS: A Comprehensive Solution for Establishing Forward Trust for Protecting IPs and ICs.
ACM Trans. Design Autom. Electr. Syst.
Ujjwal Guin, Qihang Shi, Domenic Forte, Mark Tehranipoor
2016 C conf
Gate-level netlist reverse engineering for hardware security: Control logic register identification.
ISCAS
Travis Meade, Yier Jin, Mark Tehranipoor, Shaojie Zhang
2016 J jnl
Guest Editorial: Hardware/Software Cross-Layer Technologies for Trustworthy and Secure Computing.
IEEE Trans. Multi Scale Comput. Syst.
Shiyan Hu, Yier Jin, Kenneth Heffner, Mark Tehranipoor
2016 J jnl
Hardware Security (Dagstuhl Seminar 16202).
Dagstuhl Reports
Osnat Keren, Ilia Polian, Mark Tehranipoor
2016 J jnl
Hardware Trojans: Lessons Learned after One Decade of Research.
ACM Trans. Design Autom. Electr. Syst.
Kan Xiao, Domenic Forte, Yier Jin, Ramesh Karri, Swarup Bhunia, Mark Tehranipoor
2016 C conf
Hardware security meets biometrics for the age of IoT.
ISCAS
Zimu Guo, Nima Karimian, Mark Tehranipoor, Domenic Forte
2016 Misc conf
New Directions in Hardware Security.
VLSID
Mark Tehranipoor
2016 A conf
Recycled FPGA detection using exhaustive LUT path delay characterization.
ITC
Md. Mahbub Alam, Mark Tehranipoor, Domenic Forte
2016 — conf
Robust bitstream protection in FPGA-based systems through low-overhead obfuscation.
ReConFig
Robert Karam, Tamzidul Hoque, Sandip Ray, Mark Tehranipoor, Swarup Bhunia
2016 J jnl
Security Rule Checking in IC Design.
Computer
Kan Xiao, Adib Nahiyan, Mark Tehranipoor
2016 J jnl
Security and Vulnerability Implications of 3D ICs.
IEEE Trans. Multi Scale Comput. Syst.
Yang Xie, Chongxi Bao, Caleb Serafy, Tiantao Lu, Ankur Srivastava, Mark Tehranipoor
2016 Misc conf
Security validation in IoT space.
VTS
Sandip Ray, Swarup Bhunia, Yier Jin, Mark Tehranipoor
2016 — conf
Selective Enhancement of Randomness at the Materials Level: Poly-Si Based Physical Unclonable Functions (PUFs).
ISVLSI
Hao-Ting Shen, Fahim Rahman, Bicky Shakya, Mark Tehranipoor, Domenic Forte
2016 — conf
Technical demonstration session: Software toolflow for FPGA bitstream obfuscation.
ReConFig
Robert Karam, Tamzidul Hoque, Sandip Ray, Mark Tehranipoor, Swarup Bhunia
2016 Misc conf
Test-point insertion efficiency analysis for LBIST applications.
VTS
Miao Tony He, Gustavo K. Contreras, Mark Tehranipoor, Dat Tran, LeRoy Winemberg
2016 — conf
Tracking Data Flow at Gate-Level through Structural Checking.
ACM Great Lakes Symposium on VLSI
Thao Le, Jia Di, Mark Tehranipoor, Domenic Forte, Lei Wang
2016 — conf
UCR: An unclonable chipless RFID tag.
HOST
Kun Yang, Domenic Forte, Mark Tehranipoor
2016 J jnl
Vulnerability Analysis of a Circuit Layout to Hardware Trojan Insertion.
IEEE Trans. Inf. Forensics Secur.
Hassan Salmani, Mark Tehranipoor
2015 C conf
A pair selection algorithm for robust RO-PUF against environmental variations and aging.
ICCD
Md. Tauhidur Rahman, Domenic Forte, Fahim Rahman, Mark Tehranipoor
2015 Misc conf
A robust digital sensor IP and sensor insertion flow for in-situ path timing slack monitoring in SoCs.
VTS
Mehdi Sadi, LeRoy Winemberg, Mark Tehranipoor
2015 J jnl
Aging Adaption in Integrated Circuits Using a Novel Built-In Sensor.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Xiaoxiao Wang, LeRoy Winemberg, Donglin Su, Dat Tran, Saji George, Nisar Ahmed, Steve Palosh, Allan Dobin, Mark Tehranipoor
2015 — conf
Chip-level anti-reverse engineering using transformable interconnects.
DFTS
Shuai Chen, Junlin Chen, Domenic Forte, Jia Di, Mark Tehranipoor, Lei Wang
2015 — conf
Efficient and secure split manufacturing via obfuscated built-in self-authentication.
HOST
Kan Xiao, Domenic Forte, Mark Tehranipoor
2015 — conf
Harnessing Nanoscale Device Properties for Hardware Security.
MTV
Bicky Shakya, Fahim Rahman, Mark Tehranipoor, Domenic Forte
2015 A* conf
Investigation of obfuscation-based anti-reverse engineering for printed circuit boards.
DAC
Zimu Guo, Mark Tehranipoor, Domenic Forte, Jia Di
2015 C conf
Performance optimization for on-chip sensors to detect recycled ICs.
ICCD
Bicky Shakya, Ujjwal Guin, Mark Tehranipoor, Domenic Forte
2015 — conf
Predictive LBIST model and partial ATPG for seed extraction.
DFTS
Gustavo K. Contreras, Nisar Ahmed, LeRoy Winemberg, Mark Tehranipoor
2015 A conf
Protecting Endpoint Devices in IoT Supply Chain.
ICCAD
Kun Yang, Domenic Forte, Mark Tehranipoor
2015 — conf
ReSC: RFID-Enabled Supply Chain Management and Traceability for Network Devices.
RFIDSec
Kun Yang, Domenic Forte, Mark Tehranipoor
2015 — conf
Speed Binning Using Machine Learning And On-chip Slack Sensors.
ACM Great Lakes Symposium on VLSI
Mehdi Sadi, Mark Tehranipoor, Xiaoxiao Wang, LeRoy Winemberg
2014 A conf
Hacking and protecting IC hardware.
DATE
Said Hamdioui, Jean-Luc Danger, Giorgio Di Natale, Fethulah Smailbegovic, Gerard van Battum, Mark Tehranipoor