Mark R. Greenstreet

79 papers A* 5A 5B 9C 7Journal 14Unranked 38

Year	Rank	Type	Title / Venue / Authors
2022	—	`conf`	Shellac: A Compiler Synthesizer for Concurrent Programs. VSTTE Christopher K. Chen, Margo I. Seltzer, Mark R. Greenstreet
2020	—	`conf`	Optimization and Comparison of Synchronizers. ASYNC Justin Reiher, Mark R. Greenstreet
2019	A	`conf`	Finding All DC Operating Points Using Interval Arithmetic Based Verification Algorithms. DATE Itrat A. Akhter, Justin Reiher, Mark R. Greenstreet
2019	B	`conf`	Integrating SMT with Theorem Proving for Verification of Analog and Mixed-Signal Circuits (Invited Tutorial). FMCAD Mark R. Greenstreet
2019	—	`conf`	Verifying Timed, Asynchronous Circuits using ACL2. ASYNC Yan Peng, Mark R. Greenstreet
2018	—	`conf`	Convex Functions in ACL2(r). ACL2 Carl Kwan, Mark R. Greenstreet
2018	—	`conf`	Explaining Metastability in Real Synchronizers. ASYNC Justin Reiher, Mark R. Greenstreet, Ian W. Jones
2018	—	`conf`	Real Vector Spaces and the Cauchy-Schwarz Inequality in ACL2(r). ACL2 Carl Kwan, Mark R. Greenstreet
2018	—	`conf`	Smtlink 2.0. ACL2 Yan Peng, Mark R. Greenstreet
2017	—	`conf`	Interleaved Architectures for High-Throughput Synthesizable Synchronization FIFOs. ASYNC Ameer M. S. Abdelhadi, Mark R. Greenstreet
2016	—	`conf`	Finding Glitches Using Formal Methods. ASYNC Yan Peng, Ian W. Jones, Mark R. Greenstreet
2015	—	`conf`	Extending ACL2 with SMT Solvers. ACL2 Yan Peng, Mark R. Greenstreet
2015	—	`conf`	Integrating SMT with Theorem Proving for Analog/Mixed-Signal Circuit Verification. NFM Yan Peng, Mark R. Greenstreet
2014	B	`conf`	Response property checking via distributed state space exploration. FMCAD Brad D. Bingham, Mark R. Greenstreet
2014	J	`jnl`	Verifying global start-up for a Möbius ring-oscillator. Formal Methods Syst. Des. Chao Yan, Mark R. Greenstreet, Suwen Yang
2013	A*	`conf`	Distributed Explicit State Model Checking of Deadlock Freedom. CAV Brad D. Bingham, Jesse D. Bingham, John Erickson, Mark R. Greenstreet
2013	B	`conf`	Verifying global convergence for a digital phase-locked loop. FMCAD Jijie Wei, Yan Peng, Ge Yu, Mark R. Greenstreet
2012	J	`jnl`	Modeling Energy-Time Trade-Offs in VLSI Computation. IEEE Trans. Computers Brad D. Bingham, Mark R. Greenstreet
2012	B	`conf`	Oscillator verification with probability one. FMCAD Chao Yan, Mark R. Greenstreet
2011	B	`conf`	On the Energy Complexity of Parallel Algorithms. ICPP Vijay Anand Korthikanti, Gul Agha, Mark R. Greenstreet
2011	B	`conf`	Parameterized verification of deadlock freedom in symmetric cache coherence protocols. FMCAD Brad D. Bingham, Mark R. Greenstreet, Jesse D. Bingham
2011	—	`conf`	Synchronizer Performance in Deep Sub-Micron Technology. ASYNC Suwen Yang, Ian W. Jones, Mark R. Greenstreet
2010	—	`conf`	Formal Verification of an Arbiter Circuit. ASYNC Chao Yan, Mark R. Greenstreet, Jochen Eisinger
2010	—	`conf`	Varactor-based signal restoration for near-speed-of-light surfing global interconnect. CICC Suwen Yang, Robert J. Drost, Mark R. Greenstreet, Shahriar Mirabbasi, Frank O'Mahony
2009	—	`conf`	A modular synchronizing FIFO for NoCs. NOCS Tarik Ono-Tesfaye, Mark R. Greenstreet
2009	—	`conf`	Estimating reliability and throughput of source-synchronous wave-pipelined interconnect. NOCS Paul Teehan, Guy G. Lemieux, Mark R. Greenstreet
2009	—	`conf`	Synchronizer Behavior and Analysis. ASYNC Ian W. Jones, Suwen Yang, Mark R. Greenstreet
2009	A	`conf`	Towards reliable 5Gbps wave-pipelined and 3Gbps surfing interconnect in 65nm FPGAs. FPGA Paul Teehan, Guy G. Lemieux, Mark R. Greenstreet
2009	B	`conf`	Verifying VLSI Circuits. ATVA Mark R. Greenstreet
2008	C	`conf`	Computation with Energy-Time Trade-Offs: Models, Algorithms and Lower-Bounds. ISPA Brad D. Bingham, Mark R. Greenstreet
2008	C	`conf`	Energy Optimal Scheduling on Multiprocessors with Migration. ISPA Brad D. Bingham, Mark R. Greenstreet
2008	—	`conf`	Faster projection based methods for circuit level verification. ASP-DAC Chao Yan, Mark R. Greenstreet
2008	J	`jnl`	Practical Asynchronous Interconnect Network Design. IEEE Trans. Very Large Scale Integr. Syst. Bradley R. Quinton, Mark R. Greenstreet, Steven J. E. Wilton
2008	B	`conf`	Verifying an Arbiter Circuit. FMCAD Chao Yan, Mark R. Greenstreet
2008	—	`conf`	Verifying start-up conditions for a ring oscillator. ACM Great Lakes Symposium on VLSI Mark R. Greenstreet, Suwen Yang
2007	—	`conf`	A Jitter Attenuating Timing Chain. ASYNC Suwen Yang, Mark R. Greenstreet, Jihong Ren
2007	J	`jnl`	A Survey and Taxonomy of GALS Design Styles. IEEE Des. Test Comput. Paul Teehan, Mark R. Greenstreet, Guy G. Lemieux
2007	J	`jnl`	An efficient linear programming solver for optimal filter synthesis. Numer. Linear Algebra Appl. Jihong Ren, Chen Greif, Mark R. Greenstreet
2007	B	`conf`	Circuit Level Verification of a High-Speed Toggle. FMCAD Chao Yan, Mark R. Greenstreet
2007	A	`conf`	Computing synchronizer failure probabilities. DATE Suwen Yang, Mark R. Greenstreet
2007	A*	`conf`	Simulating Improbable Events. DAC Suwen Yang, Mark R. Greenstreet
2007	J	`jnl`	Surfing Pipelines: Theory and Implementation. IEEE J. Solid State Circuits Suwen Yang, Brian D. Winters, Mark R. Greenstreet
2006	—	`conf`	Surfing Interconnect. ASYNC Mark R. Greenstreet, Jihong Ren
2006	J	`jnl`	System-on-Chip: Reuse and Integration. Proc. IEEE Resve A. Saleh, Steven J. E. Wilton, Shahriar Mirabbasi, Alan J. Hu, Mark R. Greenstreet, Guy Lemieux, Partha Pratim Pande, Cristian Grecu, André Ivanov
2005	A*	`conf`	A unified optimization framework for equalization filter synthesis. DAC Jihong Ren, Mark R. Greenstreet
2005	—	`conf`	Analysing the Robustness of Surfing Circuits. FAC Suwen Yang, Mark R. Greenstreet
2005	C	`conf`	Asynchronous IC Interconnect Network Design and Implementation Using a Standard ASIC Flow. ICCD Bradley R. Quinton, Mark R. Greenstreet, Steven J. E. Wilton
2005	—	`conf`	Energy Efficient Surfing. ASYNC Suwen Yang, Brian D. Winters, Mark R. Greenstreet
2005	A	`conf`	Noise margin analysis for dynamic logic circuits. ICCAD Suwen Yang, Mark R. Greenstreet
2004	C	`conf`	A Signal Integrity Test Bed for PCB Buses. ICCD Jihong Ren, Mark R. Greenstreet
2004	—	`conf`	Crosstalk Cancellation for Realistic PCB Buses. PATMOS Jihong Ren, Mark R. Greenstreet
2003	—	`conf`	Efficient Self-Timed Interfaces for Crossing Clock Domains. ASYNC Ajanta Chakraborty, Mark R. Greenstreet
2003	—	`conf`	Equalizing Filter Design for Crosstalk Cancellation. ISVLSI Jihong Ren, Mark R. Greenstreet
2003	J	`jnl`	Surfing: a robust form of wave pipelining using self-timed circuit techniques. Microprocess. Microsystems Brian D. Winters, Mark R. Greenstreet
2003	A*	`conf`	Synthesizing optimal filters for crosstalk-cancellation for high-speed buses. DAC Jihong Ren, Mark R. Greenstreet
2002	—	`conf`	A Negative-Overhead, Self-Timed Pipeline. ASYNC Mark R. Greenstreet, Brian D. Winters
2002	—	`conf`	An Event Spacing Experiment. ASYNC Mark R. Greenstreet, Anthony Winstanley, Aurélien Garivier
2002	—	`ed.`	Hybrid Systems: Computation and Control, 5th International Workshop, HSCC 2002, Stanford, CA, USA, March 25-27, 2002, Proceedings HSCC Claire J. Tomlin, Mark R. Greenstreet
2001	J	`jnl`	A light-weight framework for hardware verification. Int. J. Softw. Tools Technol. Transf. Christoph Kern, Tarik Ono-Tesfaye, Mark R. Greenstreet
2001	—	`conf`	How to Achieve Worst-Case Performance. ASYNC Mark R. Greenstreet, Brian de Alwis
2001	—	`conf`	Temporal Properties of Self-Timed Rings. CHARME Anthony Winstanley, Mark R. Greenstreet
2000	C	`conf`	Pragmatic verification for hybrid and real-time designs. ACC Mark R. Greenstreet
1999	—	`conf`	A Fast, asP*, RGD Arbiter. ASYNC Mark R. Greenstreet, Tarik Ono-Tesfaye
1999	A	`conf`	A Light-Weight Framework for Hardware Verification. TACAS Christoph Kern, Tarik Ono-Tesfaye, Mark R. Greenstreet
1999	J	`jnl`	Formal verification in hardware design: a survey. ACM Trans. Design Autom. Electr. Syst. Christoph Kern, Mark R. Greenstreet
1999	—	`conf`	Reachability Analysis Using Polygonal Projections. HSCC Mark R. Greenstreet, Ian Mitchell
1999	—	`conf`	Real-Time Merging. ASYNC Mark R. Greenstreet
1998	—	`conf`	Integrating Projections. HSCC Mark R. Greenstreet, Ian Mitchell
1998	—	`conf`	Verifying a Self-Timed Divider. ASYNC Tarik Ono-Tesfaye, Christoph Kern, Mark R. Greenstreet
1997	—	`conf`	Self-Timed Meshes Are Faster Than Synchronous. ASYNC Peggy B. K. Pang, Mark R. Greenstreet
1996	A*	`conf`	Verifying Safety Properties of Differential Equations. CAV Mark R. Greenstreet
1995	J	`jnl`	Automatic Verification of Asynchronous Circuits. IEEE Des. Test Comput. Trevor Wing Sang Lee, Mark R. Greenstreet, Carl-Johan H. Seger
1995	C	`conf`	Implementing a STARI chip. ICCD Mark R. Greenstreet
1994	C	`conf`	Automatic Verification of Refinement. ICCD Trevor Wing Sang Lee, Mark R. Greenstreet, Carl-Johan H. Seger
1994	—	`conf`	How fast will the flip flop? ASYNC Mark R. Greenstreet, Peter Cahoon
1992	—	`conf`	Using Synchronized Transitions for Simulation and Timing Verification. Designing Correct Circuits Mark R. Greenstreet
1990	J	`jnl`	Bubbles can make self-timed pipelines fast. J. VLSI Signal Process. Mark R. Greenstreet, Kenneth Steiglitz
1988	J	`jnl`	From High-Level Descriptions to VLSI Circuits. BIT Jørgen Staunstrup, Mark R. Greenstreet
1987	J	`jnl`	VLSI with a very low scale investment. Integr. Mark R. Greenstreet, Peter Møller-Nielsen, Jørgen Staunstrup