Mark A. Horowitz

60 papers A* 5A 2B 2C 2Journal 42Unranked 7

Year	Rank	Type	Title / Venue / Authors
2023	—	`conf`	APEX: A Framework for Automated Processing Element Design Space Exploration using Frequent Subgraph Analysis. ASPLOS (3) Jackson Melchert, Kathleen Feng, Caleb Donovick, Ross Daly, Ritvik Sharma, Clark W. Barrett, Mark A. Horowitz, Pat Hanrahan, Priyanka Raina
2023	J	`jnl`	Retrospective: EIE: Efficient Inference Engine on Sparse and Compressed Neural Network. CoRR Song Han, Xingyu Liu, Huizi Mao, Jing Pu, Ardavan Pedram, Mark A. Horowitz, William J. Dally
2023	—	`conf`	The Sparse Abstract Machine. ASPLOS (3) Olivia Hsu, Maxwell Strange, Ritvik Sharma, Jaeyeon Won, Kunle Olukotun, Joel S. Emer, Mark A. Horowitz, Fredrik Kjølstad
2017	J	`jnl`	Volumetric Image Registration From Invariant Keypoints. IEEE Trans. Image Process. Blaine Rister, Mark A. Horowitz, Daniel L. Rubin
2016	A*	`conf`	EIE: Efficient Inference Engine on Compressed Deep Neural Network. ISCA Song Han, Xingyu Liu, Huizi Mao, Jing Pu, Ardavan Pedram, Mark A. Horowitz, William J. Dally
2016	J	`jnl`	EIE: Efficient Inference Engine on Compressed Deep Neural Network. CoRR Song Han, Xingyu Liu, Huizi Mao, Jing Pu, Ardavan Pedram, Mark A. Horowitz, William J. Dally
2013	A*	`conf`	Convolution engine: balancing efficiency & flexibility in specialized computing. ISCA Wajahat Qadeer, Rehan Hameed, Ofer Shacham, Preethi Venkatesan, Christos Kozyrakis, Mark A. Horowitz
2010	A*	`conf`	An efficient test vector generation for checking analog/mixed-signal functional models. DAC ByongChan Lim, Jaeha Kim, Mark A. Horowitz
2010	J	`jnl`	Fast, Non-Monte-Carlo Estimation of Transient Performance Variation Due to Device Mismatch. IEEE Trans. Circuits Syst. I Regul. Pap. Jaeha Kim, Kevin D. Jones, Mark A. Horowitz
2009	—	`conf`	Leveraging designer's intent: A path toward simpler analog CAD tools. CICC Jaeha Kim, Metha Jeeradit, ByongChan Lim, Mark A. Horowitz
2009	A*	`conf`	Stochastic steady-state and AC analyses of mixed-signal systems. DAC Jaeha Kim, Jihong Ren, Mark A. Horowitz
2007	A	`conf`	A new technique for characterization of digital-to-analog converters in high-speed systems. DATE Jafar Savoj, Ali-Azam Abbasfar, Amir Amirkhany, Bruno W. Garlepp, Mark A. Horowitz
2007	A*	`conf`	Fast, Non-Monte-Carlo Estimation of Transient Performance Variation Due to Device Mismatch. DAC Jaeha Kim, Kevin D. Jones, Mark A. Horowitz
2007	—	`conf`	Practical Limits of Multi-Tone Signaling Over High-Speed Backplane Electrical Links. ICC Amir Amirkhany, Ali-Azam Abbasfar, Vladimir Stojanovic, Mark A. Horowitz
2007	—	`conf`	Time-Variant Characterization and Compensation of Wideband Circuits. CICC Amir Amirkhany, Ali-Azam Abbasfar, Jafar Savoj, Mark A. Horowitz
2007	A	`conf`	Variable domain transformation for linear PAC analysis of mixed-signal systems. ICCAD Jaeha Kim, Kevin D. Jones, Mark A. Horowitz
2006	B	`conf`	Analog Multi-Tone Signaling for High-Speed Backplane Electrical Links. GLOBECOM Amir Amirkhany, Ali-Azam Abbasfar, Vladimir Stojanovic, Mark A. Horowitz
2005	J	`jnl`	A 20-Gb/s 0.13-μm CMOS serial link transmitter using an LC-PLL to directly drive the output multiplexer. IEEE J. Solid State Circuits Patrick Chiang, William J. Dally, Ming-Ju Edward Lee, Ramesh Senthinathan, Yangjin Oh, Mark A. Horowitz
2005	J	`jnl`	Architecture and circuit techniques for a 1.1-GHz 16-kb reconfigurable memory in 0.18-μm CMOS. IEEE J. Solid State Circuits Ken Mai, Ron Ho, Elad Alon, Dean Liu, Younggon Kim, Dinesh Patil, Mark A. Horowitz
2005	J	`jnl`	Autonomous dual-mode (PAM2/4) serial link transceiver with adaptive equalization and data recovery. IEEE J. Solid State Circuits Vladimir Stojanovic, Andrew Ho, Bruno W. Garlepp, Fred Chen, Jason Wei, Grace Tsang, Elad Alon, Ravi T. Kollipara, Carl W. Werner, Jared L. Zerbe, Mark A. Horowitz
2005	J	`jnl`	Circuits and techniques for high-resolution measurement of on-chip power supply noise. IEEE J. Solid State Circuits Elad Alon, Vladimir Stojanovic, Mark A. Horowitz
2004	J	`jnl`	Methods for true energy-performance optimization. IEEE J. Solid State Circuits Dejan Markovic, Vladimir Stojanovic, Borivoje Nikolic, Mark A. Horowitz, Robert W. Brodersen
2004	B	`conf`	Multi-tone signaling for high-speed backplane electrical links. GLOBECOM Amir Amirkhany, Vladimir Stojanovic, Mark A. Horowitz
2004	—	`conf`	Optimal linear precoding with theoretical and practical data rates in high-speed serial-link backplane communication. ICC Vladimir Stojanovic, Amir Amirkhany, Mark A. Horowitz
2003	J	`jnl`	A 10-GHz global clock distribution using coupled standing-wave oscillators. IEEE J. Solid State Circuits Frank O'Mahony, C. Patrick Yue, Mark A. Horowitz, S. Simon Wong
2003	J	`jnl`	Design of CMOS adaptive-bandwidth PLL/DLLs: a general approach. IEEE Trans. Circuits Syst. II Express Briefs Jaeha Kim, Mark A. Horowitz, Gu-Yeon Wei
2003	J	`jnl`	Equalization and clock recovery for a 2.5-10-Gb/s 2-PAM/4-PAM backplane transceiver cell. IEEE J. Solid State Circuits Jared L. Zerbe, Carl W. Werner, Vladimir Stojanovic, Fred Chen, Jason Wei, Grace Tsang, Dennis Kim, William F. Stonecypher, Andrew Ho, Timothy P. Thrush, Ravi T. Kollipara, Mark A. Horowitz, Kevin S. Donnelly
2002	J	`jnl`	Adaptive supply serial links with sub-1-V operation and per-pin clock recovery. IEEE J. Solid State Circuits Jacha Kim, Mark A. Horowitz
2002	J	`jnl`	An efficient digital sliding controller for adaptive power-supply regulation. IEEE J. Solid State Circuits Jaeha Kim, Mark A. Horowitz
2002	J	`jnl`	High-frequency characterization of on-chip digital interconnects. IEEE J. Solid State Circuits Bendik Kleveland, Xiaoning Qi, Liam Madden, Takeshi Furusawa, Robert W. Dutton, Mark A. Horowitz, S. Simon Wong
2002	—	`conf`	Transmit pre-emphasis for high-speed time-division-multiplexed serial-link transceiver. ICC Vladimir Marko Stojanovic, Georgios Ginis, Mark A. Horowitz
2001	J	`jnl`	A serial-link transceiver based on 8-GSamples/s A/D and D/A converters in 0.25-μm CMOS. IEEE J. Solid State Circuits Chih-Kong Ken Yang, Vladimir Stojanovic, Siamak Modjtahedi, Mark A. Horowitz, William F. Ellersick
2001	J	`jnl`	Fast low-power decoders for RAMs. IEEE J. Solid State Circuits Bharadwaj S. Amrutur, Mark A. Horowitz
2001	J	`jnl`	The future of wires. Proc. IEEE Ron Ho, Kenneth Mai, Mark A. Horowitz
2000	J	`jnl`	A 0.3-μm CMOS 8-Gb/s 4-PAM serial link transceiver. IEEE J. Solid State Circuits Ramin Farjad-Rad, Chih-Kong Ken Yang, Mark A. Horowitz, Thomas H. Lee
2000	J	`jnl`	A 2.4 Gb/s/pin simultaneous bidirectional parallel link with per-pin skew compensation. IEEE J. Solid State Circuits Evelina Yeung, Mark A. Horowitz
2000	J	`jnl`	A variable-frequency parallel I/O interface with adaptive power-supply regulation. IEEE J. Solid State Circuits Gu-Yeon Wei, Jaeha Kim, Dean Liu, Stefanos Sidiropoulos, Mark A. Horowitz
2000	J	`jnl`	Speed and power scaling of SRAM's. IEEE J. Solid State Circuits Bharadwaj S. Amrutur, Mark A. Horowitz
1999	J	`jnl`	A 0.4-μm CMOS 10-Gb/s 4-PAM pre-emphasis serial link transmitter. IEEE J. Solid State Circuits Ramin Farjad-Rad, Chih-Kong Ken Yang, Mark A. Horowitz, Thomas H. Lee
1999	J	`jnl`	A portable digital DLL for high-speed CMOS interface circuits. IEEE J. Solid State Circuits Bruno W. Garlepp, Kevin S. Donnelly, Jun Kim, Pak Shing Chau, Jared L. Zerbe, Charlie Huang, Chanh Tran, Clemenz L. Portmann, Donald Stark, Yiu-Fai Chan, Thomas H. Lee, Mark A. Horowitz
1998	J	`jnl`	A 0.5-μm CMOS 4.0-Gbit/s serial link transceiver with data recovery using oversampling. IEEE J. Solid State Circuits Chih-Kong Ken Yang, Ramin Farjad-Rad, Mark A. Horowitz
1998	J	`jnl`	A replica technique for wordline and sense control in low-power SRAM's. IEEE J. Solid State Circuits Bharadwaj S. Amrutur, Mark A. Horowitz
1998	J	`jnl`	Low-power SRAM design using half-swing pulse-mode techniques. IEEE J. Solid State Circuits Kenneth W. Mai, Toshihiko Mori, Bharadwaj S. Amrutur, Ron Ho, Bennett Wilburn, Mark A. Horowitz, Isao Fukushi, Tetsuo Izawa, Shin Mitarai
1998	J	`jnl`	Low-power dividerless frequency synthesis using aperture phase detection. IEEE J. Solid State Circuits Arvin Shahani, Derek K. Shaeffer, Sunderarajan S. Mohan, Hirad Samavati, Hamid R. Rategh, Maria del Mar Hershenson, Min Xu, C. Patrick Yue, Daniel J. Eddleman, Mark A. Horowitz, Thomas H. Lee
1997	J	`jnl`	A semidigital dual delay-locked loop. IEEE J. Solid State Circuits Stefanos Sidiropoulos, Mark A. Horowitz
1997	J	`jnl`	Circuit techniques for 1.5-V power supply flash memory. IEEE J. Solid State Circuits Nobuaki Otsuka, Mark A. Horowitz
1997	J	`jnl`	Hardware/software co-design of the Stanford FLASH multiprocessor. Proc. IEEE Mark A. Heinrich, David Ofelt, Mark A. Horowitz, John L. Hennessy
1997	J	`jnl`	Skew-tolerant domino circuits. IEEE J. Solid State Circuits David L. Harris, Mark A. Horowitz
1997	J	`jnl`	Supply and threshold voltage scaling for low power CMOS. IEEE J. Solid State Circuits Ricardo Gonzalez, Benjamin M. Gordon, Mark A. Horowitz
1996	J	`jnl`	A 0.8-μm CMOS 2.5 Gb/s oversampling receiver and transmitter for serial links. IEEE J. Solid State Circuits Chih-Kong Ken Yang, Mark A. Horowitz
1993	J	`jnl`	Precise delay generation using coupled oscillators. IEEE J. Solid State Circuits John G. Maneatis, Mark A. Horowitz
1992	J	`jnl`	Circuit techniques for large CSEA SRAMs. IEEE J. Solid State Circuits Drew E. Wingard, Don C. Stark, Mark A. Horowitz
1991	C	`conf`	A 160 ns 54 bit CMOS division implementation using self-timing and symmetrically overlapped SRT stages. IEEE Symposium on Computer Arithmetic Ted E. Williams, Mark A. Horowitz
1991	J	`jnl`	A zero-overhead self-timed 160-ns 54-b CMOS divider. IEEE J. Solid State Circuits Ted E. Williams, Mark A. Horowitz
1990	J	`jnl`	A 4-ns BiCMOS translation-lookaside buffer. IEEE J. Solid State Circuits Leilani R. Tamura, Tsen-Shau Yang, Drew E. Wingard, Mark A. Horowitz, Bruce A. Wolley
1989	J	`jnl`	Integrated pin electronics for VLSI functional testers. IEEE J. Solid State Circuits James A. Gasbarro, Mark A. Horowitz
1989	C	`conf`	Rounding algorithms for IEEE multipliers. IEEE Symposium on Computer Arithmetic Mark R. Santoro, Gary Bewick, Mark A. Horowitz
1989	J	`jnl`	SPIM: a pipelined 64*64-bit iterative multiplier. IEEE J. Solid State Circuits Mark R. Santoro, Mark A. Horowitz
1988	J	`jnl`	Generalization in digital functions. Neural Networks Karen A. Huyser, Mark A. Horowitz
1983	J	`jnl`	Signal Delay in RC Tree Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Jorge Rubinstein, Paul Penfield Jr., Mark A. Horowitz