Mario Garrido - RankMe

62 papers C 5Misc 2Journal 40Unranked 15

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	Continuous-Flow Data-Rate-Aware CNN Inference on FPGA. CoRR Tobias Habermann, Michael Mecik, Zhenyu Wang, César David Vera, Martin Kumm, Mario Garrido
2025	J	`jnl`	A Hybrid Approach to Information Retrieval and Answer Generation for Regulatory Texts. CoRR Jhon Rayo, Raúl de la Rosa, Mario Garrido
2025	J	`jnl`	A Method to Obtain Non-Power-of-Two FFT Flow Graphs Based on a New Prime Factor Algorithm. IEEE Trans. Signal Process. Víctor Manuel Bautista, Mario Garrido
2025	J	`jnl`	Advanced Quantization Schemes to Increase Accuracy, Reduce Area, and Lower Power Consumption in FFT Architectures. IEEE Trans. Circuits Syst. I Regul. Pap. Mario Garrido, Víctor Manuel Bautista, Alejandro Portas, Javier Hormigo
2025	—	`conf`	Hardware-Efficient Gaussian and Sobel Filters for Real-Time Image Processing on FPGA. DCIS Francisco Albertuz, Mario Garrido
2025	J	`jnl`	Uniformly Distributed CORDIC. IEEE Trans. Circuits Syst. I Regul. Pap. Mario Garrido, Daniel Medina, Pedro Paz, Marisa López-Vallejo
2024	—	`conf`	A 12.8-GS/s 32-Parallel 1 Million-Point FFT. DCIS Pedro Paz, Mario Garrido
2024	—	`conf`	A Hardware-Efficient 1200-point FFT Architecture that Combines the Prime Factor and Cooley-Tukey Algorithms. DCIS Víctor Manuel Bautista, Mario Garrido
2024	—	`conf`	A Serial Low-Switching FFT Architecture Specifically Tailored for Low Power Consumption. DCIS Francisco Albertuz, Mario Garrido
2024	C	`conf`	Novel Access Patterns Based on Overlapping Loading and Processing Times to Reduce Latency and Increase Throughput in Memory-based FFTs. ARITH Zeynep Kaya, Mario Garrido
2024	J	`jnl`	Optimized 4-Parallel 1024-Point MSC FFT. IEEE Access Zeynep Kaya, Mario Garrido
2023	—	`conf`	A 5.2-GS/s 8-Parallel 1024-Point MDC FFT. DCIS Pedro Paz, Mario Garrido
2023	—	`conf`	An Automatic Generator of Non-Power-of-Two SDF FFT Architectures for 5G and Beyond. DCIS Víctor Manuel Bautista, Mario Garrido
2023	J	`jnl`	CORDIC-Based Computation of Arcsine and Arccosine Functions on FPGA. IEEE Trans. Circuits Syst. II Express Briefs Pedro Paz, Mario Garrido
2023	J	`jnl`	Efficient Implementation of Complex Multipliers on FPGAs Using DSP Slices. J. Signal Process. Syst. Pedro Paz, Mario Garrido
2023	C	`conf`	Energy-Efficient Short-Time Fourier Transform for Partial Window Overlapping. ISCAS Charalampos Eleftheriadis, Mario Garrido, Georgios Karakonstantis
2023	J	`jnl`	Low-Latency 64-Parallel 4096-Point Memory-Based FFT for 6G. IEEE Trans. Circuits Syst. I Regul. Pap. Zeynep Kaya, Mario Garrido
2023	J	`jnl`	Memory-Based FFT Architecture With Optimized Number of Multiplexers and Memory Usage. IEEE Trans. Circuits Syst. II Express Briefs Zeynep Kaya, Mario Garrido, Jarmo Takala
2023	J	`jnl`	Radix-2 IEEE Access Guang-Ting Deng, Mario Garrido, Sau-Gee Chen, Shen-Jui Huang
2023	J	`jnl`	Serial Butterflies for Non-Power-of-Two FFT Architectures in 5G and Beyond. IEEE Trans. Circuits Syst. I Regul. Pap. Víctor Manuel Bautista, Mario Garrido, Marisa López-Vallejo
2022	J	`jnl`	A Survey on Pipelined FFT Hardware Architectures. J. Signal Process. Syst. Mario Garrido
2022	J	`jnl`	Simplifying Karnaugh Maps by Making Groups of Non-power-of-two Elements. Circuits Syst. Signal Process. Mario Garrido
2021	J	`jnl`	Optimum MDC FFT Hardware Architectures in Terms of Delays and Multiplexers. IEEE Trans. Circuits Syst. II Express Briefs Mario Garrido, Pedro Paz
2021	J	`jnl`	The Constant Multiplier FFT. IEEE Trans. Circuits Syst. I Regul. Pap. Mario Garrido, Pedro Malagón
2020	C	`conf`	A 128-Point Multi-Path SC FFT Architecture. ISCAS Shun-Che Hsu, Shen-Jui Huang, Sau-Gee Chen, Shin-Che Lin, Mario Garrido
2020	J	`jnl`	Continuous-Flow Matrix Transposition Using Memories. IEEE Trans. Circuits Syst. I Regul. Pap. Mario Garrido, Peter Pirsch
2020	—	`conf`	Evolution of the Performance of Pipelined FFT Architectures Through the Years. DCIS Mario Garrido
2020	J	`jnl`	Using Rotator Transformations to Simplify FFT Hardware Architectures. IEEE Trans. Circuits Syst. Rikard Andersson, Mario Garrido
2020	J	`jnl`	Using Transposition to Efficiently Solve Constant Matrix-Vector Multiplication and Sum of Product Problems. J. Signal Process. Syst. Narges Mohammadi Sarband, Oscar Gustafsson, Mario Garrido
2019	J	`jnl`	A 1 Million-Point FFT on a Single FPGA. IEEE Trans. Circuits Syst. I Regul. Pap. Hans Kanders, Tobias Mellqvist, Mario Garrido, Kent Palmkvist, Oscar Gustafsson
2019	C	`conf`	Effect of Finite Word-Length on SQNR, Area and Power for Real-Valued Serial FFT. ISCAS Nanda K. Unnikrishnan, Mario Garrido, Keshab K. Parhi
2019	J	`jnl`	Multiplexer and Memory-Efficient Circuits for Parallel Bit Reversal. IEEE Trans. Circuits Syst. II Express Briefs Mario Garrido
2019	J	`jnl`	Optimum Circuits for Bit-Dimension Permutations. IEEE Trans. Very Large Scale Integr. Syst. Mario Garrido, Jesús Grajal, Oscar Gustafsson
2019	J	`jnl`	World's Fastest FFT Architectures: Breaking the Barrier of 100 GS/s. IEEE Trans. Circuits Syst. I Regul. Pap. Mario Garrido, Konrad Möller, Martin Kumm
2018	J	`jnl`	A Serial Commutator Fast Fourier Architecture for Real-Valued Signals. IEEE Trans. Circuits Syst. II Express Briefs Mario Garrido, Nanda K. Unnikrishnan, Keshab K. Parhi
2018	J	`jnl`	Feedforward FFT Hardware Architectures Based on Rotator Allocation. IEEE Trans. Circuits Syst. I Regul. Pap. Mario Garrido, Shen-Jui Huang, Sau-Gee Chen
2018	J	`jnl`	Guest Editorial: Special Section on Fast Fourier Transform (FFT) Hardware Implementations. J. Signal Process. Syst. Mario Garrido, Marisa Luisa López-Vallejo, Sau-Gee Chen
2018	Misc	`conf`	Improved Implementation Approaches for 512-tap 60 GSa/s Chromatic Dispersion FIR Filters. ACSSC Cheolyong Bae, Madhur Gokhale, Oscar Gustafsson, Mario Garrido
2018	—	`conf`	Obtaining Minimum Depth Sum of Products from Multiple Constant Multiplication. SiPS Narges Mohammadi Sarband, Oscar Gustafsson, Mario Garrido
2018	J	`jnl`	Optimal Shift Reassignment in Reconfigurable Constant Multiplication Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Konrad Möller, Martin Kumm, Mario Garrido, Peter Zipf
2018	J	`jnl`	Optimal Single Constant Multiplication Using Ternary Adders. IEEE Trans. Circuits Syst. II Express Briefs Martin Kumm, Oscar Gustafsson, Mario Garrido, Peter Zipf
2017	J	`jnl`	A 4096-Point Radix-4 Memory-Based FFT Using DSP Slices. IEEE Trans. Very Large Scale Integr. Syst. Mario Garrido, Miguel Angel Sánchez, María Luisa López Vallejo, Jesús Grajal
2017	Misc	`conf`	Implementation approaches for 512-tap 60 GSa/s chromatic dispersion FIR filters. ACSSC Anton Kovalev, Oscar Gustafsson, Mario Garrido
2016	J	`jnl`	A New Representation of FFT Algorithms Using Triangular Matrices. IEEE Trans. Circuits Syst. I Regul. Pap. Mario Garrido
2016	J	`jnl`	CORDIC II: A New Improved CORDIC Algorithm. IEEE Trans. Circuits Syst. II Express Briefs Mario Garrido, Petter Kallstrom, Martin Kumm, Oscar Gustafsson
2016	J	`jnl`	Multiplierless Unity-Gain SDF FFTs. IEEE Trans. Very Large Scale Integr. Syst. Mario Garrido, Rikard Andersson, Fahad Qureshi, Oscar Gustafsson
2016	J	`jnl`	The Feedforward Short-Time Fourier Transform. IEEE Trans. Circuits Syst. II Express Briefs Mario Garrido
2016	J	`jnl`	The Serial Commutator FFT. IEEE Trans. Circuits Syst. II Express Briefs Mario Garrido, Shen-Jui Huang, Sau-Gee Chen, Oscar Gustafsson
2014	—	`conf`	Challenging the limits of FFT performance on FPGAs (Invited paper). ISIC Mario Garrido, Miguel Acevedo, Andreas Ehliar, Oscar Gustafsson
2014	J	`jnl`	Continuous-flow Parallel Bit-Reversal Circuit for MDF and MDC FFT Architectures. IEEE Trans. Circuits Syst. I Regul. Pap. Sau-Gee Chen, Shen-Jui Huang, Mario Garrido, Shyh-Jye Jou
2014	J	`jnl`	Low-Complexity Multiplierless Constant Rotators Based on Combined Coefficient Selection and Shift-and-Add Implementation (CCSSI). IEEE Trans. Circuits Syst. I Regul. Pap. Mario Garrido, Fahad Qureshi, Oscar Gustafsson
2013	C	`conf`	A reconfigurable FFT architecture for variable-length and multi-streaming OFDM standards. ISCAS Padma Prasad Boopal, Mario Garrido, Oscar Gustafsson
2013	J	`jnl`	Pipelined Radix-2 IEEE Trans. Very Large Scale Integr. Syst. Mario Garrido, Jesús Grajal, Miguel A. Sánchez Marcos, Oscar Gustafsson
2012	—	`conf`	Low-complexity rotators for the FFT using base-3 signed stages. APCCAS Petter Kallstrom, Mario Garrido, Oscar Gustafsson
2011	—	`conf`	A 512-point 8-parallel pipelined feedforward FFT for WPAN. ACSCC Tanvir Ahmed, Mario Garrido, Oscar Gustafsson
2011	J	`jnl`	Accurate Rotations Based on Coefficient Scaling. IEEE Trans. Circuits Syst. II Express Briefs Mario Garrido, Oscar Gustafsson, Jesús Grajal
2011	J	`jnl`	Optimum Circuits for Bit Reversal. IEEE Trans. Circuits Syst. II Express Briefs Mario Garrido, Jesús Grajal, Oscar Gustafsson
2011	—	`conf`	Real time FPGA implementation of an automatic modulation classifier for electronic warfare applications. EUSIPCO Jesús Grajal, Omar A. Yeste Ojeda, Miguel Angel Sánchez, Mario Garrido, Marisa López-Vallejo
2010	—	`conf`	Alternatives for low-complexity complex rotators. ICECS Fahad Qureshi, Mario Garrido, Oscar Gustafsson
2009	J	`jnl`	A Pipelined FFT Architecture for Real-Valued Signals. IEEE Trans. Circuits Syst. I Regul. Pap. Mario Garrido, Keshab K. Parhi, Jesús Grajal
2007	—	`conf`	Efficient Memoryless Cordic for FFT Computation. ICASSP (2) Mario Garrido, Jesús Grajal
2006	—	`conf`	Automated design space exploration of FPGA-based FFT architectures based on area and power estimation. FPT Miguel A. Sánchez Marcos, Mario Garrido, Marisa López-Vallejo, Carlos A. López-Barrio