Marian Verhelst

288 papers A* 10A 19B 7C 15Misc 9Journal 134Unranked 94

Year	Rank	Type	Title / Venue / Authors
2026	—	`conf`	29.3 A 256-Channel Event-Driven Readout for Solid-State Nanopore Single-Molecule Sensing with 193pArms Noise in a 1MHz Bandwidth. ISSCC Sander Crols, Carolina Mora Lopez, Filip Tavernier, Marian Verhelst, Nick Van Helleputte
2026	J	`jnl`	A 16 nm 1.60TOPS/W High Utilization DNN Accelerator with 3D Spatial Data Reuse and Efficient Shared Memory Access. CoRR Xiaoling Yi, Ryan Antonio, Yunhao Deng, Fanchen Kong, Joren Dumoulin, Jun Yin, Marian Verhelst
2026	J	`jnl`	An Analytical Model for Performance-Carbon Co-Optimization of Edge AI Accelerators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Jiacong Sun, Xiaoling Yi, Arne Symons, Georges G. E. Gielen, Lieven Eeckhout, Marian Verhelst
2026	J	`jnl`	LogSumExp: Efficient Approximate Logarithm Acceleration for Embedded Tractable Probabilistic Reasoning. IEEE Trans. Circuits Syst. I Regul. Pap. Lingyun Yao, Shirui Zhao, Martin Trapp, Jelin Leslin, Marian Verhelst, Martin Andraud
2026	J	`jnl`	MONET: Modeling and Optimization of neural NEtwork Training from Edge to Data Centers. CoRR Jérémy Morlier, Robin Geens, Stef Cuyckens, Arne Symons, Marian Verhelst, Vincent Gripon, Mathieu Léonardon
2026	—	`conf`	Precision-Scalable Microscaling Datapaths with Optimized Reduction Tree for Efficient NPU Integration. ASP-DAC Stef Cuyckens, Xiaoling Yi, Robin Geens, Joren Dumoulin, Martin Wiesner, Chao Fang, Marian Verhelst
2026	J	`jnl`	SunPar: An Analytical Design Space Exploration Framework Modeling Performance Uncertainty in Sparse AI Accelerators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Jiacong Sun, Man Shi, Mahesh Subedar, Georges G. E. Gielen, Marian Verhelst
2026	—	`conf`	The Configuration Wall: Characterization and Elimination of Accelerator Configuration Overhead. ASPLOS (1) Josse Van Delm, Anton Lydike, Joren Dumoulin, Jonas Crols, Xiaoling Yi, Ryan Antonio, Jackson Woodruff, Tobias Grosser, Marian Verhelst
2025	C	`conf`	3D IGZO Charge-Coupled Memory DTCO & STCO Analysis for Compute-near-Memory Applications. ISCAS Bowen Wang, Khakim Akhunov, Hyungrock Oh, Fernando García-Redondo, Yukai Chen, Arvind Sharma, Jiacong Sun, Sahan Gamage, Maarten Rosmeulen, Swaraj Bandhu Mahato, Rishabh Kishore, Subhali Subhechha, Jaydeep P. Kulkarni, Marian Verhelst, Dwaipayan Biswas, Marie Garcia Bardon, Wim Dehaene, Julien Ryckaert
2025	A	`conf`	A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions. CGO Alexandre Lopoukhine, Federico Ficarelli, Christos Vasiladiotis, Anton Lydike, Josse Van Delm, Alban Dutilleul, Luca Benini, Marian Verhelst, Tobias Grosser
2025	J	`jnl`	A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions. CoRR Alexandre Lopoukhine, Federico Ficarelli, Christos Vasiladiotis, Anton Lydike, Josse Van Delm, Alban Dutilleul, Luca Benini, Marian Verhelst, Tobias Grosser
2025	J	`jnl`	AIA: A Customized Multi-Core RISC-V SoC for Discrete Sampling Workloads in 16 nm. IEEE J. Solid State Circuits Shirui Zhao, Nimish Shah, Wannes Meert, Marian Verhelst
2025	A	`conf`	An Open-Source HW-SW Co-Development Framework Enabling Efficient Multi-Accelerator Systems. ISLPED Ryan Antonio, Joren Dumoulin, Xiaoling Yi, Josse Van Delm, Yunhao Deng, Guilherme Paim, Marian Verhelst
2025	J	`jnl`	An Open-Source HW-SW Co-Development Framework Enabling Efficient Multi-Accelerator Systems. CoRR Ryan Antonio, Joren Dumoulin, Xiaoling Yi, Josse Van Delm, Yunhao Deng, Guilherme Paim, Marian Verhelst
2025	A*	`conf`	Anda: Unlocking Efficient LLM Inference with a Variable-Length Grouped Activation Data Format. HPCA Chao Fang, Man Shi, Robin Geens, Arne Symons, Zhongfeng Wang, Marian Verhelst
2025	J	`jnl`	BitWave: Exploiting Column-Based Bit-Level Sparsity for Deep Learning Acceleration. CoRR Man Shi, Vikram Jain, Antony Joseph, Maurice Meijer, Marian Verhelst
2025	C	`conf`	CIPL: A Fast and Low-Power Level Shifter for Wide-Range Voltage Conversion. ISCAS Weijie Jiang, Xinfa Zheng, Jiacong Sun, Georges G. E. Gielen, Marian Verhelst, Wim Dehaene
2025	J	`jnl`	CNN-based Robust Sound Source Localization with SRP-PHAT for the Extreme Edge. CoRR Jun Yin, Marian Verhelst
2025	A*	`conf`	DataMaestro: A Versatile and Efficient Data Streaming Engine Bringing Decoupled Memory Access To Dataflow Accelerators. DAC Xiaoling Yi, Yunhao Deng, Ryan Antonio, Fanchen Kong, Guilherme Paim, Marian Verhelst
2025	J	`jnl`	DataMaestro: A Versatile and Efficient Data Streaming Engine Bringing Decoupled Memory Access To Dataflow Accelerators. CoRR Xiaoling Yi, Yunhao Deng, Ryan Antonio, Fanchen Kong, Guilherme Paim, Marian Verhelst
2025	J	`jnl`	Decoupled Control Flow and Data Access in RISC-V GPGPUs. CoRR Giuseppe Maria Sarda, Nimish Shah, Abubakr Nada, Debjyoti Bhattacharjee, Marian Verhelst
2025	A	`conf`	Efficient Precision-Scalable Hardware for Microscaling (MX) Processing in Robotics Learning. ISLPED Stef Cuyckens, Xiaoling Yi, Nitish Satya Murthy, Chao Fang, Marian Verhelst
2025	J	`jnl`	Efficient Precision-Scalable Hardware for Microscaling (MX) Processing in Robotics Learning. CoRR Stef Cuyckens, Xiaoling Yi, Nitish Satya Murthy, Chao Fang, Marian Verhelst
2025	J	`jnl`	Enabling Efficient Hardware Acceleration of Hybrid Vision Transformer (ViT) Networks at the Edge. CoRR Joren Dumoulin, Pouya Houshmand, Vikram Jain, Marian Verhelst
2025	B	`conf`	Fine-Grained Fusion: The Missing Piece in Area-Efficient State Space Model Acceleration. PACT Robin Geens, Arne Symons, Marian Verhelst
2025	J	`jnl`	Fine-Grained Fusion: The Missing Piece in Area-Efficient State Space Model Acceleration. CoRR Robin Geens, Arne Symons, Marian Verhelst
2025	—	`conf`	Flexible Hardware Accelerators for Ultra-Low Power Edge AI: The CONVOLVE Approach. ISVLSI Panagiotis Chaidos, Alexios Maras, Georgios Alexandris, Xiaoling Yi, Asmae El Arrassi, Bas Ahn, James D. Garside, Yunhao Deng, Theofilos Spyrou, Anteneh Gebregiorgis, Mottaqiallah Taouil, Manil Dev Gomony, Sotirios Xydis, Marian Verhelst, Said Hamdioui, Dimitrios Soudris, Henk Corporaal
2025	J	`jnl`	HUNBN, a 16-nm Digital In-Memory-Compute SoC for Edge CNN Application Achieving 24 TOPs/W (4b) at System Level. IEEE J. Solid State Circuits Weijie Jiang, Cédric Caron, Prabhat Avasare, Marc Pauwels, Marian Verhelst, Wim Dehaene
2025	J	`jnl`	Hardware-Centric Analysis of DeepSeek's Multi-Head Latent Attention. CoRR Robin Geens, Marian Verhelst
2025	J	`jnl`	Hardware-aware Neural Architecture Search of Early Exiting Networks on Edge Accelerators. CoRR Alaa Zniber, Arne Symons, Ouassim Karrakchou, Marian Verhelst, Mounir Ghogho
2025	J	`jnl`	How to Keep Pushing ML Accelerator Performance? Know Your Rooflines! IEEE J. Solid State Circuits Marian Verhelst, Luca Benini, Naveen Verma
2025	J	`jnl`	How to keep pushing ML accelerator performance? Know your rooflines! CoRR Marian Verhelst, Luca Benini, Naveen Verma
2025	J	`jnl`	MATCH: Model-Aware TVM-Based Compilation for Heterogeneous Edge Devices. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Mohamed Amine Hamdi, Francesco Daghero, Giuseppe Maria Sarda, Josse Van Delm, Arne Symons, Luca Benini, Marian Verhelst, Daniele Jahier Pagliari, Alessio Burrello
2025	J	`jnl`	MC CoRR Shirui Zhao, Jun Yin, Lingyun Yao, Martin Andraud, Wannes Meert, Marian Verhelst
2025	—	`conf`	OpenGeMM: A Highly-Efficient GeMM Accelerator Generator with Lightweight RISC-V Control and Tight Memory Coupling. ASP-DAC Xiaoling Yi, Ryan Antonio, Joren Dumoulin, Jiacong Sun, Josse Van Delm, Guilherme Pereira Paim, Marian Verhelst
2025	J	`jnl`	P3-LLM: An Integrated NPU-PIM Accelerator for LLM Inference Using Hybrid Numerical Formats. CoRR Yuzong Chen, Chao Fang, Xilai Dai, Yuheng Wu, Thierry Tambe, Marian Verhelst, Mohamed S. Abdelfattah
2025	J	`jnl`	Precision-Scalable Microscaling Datapaths with Optimized Reduction Tree for Efficient NPU Integration. CoRR Stef Cuyckens, Xiaoling Yi, Robin Geens, Joren Dumoulin, Martin Wiesner, Chao Fang, Marian Verhelst
2025	J	`jnl`	Preclinical Evaluation of a Wearable Wristband With Compressed-Sensing Based Photoplethysmography. IEEE Trans. Biomed. Eng. Parvez Ahmmed, Emily Garceau, Tahmid Latif, Alec Brewer, James Dieffenderfer, Jose Manuel Valero-Sarmiento, Venkata Rajesh Pamula, Nick Van Helleputte, Chris Van Hoof, Marian Verhelst, Alper Bozkurt
2025	J	`jnl`	Stream: Design Space Exploration of Layer-Fused DNNs on Heterogeneous Dataflow Accelerators. IEEE Trans. Computers Arne Symons, Linyan Mei, Steven Colleman, Pouya Houshmand, Sebastian Karl, Marian Verhelst
2025	J	`jnl`	The Configuration Wall: Characterization and Elimination of Accelerator Configuration Overhead. CoRR Josse Van Delm, Anton Lydike, Joren Dumoulin, Jonas Crols, Xiaoling Yi, Ryan Antonio, Jackson Woodruff, Tobias Grosser, Marian Verhelst
2025	J	`jnl`	TinyML - From Efficient Edge Inference to On-Device Intelligence. IEEE Des. Test Theocharis Theocharides, Marian Verhelst, Vijay Janapa Reddy, Evgeni Gousev
2025	J	`jnl`	Torrent: A Distributed DMA for Efficient and Flexible Point-to-Multipoint Data Movement. CoRR Yunhao Deng, Fanchen Kong, Xiaoling Yi, Ryan Antonio, Marian Verhelst
2025	C	`conf`	XDMA: A Distributed, Extensible DMA Architecture for Layout-Flexible Data Movements in Heterogeneous Multi-Accelerator SoCs. ICCD Fanchen Kong, Yunhao Deng, Xiaoling Yi, Ryan Antonio, Marian Verhelst
2025	J	`jnl`	XDMA: A Distributed, Extensible DMA Architecture for Layout-Flexible Data Movements in Heterogeneous Multi-Accelerator SoCs. CoRR Fanchen Kong, Yunhao Deng, Xiaoling Yi, Ryan Antonio, Marian Verhelst
2025	—	`conf`	iEEG Seizure Detection with a Sparse Hyperdimensional Computing Accelerator. PRIME Stef Cuyckens, Ryan Antonio, Chao Fang, Marian Verhelst
2025	J	`jnl`	iEEG Seizure Detection with a Sparse Hyperdimensional Computing Accelerator. CoRR Stef Cuyckens, Ryan Antonio, Chao Fang, Marian Verhelst
2024	C	`conf`	Adaptive Block-Scaled GeMMs on Vector Processors for DNN Training at the Edge. VLSI-SoC Nitish Satya Murthy, Nathan Laubeuf, Debjyoti Bhattacharjee, Francky Catthoor, Marian Verhelst
2024	J	`jnl`	Analog or Digital In-memory Computing? Benchmarking through Quantitative Modeling. CoRR Jiacong Sun, Pouya Houshmand, Marian Verhelst
2024	J	`jnl`	Anda: Unlocking Efficient LLM Inference with a Variable-Length Grouped Activation Data Format. CoRR Chao Fang, Man Shi, Robin Geens, Arne Symons, Zhongfeng Wang, Marian Verhelst
2024	A*	`conf`	BitWave: Exploiting Column-Based Bit-Level Sparsity for Deep Learning Acceleration. HPCA Man Shi, Vikram Jain, Antony Joseph, Maurice Meijer, Marian Verhelst
2024	J	`jnl`	CMDS: Cross-layer Dataflow Optimization for DNN Accelerators Exploiting Multi-bank Memories. CoRR Man Shi, Steven Colleman, Charlotte VanDeMieroop, Antony Joseph, Maurice Meijer, Wim Dehaene, Marian Verhelst
2024	J	`jnl`	COAC: Cross-layer Optimization of Accelerator Configurability for Efficient CNN Processing. CoRR Steven Colleman, Man Shi, Marian Verhelst
2024	—	`conf`	Efficient DNN Training Using Vectorized Block-Scaled GeMMs with Adaptive Block Shapes. VLSI-SoC (Selected Papers) Nitish Satya Murthy, Nathan Laubeuf, Debjyoti Bhattacharjee, Francky Catthoor, Marian Verhelst
2024	C	`conf`	Enabling Efficient Hardware Acceleration of Hybrid Vision Transformer (ViT) Networks at the Edge. ISCAS Joren Dumoulin, Pouya Houshmand, Vikram Jain, Marian Verhelst
2024	—	`conf`	Energy Cost Modelling for Optimizing Large Language Model Inference on Hardware Accelerators. SOCC Robin Geens, Man Shi, Arne Symons, Chao Fang, Marian Verhelst
2024	J	`jnl`	HTVM: Efficient Neural Network Deployment On Heterogeneous TinyML Platforms. CoRR Josse Van Delm, Maarten Vandersteegen, Alessio Burrello, Giuseppe Maria Sarda, Francesco Conti, Daniele Jahier Pagliari, Luca Benini, Marian Verhelst
2024	—	`conf`	High-Rate. Compact In-Sensor Denoising for Active Stereo Vision Towards Embedded Depth Sensing. NewCAS Pouya Houshmand, Jean-Sebastien Staelens, Ward van der Tempel, Marian Verhelst
2024	J	`jnl`	MATCH: Model-Aware TVM-based Compilation for Heterogeneous Edge Devices. CoRR Mohamed Amine Hamdi, Francesco Daghero, Giuseppe Maria Sarda, Josse Van Delm, Arne Symons, Luca Benini, Marian Verhelst, Daniele Jahier Pagliari, Alessio Burrello
2024	J	`jnl`	OpenGeMM: A High-Utilization GeMM Accelerator Generator with Lightweight RISC-V Control and Tight Memory Coupling. CoRR Xiaoling Yi, Ryan Antonio, Joren Dumoulin, Jiacong Sun, Josse Van Delm, Guilherme Paim, Marian Verhelst
2024	J	`jnl`	Optimising GPGPU Execution Through Runtime Micro-Architecture Parameter Analysis. CoRR Giuseppe Maria Sarda, Nimish Shah, Debjyoti Bhattacharjee, Peter Debacker, Marian Verhelst
2024	J	`jnl`	Optimization of block-scaled integer GeMMs for efficient DNN deployment on scalable in-order vector processors. J. Syst. Archit. Nitish Satya Murthy, Francky Catthoor, Marian Verhelst
2024	—	`conf`	Optimizing Layer-Fused Scheduling of Transformer Networks on Multi-accelerator Platforms. ISQED Steven Colleman, Arne Symons, Victor J. B. Jung, Marian Verhelst
2024	J	`jnl`	Optimizing Layer-Fused Scheduling of Transformer Networks on Multi-accelerator Platforms. CoRR Steven Colleman, Arne Symons, Victor J. B. Jung, Marian Verhelst
2024	J	`jnl`	Pack my weights and run! Minimizing overheads for in-memory computing accelerators. CoRR Pouya Houshmand, Marian Verhelst
2024	—	`conf`	TinyML4D: Scaling Embedded Machine Learning Education in the Developing World. AAAI Spring Symposia Brian Plancher, Sebastian Büttrich, Jeremy Ellis, Neena Goveas, Laila D. Kazimierski, Jesús Alfonso López Sotelo, Milan Lukic, Diego Mendez, Rosdiadee Nordin, Andrés Oliva Trevisan, Massimo Pavan, Manuel Roveri, Marcus Rüb, Jackline Tum, Marian Verhelst, Salah Abdeljabar, Segun Adebayo, Thomas Amberg, Halleluyah Oluwatobi Aworinde, José Bagur, Gregg Barrett, Nabil Benamar, Bharat S. Chaudhari, Ronald Criollo, David Cuartielles, José A. Ferreira Filho, Solomon Gizaw, Evgeni Gousev, Alessandro Grande, Shawn Hymel, Peter Ing, Prashant Manandhar, Pietro Manzoni, Boris Murmann, Eric Pan, Rytis Paskauskas, Ermanno Pietrosemoli, Tales C. Pimenta, Marcelo Rovai, Marco Zennaro, Vijay Janapa Reddi
2024	A	`conf`	TreeGRNG: Binary Tree Gaussian Random Number Generator for Efficient Probabilistic AI Hardware. DATE Jonas Crols, Guilherme Paim, Shirui Zhao, Marian Verhelst
2023	—	`conf`	A 16nm 128kB high-density fully digital In Memory Compute macro with reverse SRAM pre-charge achieving 0.36TOPs/mm ESSCIRC Weijie Jiang, Pouya Houshmand, Marian Verhelst, Wim Dehaene
2023	—	`conf`	A 384-Channel Online-Spike-Sorting IC Using Unsupervised Geo-OSort Clustering and Achieving 0.0013mm ISSCC Yingping Chen, Bernardo Tacca, Yunzhu Chen, Dwaipayan Biswas, Georges G. E. Gielen, Francky Catthoor, Marian Verhelst, Carolina Mora Lopez
2023	J	`jnl`	A 96-Channel 40nm CMOS Potentiostat for Parallel Experiments on Microbial Electrochemical Systems. IEEE Trans. Circuits Syst. I Regul. Pap. Peishuo Li, Tom R. Molderez, David H. Villamor, Antonin Prévoteau, Marian Verhelst
2023	C	`conf`	ACCO: Automated Causal CNN Scheduling Optimizer for Real-Time Edge Accelerators. ICCD Jun Yin, Linyan Mei, Andre Guntoro, Marian Verhelst
2023	J	`jnl`	An End-to-End Dual ASIC OFDM Transceiver for Ultrasound In-Body Communication. IEEE Trans. Biomed. Circuits Syst. Thomas Bos, Marian Verhelst, Wim Dehaene
2023	J	`jnl`	An Online-Spike-Sorting IC Using Unsupervised Geometry-Aware OSort Clustering for Efficient Embedded Neural-Signal Processing. IEEE J. Solid State Circuits Yingping Chen, Bernardo Tacca, Yunzhu Chen, Dwaipayan Biswas, Georges G. E. Gielen, Francky Catthoor, Marian Verhelst, Carolina Mora Lopez
2023	A	`conf`	Analog or Digital In-Memory Computing? Benchmarking Through Quantitative Modeling. ICCAD Jiacong Sun, Pouya Houshmand, Marian Verhelst
2023	J	`jnl`	Benchmarking and modeling of analog and digital SRAM in-memory computing architectures. CoRR Pouya Houshmand, Jiacong Sun, Marian Verhelst
2023	—	`conf`	CMDS: Cross-layer Dataflow Optimization for DNN Accelerators Exploiting Multi-bank Memories. ISQED Man Shi, Steven Colleman, Charlotte VanDeMieroop, Antony Joseph, Maurice Meijer, Wim Dehaene, Marian Verhelst
2023	J	`jnl`	CNN-based Robust Sound Source Localization with SRP-PHAT for the Extreme Edge. ACM Trans. Embed. Comput. Syst. Jun Yin, Marian Verhelst
2023	J	`jnl`	COAC: Cross-Layer Optimization of Accelerator Configurability for Efficient CNN Processing. IEEE Trans. Very Large Scale Integr. Syst. Steven Colleman, Man Shi, Marian Verhelst
2023	J	`jnl`	DIANA: An End-to-End Hybrid DIgital and ANAlog Neural Network SoC for the Edge. IEEE J. Solid State Circuits Pouya Houshmand, Giuseppe Maria Sarda, Vikram Jain, Kodai Ueyoshi, Ioannis A. Papistas, Man Shi, Qilin Zheng, Debjyoti Bhattacharjee, Arindam Mallik, Peter Debacker, Diederik Verkest, Marian Verhelst
2023	A*	`conf`	DeFiNES: Enabling Fast Exploration of the Depth-first Scheduling Space for DNN Accelerators through Analytical Modeling. HPCA Linyan Mei, Koen Goetschalckx, Arne Symons, Marian Verhelst
2023	J	`jnl`	DepFiN: A 12-nm Depth-First, High-Resolution CNN Processor for IO-Efficient Inference. IEEE J. Solid State Circuits Koen Goetschalckx, Fengfeng Wu, Marian Verhelst
2023	A	`conf`	Genetic Algorithm-based Framework for Layer-Fused Scheduling of Multiple DNNs on Multi-core Systems. DATE Sebastian Karl, Arne Symons, Nael Fasfous, Marian Verhelst
2023	A*	`conf`	HTVM: Efficient Neural Network Deployment On Heterogeneous TinyML Platforms. DAC Josse Van Delm, Maarten Vandersteegen, Alessio Burrello, Giuseppe Maria Sarda, Francesco Conti, Daniele Jahier Pagliari, Luca Benini, Marian Verhelst
2023	—	`conf`	Hardware-aware NAS by Genetic Optimisation with a Design Space Exploration Simulator. CVPR Workshops Lotte Hendrickx, Arne Symons, Wiebe Van Ranst, Marian Verhelst, Toon Goedemé
2023	J	`jnl`	NeuroBench: Advancing Neuromorphic Computing through Collaborative, Fair and Representative Benchmarking. CoRR Jason Yik, Soikat Hasan Ahmed, Zergham Ahmed, Brian Anderson, Andreas G. Andreou, Chiara Bartolozzi, Arindam Basu, Douwe den Blanken, Petrut Bogdan, Sander M. Bohté, Younes Bouhadjar, Sonia M. Buckley, Gert Cauwenberghs, Federico Corradi, Guido de Croon, Andreea Danielescu, Anurag Reddy Daram, Mike Davies, Yigit Demirag, Jason Eshraghian, Jeremy Forest, Steve B. Furber, P. Michael Furlong, Aditya Gilra, Giacomo Indiveri, Siddharth Joshi, Vedant Karia, Lyes Khacef, James C. Knight, Laura Kriener, Rajkumar Kubendran, Dhireesha Kudithipudi, Gregor Lenz, Rajit Manohar, Christian Mayr, Konstantinos P. Michmizos, Dylan R. Muir, Emre Neftci, Thomas Nowotny, Fabrizio Ottati, Ayça Özcelikkale, Noah Pacik-Nelson, Priyadarshini Panda, Pao-Sheng Sun, Melika Payvand, Christian Pehle, Mihai A. Petrovici, Christoph Posch, Alpha Renner, Yulia Sandamirskaya, Clemens JS Schaefer, André van Schaik, Johannes Schemmel, Catherine D. Schuman, Jae-sun Seo, Sumit Bam Shrestha, Manolis Sifalakis, Amos Sironi, Kenneth Michael Stewart, Terrence C. Stewart, Philipp Stratmann, Guangzhi Tang, Jonathan Timcheck, Marian Verhelst, Craig M. Vineyard, Bernhard Vogginger, Amirreza Yousefzadeh, Biyan Zhou, Fatima Tuz Zohora, Charlotte Frenkel, Vijay Janapa Reddi
2023	—	`conf`	Optimising GPGPU Execution Through Runtime Micro-Architecture Parameter Analysis. IISWC Giuseppe Maria Sarda, Nimish Shah, Debjyoti Bhattacharjee, Peter Debacker, Marian Verhelst
2023	A*	`conf`	PATRONoC: Parallel AXI Transport Reducing Overhead for Networks-on-Chip targeting Multi-Accelerator DNN Platforms at the Edge. DAC Vikram Jain, Matheus A. Cavalcante, Nazareno Bruschi, Michael Rogenmoser, Thomas Benz, Andreas Kurth, Davide Rossi, Luca Benini, Marian Verhelst
2023	J	`jnl`	PATRONoC: Parallel AXI Transport Reducing Overhead for Networks-on-Chip targeting Multi-Accelerator DNN Platforms at the Edge. CoRR Vikram Jain, Matheus A. Cavalcante, Nazareno Bruschi, Michael Rogenmoser, Thomas Benz, Andreas Kurth, Davide Rossi, Luca Benini, Marian Verhelst
2023	A	`conf`	PetaOps/W edge-AI $\mu$ Processors: Myth or reality? DATE Manil Dev Gomony, Floran de Putter, Anteneh Gebregiorgis, Gianna Paulin, Linyan Mei, Vikram Jain, Said Hamdioui, Victor Sanchez, Tobias Grosser, Marc Geilen, Marian Verhelst, Friedemann Zenke, Frank K. Gürkaynak, Barry de Bruin, Sander Stuijk, Simon Davidson, Sayandip De, Mounir Ghogho, Alexandra Jimborean, Sherif Eissa, Luca Benini, Dimitrios Soudris, Rajendra Bishnoi, Sam Ainsworth, Federico Corradi, Ouassim Karrakchou, Tim Güneysu, Henk Corporaal
2023	A	`conf`	Precision-aware Latency and Energy Balancing on Multi-Accelerator Platforms for DNN Inference. ISLPED Matteo Risso, Alessio Burrello, Giuseppe Maria Sarda, Luca Benini, Enrico Macii, Massimo Poncino, Marian Verhelst, Daniele Jahier Pagliari
2023	J	`jnl`	Precision-aware Latency and Energy Balancing on Multi-Accelerator Platforms for DNN Inference. CoRR Matteo Risso, Alessio Burrello, Giuseppe Maria Sarda, Luca Benini, Enrico Macii, Massimo Poncino, Marian Verhelst, Daniele Jahier Pagliari
2023	—	`conf`	Quantized Dynamics Models for Hardware-Efficient Control and Planning in Model-Based RL. PKDD/ECML Workshops (5) Nitish Satya Murthy, Francky Catthoor, Marian Verhelst, Peter Vrancx
2023	A	`conf`	Real-Time Acoustic Perception for Automotive Applications. DATE Jun Yin, Stefano Damiano, Marian Verhelst, Toon van Waterschoot, Andre Guntoro
2023	—	`conf`	SALSA: Simulated Annealing based Loop-Ordering Scheduler for DNN Accelerators. AICAS Victor J. B. Jung, Arne Symons, Linyan Mei, Marian Verhelst, Luca Benini
2023	J	`jnl`	SALSA: Simulated Annealing based Loop-Ordering Scheduler for DNN Accelerators. CoRR Victor J. B. Jung, Arne Symons, Linyan Mei, Marian Verhelst, Luca Benini
2023	B	`conf`	Stream: A Modeling Framework for Fine-grained Layer Fusion on Multi-core DNN Accelerators. ISPASS Arne Symons, Linyan Mei, Steven Colleman, Pouya Houshmand, Sebastian Karl, Marian Verhelst
2023	J	`jnl`	TinyVers: A Tiny Versatile System-on-Chip With State-Retentive eMRAM for ML Inference at the Extreme Edge. IEEE J. Solid State Circuits Vikram Jain, Juan Sebastian Piedrahita Giraldo, Jaro De Roose, Linyan Mei, Bert Boons, Marian Verhelst
2023	J	`jnl`	TinyVers: A Tiny Versatile System-on-chip with State-Retentive eMRAM for ML Inference at the Extreme Edge. CoRR Vikram Jain, Juan Sebastian Piedrahita Giraldo, Jaro De Roose, Linyan Mei, Bert Boons, Marian Verhelst
2022	—	`conf`	A Flexible End-to-End Dual ASIC Transceiver for OFDM Ultrasound In-Body Communication. BioCAS Thomas Bos, Marian Verhelst, Wim Dehaene
2022	A	`conf`	A Uniform Latency Model for DNN Accelerators with Diverse Architectures and Dataflows. DATE Linyan Mei, Huichu Liu, Tony F. Wu, Huseyin Ekin Sumbul, Marian Verhelst, Edith Beigné
2022	J	`jnl`	CONVOLVE: Smart and seamless design of smart edge processors. CoRR Manil Dev Gomony, Floran de Putter, Anteneh Gebregiorgis, Gianna Paulin, Linyan Mei, Vikram Jain, Said Hamdioui, Victor Sanchez, Tobias Grosser, Marc Geilen, Marian Verhelst, Frank K. Zenke, Frank K. Gürkaynak, Barry de Bruin, Sander Stuijk, Simon Davidson, Sayandip De, Mounir Ghogho, Alexandra Jimborean, Sherif Eissa, Luca Benini, Dimitrios Soudris, Rajendra Bishnoi, S. Ainsworth, Federico Corradi, Ouassim Karrakchou, Tim Güneysu, Henk Corporaal
2022	—	`conf`	DIANA: An End-to-End Energy-Efficient Digital and ANAlog Hybrid Neural Network SoC. ISSCC Kodai Ueyoshi, Ioannis A. Papistas, Pouya Houshmand, Giuseppe Maria Sarda, Vikram Jain, Man Shi, Qilin Zheng, Juan Sebastian Piedrahita Giraldo, Peter Vrancx, Jonas Doevenspeck, Debjyoti Bhattacharjee, Stefan Cosemans, Arindam Mallik, Peter Debacker, Diederik Verkest, Marian Verhelst
2022	A*	`conf`	DPU-v2: Energy-efficient execution of irregular directed acyclic graphs. MICRO Nimish Shah, Wannes Meert, Marian Verhelst
2022	J	`jnl`	DPU-v2: Energy-efficient execution of irregular directed acyclic graphs. CoRR Nimish Shah, Wannes Meert, Marian Verhelst
2022	J	`jnl`	DPU: DAG Processing Unit for Irregular Graphs With Precision-Scalable Posit Arithmetic in 28 nm. IEEE J. Solid State Circuits Nimish Shah, Laura Isabel Galindez Olascoaga, Shirui Zhao, Wannes Meert, Marian Verhelst
2022	J	`jnl`	DeFiNES: Enabling Fast Exploration of the Depth-first Scheduling Space for DNN Accelerators through Analytical Modeling. CoRR Linyan Mei, Koen Goetschalckx, Arne Symons, Marian Verhelst
2022	J	`jnl`	Delta Keyword Transformer: Bringing Transformers to the Edge through Dynamically Pruned Multi-Head Self-Attention. CoRR Zuzana Jelcicová, Marian Verhelst
2022	A	`conf`	Discrete Samplers for Approximate Inference in Probabilistic Machine Learning. DATE Shirui Zhao, Nimish Shah, Wannes Meert, Marian Verhelst
2022	J	`jnl`	Enabling real-time object detection on low cost FPGAs. J. Real Time Image Process. Vikram Jain, Ninad Jadhav, Marian Verhelst
2022	J	`jnl`	Fair and Comprehensive Benchmarking of Machine Learning Processing Chips. IEEE Des. Test Geoffrey W. Burr, Sukhwan Lim, Boris Murmann, Rangharajan Venkatesan, Marian Verhelst
2022	J	`jnl`	GraphOpt: Constrained-Optimization-Based Parallelization of Irregular Graphs. IEEE Trans. Parallel Distributed Syst. Nimish Shah, Wannes Meert, Marian Verhelst
2022	J	`jnl`	Hardware-aware mobile building block evaluation for computer vision. CoRR Maxim Bonnaerens, Matthias Freiberger, Marian Verhelst, Joni Dambre
2022	Misc	`conf`	Learn to Learn on Chip: Hardware-aware Meta-learning for Quantized Few-shot Learning at the Edge. SEC Nitish Satya Murthy, Peter Vrancx, Nathan Laubeuf, Peter Debacker, Francky Catthoor, Marian Verhelst
2022	—	`conf`	Optimizing Accelerator Configurability for Mobile Transformer Networks. AICAS Steven Colleman, Peter Zhu, Wei Sun, Marian Verhelst
2022	J	`jnl`	Taxonomy and Benchmarking of Precision-Scalable MAC Arrays Under Enhanced DNN Dataflow Representation. IEEE Trans. Circuits Syst. I Regul. Pap. Ehab M. Ibrahim, Linyan Mei, Marian Verhelst
2022	—	`conf`	TinyVers: A 0.8-17 TOPS/W, 1.7 μW-20 mW, Tiny Versatile System-on-chip with State-Retentive eMRAM for Machine Learning Inference at the Extreme Edge. VLSI Technology and Circuits Vikram Jain, Juan Sebastian Piedrahita Giraldo, Jaro De Roose, Bert Boons, Linyan Mei, Marian Verhelst
2022	J	`jnl`	Towards Heterogeneous Multi-core Accelerators Exploiting Fine-grained Scheduling of Layer-Fused Deep Neural Networks. CoRR Arne Symons, Linyan Mei, Steven Colleman, Pouya Houshmand, Sebastian Karl, Marian Verhelst
2021	—	`conf`	9.4 PIU: A 248GOPS/W Stream-Based Processor for Irregular Probabilistic Inference Networks Using Precision-Scalable Posit Arithmetic in 28nm. ISSCC Nimish Shah, Laura Isabel Galindez Olascoaga, Shirui Zhao, Wannes Meert, Marian Verhelst
2021	—	`conf`	A 96-channel 40nm CMOS Fully-Integrated Potentiostat for Electrochemical Monitoring. ESSCIRC Peishuo Li, Tom R. Molderez, Marian Verhelst
2021	—	`conf`	A 96-channel 40nm CMOS Fully-Integrated Potentiostat for Electrochemical Monitoring. ESSDERC Peishuo Li, Tom R. Molderez, Marian Verhelst
2021	J	`jnl`	A Scalable 128-Channel, Time-Multiplexed Potentiostat for Parallel Electrochemical Experiments. IEEE Trans. Circuits Syst. I Regul. Pap. Tom R. Molderez, Korneel Rabaey, Marian Verhelst
2021	J	`jnl`	Acceleration of probabilistic reasoning through custom processor architecture. CoRR Nimish Shah, Laura Isabel Galindez Olascoaga, Wannes Meert, Marian Verhelst
2021	—	`conf`	Analyzing the Energy-Latency-Area-Accuracy Trade-off Across Contemporary Neural Networks. AICAS Vikram Jain, Linyan Mei, Marian Verhelst
2021	J	`jnl`	DPU: DAG Processing Unit for Irregular Graphs with Precision-Scalable Posit Arithmetic in 28nm. CoRR Nimish Shah, Laura Isabel Galindez Olascoaga, Shirui Zhao, Wannes Meert, Marian Verhelst
2021	—	`conf`	DepFiN: A 12nm, 3.8TOPs depth-first CNN processor for high res. image processing. VLSI Circuits Koen Goetschalckx, Marian Verhelst
2021	J	`jnl`	Efficient Execution of Temporal Convolutional Networks for Embedded Keyword Spotting. IEEE Trans. Very Large Scale Integr. Syst. Juan Sebastian Piedrahita Giraldo, Vikram Jain, Marian Verhelst
2021	J	`jnl`	GRAPHOPT: constrained optimization-based parallelization of irregular graphs. CoRR Nimish Shah, Wannes Meert, Marian Verhelst
2021	J	`jnl`	Hardware Acceleration for Embedded Keyword Spotting: Tutorial and Survey. ACM Trans. Embed. Comput. Syst. Juan Sebastian Piedrahita Giraldo, Marian Verhelst
2021	J	`jnl`	Hardware-Efficient Residual Neural Network Execution in Line-Buffer Depth-First Processing. IEEE J. Emerg. Sel. Topics Circuits Syst. Man Shi, Pouya Houshmand, Linyan Mei, Marian Verhelst
2021	J	`jnl`	High-Utilization, High-Flexibility Depth-First CNN Coprocessor for Image Pixel Processing on FPGA. IEEE Trans. Very Large Scale Integr. Syst. Steven Colleman, Marian Verhelst
2021	—	`conf`	LOMA: Fast Auto-Scheduling on DNN Accelerators through Loop-Order-based Memory Allocation. AICAS Arne Symons, Linyan Mei, Marian Verhelst
2021	—	`conf`	PeakRNN and StatsRNN: Dynamic Pruning in Recurrent Neural Networks. EUSIPCO Zuzana Jelcicová, Rasmus Jones, David Thorn Blix, Marian Verhelst, Jens Sparsø
2021	J	`jnl`	Performance analysis of in-band collision detection for dense wireless networks. EURASIP J. Wirel. Commun. Netw. Tom Vermeulen, Brecht Reynders, Fernando E. Rosas, Marian Verhelst, Sofie Pollin
2021	J	`jnl`	ProbLP: A framework for low-precision probabilistic inference. CoRR Nimish Shah, Laura Isabel Galindez Olascoaga, Wannes Meert, Marian Verhelst
2021	C	`conf`	Processor Architecture Optimization for Spatially Dynamic Neural Networks. VLSI-SoC Steven Colleman, Thomas Verelst, Linyan Mei, Tinne Tuytelaars, Marian Verhelst
2021	J	`jnl`	Survey and Benchmarking of Precision-Scalable MAC Arrays for Embedded DNN Processing. CoRR Ehab M. Ibrahim, Linyan Mei, Marian Verhelst
2021	J	`jnl`	ZigZag: Enlarging Joint Architecture-Mapping Design Space Exploration for DNN Accelerators. IEEE Trans. Computers Linyan Mei, Pouya Houshmand, Vikram Jain, Juan Sebastian Piedrahita Giraldo, Marian Verhelst
2020	J	`jnl`	A 5-GS/s 158.6-mW 9.4-ENOB Passive-Sampling Time-Interleaved Three-Stage Pipelined-SAR ADC With Analog-Digital Corrections in 28-nm CMOS. IEEE J. Solid State Circuits Athanasios T. Ramkaj, Juan Carlos Pena Ramos, Marcel J. M. Pelgrom, Michiel S. J. Steyaert, Marian Verhelst, Filip Tavernier
2020	A	`conf`	Acceleration of probabilistic reasoning through custom processor architecture. DATE Nimish Shah, Laura Isabel Galindez Olascoaga, Wannes Meert, Marian Verhelst
2020	—	`conf`	An Affordable Multichannel Potentiostat with 128 Individual Stimulation and Sensing Channels. I2MTC Tom R. Molderez, Korneel Rabaey, Marian Verhelst
2020	J	`jnl`	Benchmarking TinyML Systems: Challenges and Direction. CoRR Colby R. Banbury, Vijay Janapa Reddi, Max Lam, William Fu, Amin Fazel, Jeremy Holleman, Xinyuan Huang, Robert Hurtado, David Kanter, Anton Lokhmotov, David A. Patterson, Danilo Pau, Jae-sun Seo, Jeff Sieracki, Urmish Thakker, Marian Verhelst, Poonam Yadav
2020	J	`jnl`	Binary CorNET: Accelerator for HR Estimation From Wrist-PPG. IEEE Trans. Biomed. Circuits Syst. Leandro Mateus Giacomini Rocha, Dwaipayan Biswas, Bram-Ernst Verhoef, Sergio Bampi, Chris Van Hoof, Mario Konijnenburg, Marian Verhelst, Nick Van Helleputte
2020	B	`conf`	Discriminative Bias for Learning Probabilistic Sentential Decision Diagrams. IDA Laura Isabel Galindez Olascoaga, Wannes Meert, Nimish Shah, Guy Van den Broeck, Marian Verhelst
2020	J	`jnl`	Distributed adaptive node-specific signal estimation in a wireless sensor network with noisy links. Signal Process. Fernando de la Hucha Arce, Marc Moonen, Marian Verhelst, Alexander Bertrand
2020	—	`conf`	Dynamic Complexity Tuning for Hardware-Aware Probabilistic Circuits. IoT Streams/ITEM@PKDD/ECML Laura Isabel Galindez Olascoaga, Wannes Meert, Nimish Shah, Marian Verhelst
2020	—	`conf`	Feed-Forward On-Edge Fine-Tuning Using Static Synthetic Gradient Modules. ECCV Workshops (5) Robby Neven, Marian Verhelst, Tinne Tuytelaars, Toon Goedemé
2020	J	`jnl`	Feed-Forward On-Edge Fine-tuning Using Static Synthetic Gradient Modules. CoRR Robby Neven, Marian Verhelst, Tinne Tuytelaars, Toon Goedemé
2020	J	`jnl`	On the Convexity of Bit Depth Allocation for Linear MMSE Estimation in Wireless Sensor Networks. IEEE Signal Process. Lett. Fernando de la Hucha Arce, Panagiotis Patrinos, Marian Verhelst, Alexander Bertrand
2020	J	`jnl`	Vocell: A 65-nm Speech-Triggered Wake-Up SoC for 10- $\mu$ W Keyword Spotting and Speaker Verification. IEEE J. Solid State Circuits Juan Sebastian Piedrahita Giraldo, Steven Lauwereins, Komail M. H. Badami, Marian Verhelst
2020	J	`jnl`	ZigZag: A Memory-Centric Rapid DNN Accelerator Design Space Exploration Framework. CoRR Linyan Mei, Pouya Houshmand, Vikram Jain, Juan Sebastian Piedrahita Giraldo, Marian Verhelst
2019	—	`conf`	18μW SoC for near-microphone Keyword Spotting and Speaker Verification. VLSI Circuits Juan Sebastian Piedrahita Giraldo, Steven Lauwereins, Komail M. H. Badami, Hugo Van hamme, Marian Verhelst
2019	—	`conf`	A 5GS/s 158.6mW 12b Passive-Sampling 8×-Interleaved Hybrid ADC with 9.4 ENOB and 160.5dB FoMS in 28nm CMOS. ISSCC Athanasios Ramkaj, Juan Carlos Pena Ramos, Yifan Lyu, Maarten Strackx, Marcel J. M. Pelgrom, Michiel Steyaert, Marian Verhelst, Filip Tavernier
2019	—	`conf`	A 64-channel, 1.1-pA-accurate On-chip Potentiostat for Parallel Electrochemical Monitoring. ESSCIRC Peishuo Li, Tom R. Molderez, Frederik Ceyssens, Korneel Rabaey, Marian Verhelst
2019	—	`conf`	A 978GOPS/W Flexible Streaming Processor for Real-Time Image Processing Applications in 22nm FDSOI. ISSCC Sander Smets, Toon Goedemé, Anurag Mittal, Marian Verhelst
2019	J	`jnl`	A Current-Driven Six-Channel Potentiostat for Rapid Performance Characterization of Microbial Electrolysis Cells. IEEE Trans. Instrum. Meas. Tom R. Molderez, Xu Zhang, Korneel Rabaey, Marian Verhelst
2019	C	`conf`	A Wearable Wrist-Band with Compressive Sensing based Ultra-Low Power Photoplethysmography Readout Circuit. BSN Parvez Ahmmed, James Dieffenderfer, Jose Manuel Valero-Sarmiento, Venkata Rajesh Pamula, Nick Van Helleputte, Chris Van Hoof, Marian Verhelst, Alper Bozkurt
2019	J	`jnl`	An Always-On 3.8 $\mu$ J/86% CIFAR-10 Mixed-Signal Binary CNN Processor With All Memory on Chip in 28-nm CMOS. IEEE J. Solid State Circuits Daniel Bankman, Lita Yang, Bert Moons, Marian Verhelst, Boris Murmann
2019	J	`jnl`	Breaking High-Resolution CNN Bandwidth Barriers With Enhanced Depth-First Execution. IEEE J. Emerg. Sel. Topics Circuits Syst. Koen Goetschalckx, Marian Verhelst
2019	J	`jnl`	Editorial TVLSI Positioning - Continuing and Accelerating an Upward Trajectory. IEEE Trans. Very Large Scale Integr. Syst. Massimo Alioto, Magdy S. Abadir, Tughrul Arslan, Chirn Chye Boon, Andreas Burg, Chip-Hong Chang, Meng-Fan Chang, Yao-Wen Chang, Poki Chen, Pasquale Corsonello, Paolo Crovetti, Shiro Dosho, Rolf Drechsler, Ibrahim Abe M. Elfadel, Ruonan Han, Masanori Hashimoto, Chun-Huat Heng, Deukhyoun Heo, Tsung-Yi Ho, Houman Homayoun, Yuh-Shyan Hwang, Ajay Joshi, Rajiv V. Joshi, Tanay Karnik, Chulwoo Kim, Tony Tae-Hyoung Kim, Jaydeep P. Kulkarni, Volkan Kursun, Yoonmyung Lee, Hai Helen Li, Huawei Li, Prabhat Mishra, Baker Mohammad, Mehran Mozaffari Kermani, Makoto Nagata, Koji Nii, Partha Pratim Pande, Bipul C. Paul, Vasilis F. Pavlidis, José Pineda de Gyvez, Ioannis Savidis, Patrick Schaumont, Fabio Sebastiano, Anirban Sengupta, Mingoo Seok, Mircea R. Stan, Mark Tehranipoor, Aida Todri-Sanial, Marian Verhelst, Valerio Vignoli, Xiaoqing Wen, Jiang Xu, Wei Zhang, Zhengya Zhang, Jun Zhou, Mark Zwolinski, Stacey Weber
2019	C	`conf`	Efficient Keyword Spotting through Hardware-Aware Conditional Execution of Deep Neural Networks. AICCSA Juan Sebastian Piedrahita Giraldo, Chris O'Connor, Marian Verhelst
2019	J	`jnl`	Enabling Ultrasound In-Body Communication: FIR Channel Models and QAM Experiments. IEEE Trans. Biomed. Circuits Syst. Thomas Bos, Wentao Jiang, Jan D'hooge, Marian Verhelst, Wim Dehaene
2019	A	`conf`	Exploration and Design of Low-Energy Logic Cells for 1 kHz Always-on Systems. DATE Maxime Feyerick, Jaro De Roose, Marian Verhelst
2019	—	`conf`	On Hardware-Aware Probabilistic Frameworks for Resource Constrained Embedded Applications. EMC2@NeurIPS Laura Isabel Galindez Olascoaga, Wannes Meert, Nimish Shah, Guy Van den Broeck, Marian Verhelst
2019	A*	`conf`	ProbLP: A framework for low-precision probabilistic inference. DAC Nimish Shah, Laura Isabel Galindez Olascoaga, Wannes Meert, Marian Verhelst
2019	—	`conf`	Real-time HR Estimation from wrist PPG using Binary LSTMs. BioCAS Leandro Mateus Giacomini Rocha, Nick Van Helleputte, Muqing Liu, Dwaipayan Biswas, Bram-Ernst Verhoef, Sergio Bampi, Chris H. Kim, Chris Van Hoof, Mario Konijnenburg, Marian Verhelst
2019	J	`jnl`	Review and Benchmarking of Precision-Scalable Multiply-Accumulate Unit Architectures for Embedded Neural-Network Processing. IEEE J. Emerg. Sel. Topics Circuits Syst. Vincent Camus, Linyan Mei, Christian C. Enz, Marian Verhelst
2019	—	`conf`	Sub-Word Parallel Precision-Scalable MAC Engines for Efficient Embedded DNN Inference. AICAS Linyan Mei, Mohit Dandekar, Dimitrios Rodopoulos, Jeremy Constantin, Peter Debacker, Rudy Lauwereins, Marian Verhelst
2019	—	`conf`	Survey of Precision-Scalable Multiply-Accumulate Units for Neural-Network Processing. AICAS Vincent Camus, Christian C. Enz, Marian Verhelst
2019	A*	`conf`	Towards Hardware-Aware Tractable Learning of Probabilistic Models. NeurIPS Laura Isabel Galindez Olascoaga, Wannes Meert, Nimish Shah, Marian Verhelst, Guy Van den Broeck
2019	—	`conf`	Ultrasound In-Body Communication with OFDM through Multipath Realistic Channels. BioCAS Thomas Bos, Wim Dehaene, Marian Verhelst
2018	—	`conf`	A 0.6V 54DB SNR Analog Frontend with 0.18% THD for Low Power Sensory Applications in 65NM CMOS. VLSI Circuits Komail M. H. Badami, Kushal Dakshina Murthy, Pieter Harpe, Marian Verhelst
2018	J	`jnl`	A Fully Configurable Non-Linear Mixed-Signal Interface for Multi-Sensor Analytics. IEEE J. Solid State Circuits Juan Carlos Pena Ramos, Komail M. H. Badami, Steven Lauwereins, Marian Verhelst
2018	J	`jnl`	A multi-layered energy consumption model for smart wireless acoustic sensor networks. CoRR Gert Dekkers, Fernando Rosas, Steven Lauwereins, Sreeraj Rajendran, Sofie Pollin, Bart Vanrumste, Toon van Waterschoot, Marian Verhelst, Peter Karsmakers
2018	—	`conf`	An always-on 3.8μJ/86% CIFAR-10 mixed-signal binary CNN processor with all memory on chip in 28nm CMOS. ISSCC Daniel Bankman, Lita Yang, Bert Moons, Marian Verhelst, Boris Murmann
2018	J	`jnl`	BinarEye: An Always-On Energy-Accuracy-Scalable Binary CNN Processor With All Memory On Chip in 28nm CMOS. CoRR Bert Moons, Daniel Bankman, Lita Yang, Boris Murmann, Marian Verhelst
2018	—	`conf`	BinarEye: An always-on energy-accuracy-scalable binary CNN processor with all memory on chip in 28nm CMOS. CICC Bert Moons, Daniel Bankman, Lita Yang, Boris Murmann, Marian Verhelst
2018	C	`conf`	Bit Error Tolerance of a CIFAR-10 Binarized Convolutional Neural Network Processor. ISCAS Lita Yang, Daniel Bankman, Bert Moons, Marian Verhelst, Boris Murmann
2018	J	`jnl`	Dynamic Sensor-Frontend Tuning for Resource Efficient Embedded Classification. IEEE J. Emerg. Sel. Topics Circuits Syst. Laura Isabel Galindez Olascoaga, Komail M. H. Badami, Jonas Vlasselaer, Wannes Meert, Marian Verhelst
2018	—	`conf`	Efficiently Combining SVD, Pruning, Clustering and Retraining for Enhanced Neural Network Compression. EMDL@MobiSys Koen Goetschalckx, Bert Moons, Patrick Wambacq, Marian Verhelst
2018	J	`jnl`	Energy-Efficient Digital Front-End Processor for 60 GHz Polar Transmitter. J. Signal Process. Syst. Chunshu Li, Yanxiang Huang, Khaled Khalaf, André Bourdoux, Marian Verhelst, Liesbet Van der Perre, Sofie Pollin
2018	—	`conf`	Evolving hardware instinctive behaviors in resource-scarce agent swarms exploring hard-to-reach environments. GECCO (Companion) Martin Andraud, Ahmed Hallawa, Jaro De Roose, Eugenio Cantatore, Gerd Ascheid, Marian Verhelst
2018	—	`conf`	Exploiting FDSOI Towards Minimum Energy Point Operation in Processors and Machine Learning Accelerators. ESSCIRC Marian Verhelst
2018	—	`conf`	Exploiting FDSOI towards minimum energy point operation in processors and machine learning accelerators. ESSDERC Marian Verhelst
2018	B	`conf`	Feature noise tuning for resource efficient Bayesian Network Classifiers. ESANN Laura Isabel Galindez Olascoaga, Jonas Vlasselaer, Wannes Meert, Marian Verhelst
2018	—	`conf`	Flexible and Self-Adaptive Sense-and-Compress for Sub-MicroWatt Always-on Sensory Recording. ESSCIRC Jaro De Roose, Haoming Xin, Martin Andraud, Pieter J. A. Harpe, Marian Verhelst
2018	C	`conf`	From on-chip self-healing to self-adaptivity in analog/RF ICs: challenges and opportunities. IOLTS Martin Andraud, Marian Verhelst
2018	—	`conf`	Laika: A 5uW Programmable LSTM Accelerator for Always-on Keyword Spotting in 65nm CMOS. ESSCIRC Juan Sebastian Piedrahita Giraldo, Marian Verhelst
2018	—	`conf`	Mixed-signal programmable non-linear interface for resource-efficient multi-sensor analytics. ISSCC Komail M. H. Badami, Juan Carlos Pena Ramos, Steven Lauwereins, Marian Verhelst
2018	A	`conf`	On the use of Bayesian Networks for Resource-Efficient Self-Calibration of Analog/RF ICs. ITC Martin Andraud, Laura Isabel Galindez Olascoaga, Yichuan Lu, Yiorgos Makris, Marian Verhelst
2018	J	`jnl`	Optimized Hierarchical Cascaded Processing. IEEE J. Emerg. Sel. Topics Circuits Syst. Koen Goetschalckx, Bert Moons, Steven Lauwereins, Martin Andraud, Marian Verhelst
2018	J	`jnl`	Resource aware design of a deep convolutional-recurrent neural network for speech recognition through audio-visual sensor fusion. CoRR Matthijs Van Keirsbilck, Bert Moons, Marian Verhelst
2018	A*	`conf`	TRIG: hardware accelerator for inference-based applications and experimental demonstration using carbon nanotube FETs. DAC Gage Hills, Daniel Bankman, Bert Moons, Lita Yang, Jake Hillard, Alex Kahng, Rebecca Park, Marian Verhelst, Boris Murmann, Max M. Shulaker, H.-S. Philip Wong, Subhasish Mitra
2018	—	`conf`	Towards Resource-Efficient Classifiers for Always-On Monitoring. ECML/PKDD (3) Jonas Vlasselaer, Wannes Meert, Marian Verhelst
2017	—	`conf`	14.5 Envision: A 0.26-to-10TOPS/W subword-parallel dynamic-voltage-accuracy-frequency-scalable Convolutional Neural Network processor in 28nm FDSOI. ISSCC Bert Moons, Roel Uytterhoeven, Wim Dehaene, Marian Verhelst
2017	J	`jnl`	A 172 µW Compressively Sampled Photoplethysmographic (PPG) Readout ASIC With Heart Rate Estimation Directly From Compressively Sampled Data. IEEE Trans. Biomed. Circuits Syst. Venkata Rajesh Pamula, Jose Manuel Valero-Sarmiento, Long Yan, Alper Bozkurt, Chris Van Hoof, Nick Van Helleputte, Refet Firat Yazicioglu, Marian Verhelst
2017	J	`jnl`	Adaptive Quantization for Multichannel Wiener Filter-Based Speech Enhancement in Wireless Acoustic Sensor Networks. Wirel. Commun. Mob. Comput. Fernando de la Hucha Arce, Marc Moonen, Marian Verhelst, Alexander Bertrand
2017	—	`conf`	An 8-11b 320kS/s resolution scalable noise shaping SAR ADC. NEWCAS Thomas Bos, Komail M. H. Badami, Wim Dehaene, Marian Verhelst
2017	J	`jnl`	An Energy-Efficient Precision-Scalable ConvNet Processor in 40-nm CMOS. IEEE J. Solid State Circuits Bert Moons, Marian Verhelst
2017	A	`conf`	DVAFS: Trading computational accuracy for energy through dynamic-voltage-accuracy-frequency-scaling. DATE Bert Moons, Roel Uytterhoeven, Wim Dehaene, Marian Verhelst
2017	A	`conf`	Exploring the unknown through successive generations of low power and low resource versatile agents. DATE Martin Andraud, Gönenç Berkol, Jaro De Roose, Santosh Gannavarapu, Haoming Xin, Eugenio Cantatore, Pieter J. A. Harpe, Marian Verhelst, Peter G. M. Baltus
2017	—	`conf`	F3: Beyond the horizon of conventional computing: From deep learning to neuromorphic systems. ISSCC Meng-Fan Chang, Jun Deguchi, Vivek De, Masato Motomura, Shinichiro Shiratake, Marian Verhelst
2017	Misc	`conf`	Impact of interference correlation on the decoding error statistics. ACSSC Fernando Rosas, Konstantinos Manolakis, Christian Oberli, Mohammad Mahdi Azari, Marian Verhelst, Sofie Pollin
2017	—	`conf`	Instinct-driven dynamic hardware reconfiguration: evolutionary algorithm optimized compression for autonomous sensory agents. GECCO (Companion) Ahmed Hallawa, Jaro De Roose, Martin Andraud, Marian Verhelst, Gerd Ascheid
2017	J	`jnl`	Minimum Energy Quantized Neural Networks. CoRR Bert Moons, Koen Goetschalckx, Nick Van Berckelaer, Marian Verhelst
2017	Misc	`conf`	Minimum energy quantized neural networks. ACSSC Bert Moons, Koen Goetschalckx, Nick Van Berckelaer, Marian Verhelst
2017	J	`jnl`	Multidisciplinary Learning through Implementation of the DVB-S2 Standard. IEEE Commun. Mag. Yuri Murillo, Bertold Van den Bergh, Jona Beysens, Alexander Bertrand, Wim Dehaene, Panagiotis Patrinos, Tinne Tuytelaars, Ruth Vazquez Sabariego, Marian Verhelst, Patrick Wambacq, Sofie Pollin
2017	B	`conf`	Optimal Tiling Strategy for Memory Bandwidth Reduction for CNNs. ACIVS Leonardo Cecconi, Sander Smets, Luca Benini, Marian Verhelst
2017	J	`jnl`	Split-Delta Background Calibration for SAR ADCs. IEEE Trans. Circuits Syst. II Express Briefs Juan Carlos Pena Ramos, Marian Verhelst
2017	C	`conf`	Successive parabolic interpolation as extremum seeking control for microbial fuel & electrolysis cells. IECON Tom R. Molderez, Bas de Wit, Korneel Rabaey, Marian Verhelst
2017	—	`conf`	The SINS Database for Detection of Daily Activities in a Home Environment Using an Acoustic Sensor Network. DCASE Gert Dekkers, Steven Lauwereins, Bart Thoen, Mulu Weldegebreal Adhana, Henk Brouckxon, Bertold Van den Bergh, Toon van Waterschoot, Bart Vanrumste, Marian Verhelst, Peter Karsmakers
2016	—	`conf`	22.4 A 172µW compressive sampling photoplethysmographic readout with embedded direct heart-rate and variability extraction from compressively sampled data. ISSCC Pamula Venkata Rajesh, Jose Manuel Valero-Sarmiento, Long Yan, Alper Bozkurt, Chris Van Hoof, Nick Van Helleputte, Refet Firat Yazicioglu, Marian Verhelst
2016	J	`jnl`	A 0.3-2.6 TOPS/W Precision-Scalable Processor for Real-Time Large-Scale ConvNets. CoRR Bert Moons, Marian Verhelst
2016	—	`conf`	A 0.3-2.6 TOPS/W precision-scalable processor for real-time large-scale ConvNets. VLSI Circuits Bert Moons, Marian Verhelst
2016	—	`conf`	A 17nA, 47.2dB dynamic range, adaptive sampling controller for online data rate reduction in low power ECG systems. BioCAS V. Rajesh Pamula, Marian Verhelst, Chris Van Hoof, Refet Firat Yazicioglu
2016	J	`jnl`	A 90 nm CMOS, 6µW Power-Proportional Acoustic Sensing Frontend for Voice Activity Detection. IEEE J. Solid State Circuits Komail M. H. Badami, Steven Lauwereins, Wannes Meert, Marian Verhelst
2016	C	`conf`	A switched-capacitor degenerated, scalable gm-C filter-bank for acoustic front-ends. ISCAS Komail M. H. Badami, V. Rajesh Pamula, Marian Verhelst
2016	—	`conf`	Custom processor design for efficient, yet flexible Lucas-Kanade optical flow. DASIP Sander Smets, Toon Goedemé, Marian Verhelst
2016	J	`jnl`	Energy-Efficient ConvNets Through Approximate Computing. CoRR Bert Moons, Bert De Brabandere, Luc Van Gool, Marian Verhelst
2016	A	`conf`	Energy-efficient ConvNets through approximate computing. WACV Bert Moons, Bert De Brabandere, Luc Van Gool, Marian Verhelst
2016	Misc	`conf`	Exploiting system configurability towards dynamic accuracy-power trade-offs in sensor front-ends. ACSSC Laura Isabel Galindez Olascoaga, Komail M. H. Badami, V. Rajesh Pamula, Steven Lauwereins, Wannes Meert, Marian Verhelst
2016	—	`conf`	Extending Naive Bayes with Precision-tunable Feature Variables for Resource-efficient Sensor Fusion. AI-IoT@ECAI Laura Isabel Galindez Olascoaga, Wannes Meert, Herman Bruyninckx, Marian Verhelst
2016	—	`conf`	F1: Designing secure systems: Manufacturing, circuits and architectures. ISSCC Vivek De, Kerry Bernstein, Takefumi Yoshikawa, Yusuf Leblebici, Marian Verhelst, Mahesh Mehendale, Makoto Nagata
2016	J	`jnl`	Finite-Horizon Prediction of Energy Depletions in Off-Grid Wireless Networks. IEEE Trans. Veh. Technol. Antti Anttonen, Adrian Kotelba, Marian Verhelst, Aarne Mämmelä
2016	J	`jnl`	Generalized Signal Utility for LMMSE Signal Estimation With Application to Greedy Quantization in Wireless Sensor Networks. IEEE Signal Process. Lett. Fernando de la Hucha Arce, Fernando Rosas, Marc Moonen, Marian Verhelst, Alexander Bertrand
2016	J	`jnl`	Optimizing the Code Rate of Energy-Constrained Wireless Communications With HARQ. IEEE Trans. Wirel. Commun. Fernando Rosas, Richard Demo Souza, Marcelo Eduardo Pellenz, Christian Oberli, Glauber Gomes de Oliveira Brante, Marian Verhelst, Sofie Pollin
2016	—	`conf`	PHIDIAS: ultra-low-power holistic design for smart bio-signals computing platforms. Conf. Computing Frontiers Daniele Bortolotti, Andrea Bartolini, Luca Benini, V. Rajesh Pamula, Nick Van Helleputte, Chris Van Hoof, Marian Verhelst, Tobias Gemmeke, Rubén Braojos Lopez, Giovanni Ansaloni, David Atienza, Pierre Vandergheynst
2016	—	`conf`	Performance analysis of in-band full duplex collision and interference detection in dense networks. CCNC Tom Vermeulen, Fernando Rosas, Marian Verhelst, Sofie Pollin
2016	—	`conf`	Session 14 overview: Next-generation processing. ISSCC Paul Liang, Marian Verhelst
2016	J	`jnl`	Understanding Interdependency Through Complex Information Sharing. Entropy Fernando Rosas, Vasilis Ntranos, Christopher J. Ellison, Sofie Pollin, Marian Verhelst
2015	—	`conf`	24.2 Context-aware hierarchical information-sensing in a 6μW 90nm CMOS voice activity detector. ISSCC Komail M. H. Badami, Steven Lauwereins, Wannes Meert, Marian Verhelst
2015	Misc	`conf`	<30 mW rectangular-to-polar conversion processor in 802.11ad polar transmitter. ICASSP Chunshu Li, André Bourdoux, Marian Verhelst, Yanxiang Huang, Min Li, Liesbet Van der Perre, Sofie Pollin
2015	J	`jnl`	A mm-Precise 60 GHz Transmitter in 40 nm CMOS for Discrete-Carrier Indoor Localization. IEEE J. Solid State Circuits Paramartha Indirayanti, Tuba Ayhan, Marian Verhelst, Wim Dehaene, Patrick Reynaert
2015	—	`conf`	An energy-scalable in-band full duplex architecture. CAMAD Tom Vermeulen, Fernando Rosas, Barend van Liempd, Marian Verhelst, Sofie Pollin
2015	J	`jnl`	Built-In Self-Test of Transmitter I/Q Mismatch and Nonlinearity Using Self-Mixing Envelope Detector. IEEE Trans. Very Large Scale Integr. Syst. Afsaneh Nassery, Srinath Byregowda, Sule Ozev, Marian Verhelst, Mustapha Slamani
2015	A	`conf`	DVAS: Dynamic Voltage Accuracy Scaling for increased energy-efficiency in approximate computing. ISLPED Bert Moons, Marian Verhelst
2015	J	`jnl`	Efficient Timing Mismatch Correction for Low-Cost Digital-Mixing Transmitter. IEEE Trans. Signal Process. Chunshu Li, Min Li, Marian Verhelst, André Bourdoux, Mark Ingels, Liesbet Van der Perre, Sofie Pollin
2015	—	`conf`	Energy-efficient MIMO multihop communications using the antenna selection scheme. ISWCS Fernando Rosas, Richard Demo Souza, Marian Verhelst, Sofie Pollin
2015	—	`conf`	Energy-vs-performance trade-offs in speech enhancement in wireless acoustic sensor networks. EUSIPCO Fernando de la Hucha Arce, Fernando Rosas, Marc Moonen, Marian Verhelst, Alexander Bertrand
2015	—	`conf`	F4: Building the Internet of Everything (IoE): Low-power techniques at the circuit and system levels. ISSCC Marian Verhelst, Dennis Sylvester, Makoto Takamiya, Mike Clinton, Kathy Wilcox, Koichi Nose
2015	J	`jnl`	Introduction to the Special Issue on the 40th European Solid-State Circuits Conference (ESSCIRC). IEEE J. Solid State Circuits Angelo Nagari, Kenichi Okada, Marian Verhelst
2015	J	`jnl`	On the General Mathematical Framework, Calibration/Compensation Method, and Applications of Non-Ideal Software Defined Harmonics Rejection Transceivers. IEEE Trans. Circuits Syst. I Regul. Pap. Chunshu Li, Min Li, Marian Verhelst, André Bourdoux, Liesbet Van der Perre, Sofie Pollin
2015	J	`jnl`	Opportunities and Challenges of Digital Signal Processing in Deeply Technology-Scaled Transceivers. J. Signal Process. Syst. Chunshu Li, Min Li, Khaled Khalaf, André Bourdoux, Marian Verhelst, Mark Ingels, Piet Wambacq, Jan Craninckx, Liesbet Van der Perre, Sofie Pollin
2015	J	`jnl`	Optimal resource usage in ultra-low-power sensor interfaces through context- and resource-cost-aware machine learning. Neurocomputing Steven Lauwereins, Komail M. H. Badami, Wannes Meert, Marian Verhelst
2015	—	`conf`	Redundancy effect on the performance of digitally-assisted SAR ADCs. ICECS Juan Carlos Pena Ramos, Marian Verhelst
2015	J	`jnl`	Understanding interdependency through complex information sharing. CoRR Fernando Rosas, Vasilis Ntranos, Christopher J. Ellison, Sofie Pollin, Marian Verhelst
2015	Misc	`conf`	Using mobility for increasing the energy efficiency of multihop communications. ACSSC Fernando Rosas, Mohammad Mahdi Azari, Bertold Van den Bergh, Richard Demo Souza, Sofie Pollin, Marian Verhelst
2014	—	`conf`	20.1 A 40nm CMOS receiver for 60GHz discrete-carrier indoor localization achieving mm-precision at 4m range. ISSCC Tom Redant, Tuba Ayhan, Nico De Clercq, Marian Verhelst, Patrick Reynaert, Wim Dehaene
2014	—	`conf`	A 128∶2048/1536 point FFT hardware implementation with output pruning. EUSIPCO Tuba Ayhan, Wim Dehaene, Marian Verhelst
2014	—	`conf`	A 60GHz transmitter in 40nm CMOS achieving mm-precision for discrete-carrier localization. ESSCIRC Paramartha Indirayanti, Tuba Ayhan, Marian Verhelst, Wim Dehaene, Patrick Reynaert
2014	J	`jnl`	CLAWS: Cross-Layer Adaptable Wireless System enabling full cross-layer experimentation on real-time software-defined 802.15.4. EURASIP J. Wirel. Commun. Netw. Bertold Van den Bergh, Tom Vermeulen, Marian Verhelst, Sofie Pollin
2014	—	`conf`	Computationally-efficient compressive sampling for low-power pulseoximeter system. BioCAS V. Rajesh Pamula, Marian Verhelst, Chris Van Hoof, Refet Firat Yazicioglu
2014	B	`conf`	Context- and cost-aware feature selection in ultra-low-power sensor interfaces. ESANN Steven Lauwereins, Komail M. H. Badami, Wannes Meert, Marian Verhelst
2014	—	`conf`	Design and implementation of a multi-standard event-driven energy management system for smart buildings. GCCE Iman Khajenasiri, Edoardo Patti, Marco Jahn, Andrea Acquaviva, Marian Verhelst, Enrico Macii, Georges G. E. Gielen
2014	Misc	`conf`	Efficient duty-cycle mismatch compensation in digital transmitter. ICASSP Chunshu Li, Min Li, Mark Ingels, Marian Verhelst, Xiaoqiang Zhang, Joris Van Driessche, André Bourdoux, Liesbet Van der Perre, Sofie Pollin
2014	—	`conf`	Energy and accuracy in multi-stage stochastic computing. NEWCAS Bert Moons, Marian Verhelst
2014	J	`jnl`	Energy-Efficiency and Accuracy of Stochastic Computing Circuits in Emerging Technologies. IEEE J. Emerg. Sel. Topics Circuits Syst. Bert Moons, Marian Verhelst
2014	—	`conf`	Impact of multipath fading on a precise 60 GHz indoor locationing system. SIU Tuba Ayhan, Marian Verhelst, Wim Dehaene
2014	—	`conf`	Ultra-low-power voice-activity-detector through context- and resource-cost-aware feature selection in decision trees. MLSP Steven Lauwereins, Wannes Meert, Jort F. Gemmeke, Marian Verhelst
2013	J	`jnl`	A 32 nm SoC With Dual Core ATOM Processor and RF WiFi Transceiver. IEEE J. Solid State Circuits Hasnain Lakdawala, Mark Schaecher, Chang-Tsung Fu, Rahul Dilip Limaye, Jon Duster, Yulin Tan, Ajay Balankutty, Erkan Alpman, Chun C. Lee, Khoa Minh Nguyen, Hyung-Jin Lee, Ashoke Ravi, Satoshi Suzuki, Brent R. Carlton, Hyung Seok Kim, Marian Verhelst, Stefano Pellerano, Tong Kim, Satish Venkatesan, Durgesh Srivastava, Peter Vandervoorn, Jad Rizk, Chia-Hong Jan, Sunder Ramamurthy, Raj Yavatkar, Krishnamurthy Soumyanath
2013	J	`jnl`	A Programmable Calibration/BIST Engine for RF and Analog Blocks in SoCs Integrated in a 32 nm CMOS WiFi Transceiver. IEEE J. Solid State Circuits Jorge Carballido, Jorge Hermosillo, Arturo Veloz-Guerrero, David Arditti, Alberto Del Rio, Edgar Borrayo Sandoval, Manuel E. Guzman-Renteria, Hasnain Lakdawala, Marian Verhelst
2013	—	`conf`	A method for using sub-Nyquist sampling for ultra low-power positioning systems. SiPS Tuba Ayhan, Wim Dehaene, Marian Verhelst
2013	Misc	`conf`	Adaptive filter based low complexity digital intensive harmonic rejection for SDR receiver. ICASSP Chunshu Li, Min Li, Marian Verhelst, Sofie Pollin, André Bourdoux, Liesbet Van der Perre
2013	—	`conf`	Efficient self-correction scheme for static non-idealities in nano-scale quadrature digital RF transmitters. SiPS Chunshu Li, Min Li, Mark Ingels, Xiaoqiang Zhang, Marian Verhelst, Sofie Pollin, Joris Van Driessche, André Bourdoux, Liesbet Van der Perre
2013	—	`conf`	Flexible, ultra-low power sensor nodes through configurable finite state machines. ReCoSoC Juan Carlos Pena Ramos, Marian Verhelst
2012	—	`conf`	32nm x86 OS-compliant PC on-chip with dual-core Atom® processor and RF WiFi transceiver. ISSCC Hasnain Lakdawala, Mark Schaecher, Chang-Tsung Fu, Rahul Dilip Limaye, Jon Duster, Yulin Tan, Ajay Balankutty, Erkan Alpman, Chun C. Lee, Satoshi Suzuki, Brent R. Carlton, Hyung Seok Kim, Marian Verhelst, Stefano Pellerano, Tong Kim, Durgesh Srivastava, Satish Venkatesan, Hyung-Jin Lee, Peter Vandervoorn, Jad Rizk, Chia-Hong Jan, Krishnamurthy Soumyanath, Sunder Ramamurthy
2012	J	`jnl`	A 2.4-GHz 20-40-MHz Channel WLAN Digital Outphasing Transmitter Utilizing a Delay-Based Wideband Phase Modulator in 32-nm CMOS. IEEE J. Solid State Circuits Ashoke Ravi, Paolo Madoglio, Hongtao Xu, Kailash Chandrashekar, Marian Verhelst, Stefano Pellerano, Luis Cuellar, Mariano Aguirre-Hernandez, Masoud Sajadieh, J. E. Zarate-Roldan, Ofir Bochobza-Degani, Hasnain Lakdawala, Yorgos Palaskas
2012	—	`conf`	A 20dBm 2.4GHz digital outphasing transmitter for WLAN application in 32nm CMOS. ISSCC Paolo Madoglio, Ashoke Ravi, Hongtao Xu, Kailash Chandrashekar, Marian Verhelst, Stefano Pellerano, Luis Cuellar, Mariano Aguirre, Masoud Sajadieh, Ofir B. Degani, Hasnain Lakdawala, Yorgos Palaskas
2012	—	`conf`	A Generic Framework for Optimizing Digital Intensive Harmonic Rejection Receivers. SiPS Chunshu Li, Min Li, Marian Verhelst, André Bourdoux, Jonathan Borremans, Sofie Pollin, Alessandro Chiumento, Liesbet Van der Perre, Rudy Lauwereins
2012	J	`jnl`	A Power-Scalable Channel-Adaptive Wireless Receiver Based on Built-In Orthogonally Tunable LNA. IEEE Trans. Circuits Syst. I Regul. Pap. Shreyas Sen, Debashis Banerjee, Marian Verhelst, Abhijit Chatterjee
2012	—	`conf`	A programmable calibration/BIST engine for RF/analog blocks in SoCs. ESSCIRC Jorge Hermosillo, Jorge Carballido, Arturo Veloz-Guerrero, David Arditti, Alberto Del Rio, Edgar Borrayo Sandoval, Manuel E. Guzman-Renteria, Hasnain Lakdawala, Marian Verhelst
2012	Misc	`conf`	Built-in-Self Test of transmitter I/Q mismatch using self-mixing envelope detector. VTS Afsaneh Nassery, Srinath Byregowda, Sule Ozev, Marian Verhelst, Mustapha Slamani
2012	—	`conf`	Reduced Complexity On-chip IQ-Imbalance Self-Calibration. SiPS Chunshu Li, Min Li, Sofie Pollin, Björn Debaillie, Marian Verhelst, Liesbet Van der Perre, Rudy Lauwereins
2012	J	`jnl`	Test Signal Development and Analysis for OFDM Systems RF Front-End Parameter Extraction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Afsaneh Nassery, Osman Emir Erol, Sule Ozev, Marian Verhelst
2012	—	`conf`	Towards a Fast and Hardware Efficient Sub-MM Precision Ranging System. SiPS Tuba Ayhan, Tom Redant, Marian Verhelst, Wim Dehaene
2011	B	`conf`	Extraction of EVM from Transmitter System Parameters. ETS Afsaneh Nassery, Sule Ozev, Marian Verhelst, Mustapha Slamani
2011	C	`conf`	Orthogonally tunable inductorless RF LNA for adaptive wireless systems. ISCAS Shreyas Sen, Marian Verhelst, Abhijit Chatterjee
2011	J	`jnl`	Power Consumption Minimization for MIMO Systems - A Cognitive Radio Approach. IEEE J. Sel. Areas Commun. An He, Srikathyayani Srikanteswara, Kyung Kyoon Bae, Timothy R. Newman, Jeffrey H. Reed, William H. Tranter, Masoud Sajadieh, Marian Verhelst
2011	J	`jnl`	Systematic Analysis of Interleaved Digital-to-Analog Converters. IEEE Trans. Circuits Syst. II Express Briefs Sidharth Balasubramanian, Gregory L. Creech, J. Wilson, Samantha M. Yoder, Jamin J. McCue, Marian Verhelst, Waleed Khalil
2010	J	`jnl`	A Reconfigurable, 130 nm CMOS 108 pJ/pulse, Fully Integrated IR-UWB Receiver for Communication and Precise Ranging. IEEE J. Solid State Circuits Nick Van Helleputte, Marian Verhelst, Wim Dehaene, Georges G. E. Gielen
2009	—	`conf`	A reconfigurable, 0.13µm CMOS 110pJ/pulse, fully integrated IR-UWB receiver for communication and sub-cm ranging. ISSCC Marian Verhelst, Nick Van Helleputte, Georges G. E. Gielen, Wim Dehaene
2009	—	`conf`	RFID, where are they? ESSCIRC Wim Dehaene, Georges G. E. Gielen, Michiel Steyaert, Hans Danneels, V. Desmedt, Christophe De Roover, Z. Li, Marian Verhelst, Nick Van Helleputte, S. Radioma, C. Walravensa, L. Pleysier
2008	J	`jnl`	A Flexible, Ultra-Low-Energy 35 pJ/Pulse Digital Back-End for a QAC IR-UWB Receiver. IEEE J. Solid State Circuits Marian Verhelst, Wim Dehaene
2008	—	`conf`	A Low Power, Reconfigurable IR-UWB System. ICC Marian Verhelst, Julien Ryckaert, Yves Vanderperren, Wim Dehaene
2008	C	`conf`	A low-power mixing DAC IR-UWB-receiver. ISCAS Hans Danneels, Marian Verhelst, Pieter Palmers, Wim Vereecken, Bruno Boury, Wim Dehaene, Michiel Steyaert, Georges G. E. Gielen
2008	J	`jnl`	Analysis of the QAC IR-UWB Receiver for Low Energy, Low Data-Rate Communication. IEEE Trans. Circuits Syst. I Regul. Pap. Marian Verhelst, Wim Dehaene
2007	J	`jnl`	A CMOS Ultra-Wideband Receiver for Low Data-Rate Communication. IEEE J. Solid State Circuits Julien Ryckaert, Marian Verhelst, Mustafa Badaroglu, Stefano D'Amico, Vincent De Heyn, Claude Desset, Pierluigi Nuzzo, Bart van Poucke, Piet Wambacq, Andrea Baschirotto, Wim Dehaene, Geert Van der Plas
2007	—	`conf`	A flexible, ultra-low power 35pJ/pulse digital back-end for a QAC UWB receiver. ESSCIRC Marian Verhelst, Wim Dehaene
2005	—	`conf`	System design of an ultra-low power, low data rate, pulsed UWB receiver in the 0-960 MHz band. ICC Marian Verhelst, Wim Dehaene
2004	A	`conf`	Architectures for low power ultra-wideband radio receivers in the 3.1-5GHz band for data rates < 10Mbps. ISLPED Marian Verhelst, Wim Vereecken, Michiel Steyaert, Wim Dehaene