Marco Platzner

212 papers A* 1A 13B 25C 9Misc 7Journal 55Unranked 90

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	Sensitivity-Guided Framework for Pruned and Quantized Reservoir Computing Accelerators. CoRR Atousa Jafari, Mahdi Taheri, Hassan Ghasemzadeh Mohammadi, Christian Herglotz, Marco Platzner
2025	C	`conf`	A Two-Stage Approximation Methodology for Efficient DNN Hardware Implementation. DDECS Amir Hossein Hadipour, Atousa Jafari, Muhammad Awais, Marco Platzner
2025	J	`jnl`	CRC: Compressed Reservoir Computing on FPGA via Joint HSIC LASSO-based Pruning and Quantization. WiPiEC Journal Atousa Jafari, Hassan Ghasemzadeh Mohammadi, Marco Platzner
2025	—	`conf`	Deep&Wide: Achieving Area Efficiency in Scalable Approximate Accelerators. DSN-W Farjana Jalil, Muhammad Awais, Qazi Arbab Ahmed, Hassan Ghasemzadeh Mohammadi, Thorsten Jungeblut, Marco Platzner
2025	J	`jnl`	Design Space Exploration for Approximate Circuits via Checkpointing and DNN-Based Estimators. IEEE Trans. Very Large Scale Integr. Syst. Muhammad Awais, Hassan Ghasemzadeh Mohammadi, Marco Platzner
2025	C	`conf`	Swift Synthesis of Approximate Hardware Accelerators Using Generative Adversarial Networks. VLSI-SoC Muhammad Awais, Hassan Ghasemzadeh Mohammadi, Marco Platzner
2025	—	`conf`	Ultra-Low Latency and Extreme-Throughput Echo State Neural Networks on FPGA. ARC Atousa Jafari, Marco Platzner
2024	J	`jnl`	Correction to: Post-configuration Activation of Hardware Trojans in FPGAs. J. Hardw. Syst. Secur. Qazi Arbab Ahmed, Tobias Wiersema, Marco Platzner
2024	—	`conf`	DeepApprox: Rapid Deep Learning based Design Space Exploration of Approximate Circuits via Check-pointing. ISVLSI Muhammad Awais, Hassan Ghasemzadeh Mohammadi, Marco Platzner
2024	—	`conf`	FINN-T: Compiling Custom Dataflow Accelerators for Quantized Transformers. ICFPT Christoph Berganski, Felix Jentzsch, Marco Platzner, Max Kuhmichel, Heiner Giefers
2024	J	`jnl`	Post-configuration Activation of Hardware Trojans in FPGAs. J. Hardw. Syst. Secur. Qazi Arbab Ahmed, Tobias Wiersema, Marco Platzner
2023	J	`jnl`	AutonomROS: A ReconROS-based Autonomonous Driving Unit. CoRR Christian Lienen, Mathis Brede, Daniel Karger, Kevin Koch, Dalisha Logan, Janet Mazur, Alexander Philipp Nowosad, Alexander Schnelle, Mohness Waizy, Marco Platzner
2023	—	`conf`	AutonomROS: A ReconROS-based Autonomous Driving Unit. IRC Christian Lienen, Mathis Brede, Daniel Karger, Kevin Koch, Dalisha Logan, Janet Mazur, Alexander Philipp Nowosad, Alexander Schnelle, Mohness Waizy, Marco Platzner
2023	A	`conf`	FPGADDS: An Intra-FPGA Data Distribution Service for ROS 2 Robotics Applications. IROS Christian Lienen, Sorel Horst Middeke, Marco Platzner
2023	—	`conf`	MAAS: Hiding Trojans in Approximate Circuits. ISQED Qazi Arbab Ahmed, Muhammad Awais, Marco Platzner
2023	—	`conf`	Mapping and Optimizing Communication in ROS 2-based Applications on Configurable System-on-Chip Platforms. ICRAI Christian Lienen, Alexander Philipp Nowosad, Marco Platzner
2023	J	`jnl`	Mapping and Optimizing Communication in ROS 2-based Applications on Configurable System-on-Chip Platforms. CoRR Christian Lienen, Alexander Philipp Nowosad, Marco Platzner
2023	—	`conf`	On Guaranteeing Schedulability of Periodic Real-Time Hardware Tasks Under ReconOS ARC Lennart Clausing, Zakarya Guettatfi, Paul Kaufmann, Christian Lienen, Marco Platzner
2023	J	`jnl`	fpgaDDS: An Intra-FPGA Data Distribution Service for ROS 2 Robotics Applications. CoRR Christian Lienen, Sorel Horst Middeke, Marco Platzner
2022	C	`conf`	Automated Framework for Fast Synthesis of Approximate Hardware Accelerators. VLSI-SoC Muhammad Awais, Marco Platzner
2022	J	`jnl`	Design of Distributed Reconfigurable Robotics Systems with ReconROS. ACM Trans. Reconfigurable Technol. Syst. Christian Lienen, Marco Platzner
2022	C	`conf`	Event-Driven Programming of FPGA-accelerated ROS 2 Robotics Applications. DSD Christian Lienen, Marco Platzner
2022	J	`jnl`	Exploiting Hardware-Based Data-Parallel and Multithreading Models for Smart Edge Computing in Reconfigurable FPGAs. IEEE Trans. Computers Alfonso Rodríguez, Andrés Otero, Marco Platzner, Eduardo de la Torre
2022	B	`conf`	Integrating Safety Guarantees into the Learning Classifier System XCS. EvoApplications Tim Hansmeier, Marco Platzner
2022	A	`conf`	MUSCAT: MUS-based Circuit Approximation Technique. DATE Linus Witschen, Tobias Wiersema, Matthias Artmann, Marco Platzner
2022	—	`conf`	On the Detection and Circumvention of Bitstream-level Trojans in FPGAs. ISVLSI Qazi Arbab Ahmed, Marco Platzner
2022	J	`jnl`	RadioML Meets FINN: Enabling Future RF Applications With FPGA Streaming Architectures. IEEE Micro Felix Jentzsch, Yaman Umuroglu, Alessandro Pappalardo, Michaela Blott, Marco Platzner
2022	—	`conf`	ReconOS IPDPS Workshops Lennart Clausing, Marco Platzner
2022	J	`jnl`	ReconROS Executor: Event-Driven Programming of FPGA-accelerated ROS 2 Applications. CoRR Christian Lienen, Marco Platzner
2022	A*	`conf`	Search space characterization for approximate logic synthesis. DAC Linus Witschen, Tobias Wiersema, Lucas Reuter, Marco Platzner
2022	—	`conf`	Task Mapping for Hardware-Accelerated Robotics Applications using ReconROS. IRC Christian Lienen, Marco Platzner
2022	—	`conf`	XCS on embedded systems: an analysis of execution profiles and accelerated classifier deletion. GECCO Companion Mathis Brede, Tim Hansmeier, Marco Platzner
2021	—	`conf`	An experimental comparison of explore/exploit strategies for the learning classifier system XCS. GECCO Companion Tim Hansmeier, Marco Platzner
2021	J	`jnl`	Design of Distributed Reconfigurable Robotics Systems with ReconROS. CoRR Christian Lienen, Marco Platzner
2021	—	`conf`	FLight: FPGA Acceleration of Lightweight DNN Model Inference in Industrial Analytics. PKDD/ECML Workshops (1) Hassan Ghasemzadeh Mohammadi, Felix Paul Jentzsch, Maurice Kuschel, Rahil Arshad, Sneha Rautmare, Suraj Manjunatha, Marco Platzner, Alexander Boschmann, Dirk Schollbach
2021	—	`ed.`	HEART '21: 11th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, Virtual Event, Germany, 21-23 June, 2021. HEART Christian Plessl, Paul Chow, Marco Platzner
2021	—	`conf`	MCTS-based Synthesis Towards Efficient Approximate Accelerators. ISVLSI Muhammad Awais, Marco Platzner
2021	A	`conf`	Malicious Routing: Circumventing Bitstream-level Verification for FPGAs. DATE Qazi Arbab Ahmed, Tobias Wiersema, Marco Platzner
2021	J	`jnl`	Software/Hardware Co-Verification for Custom Instruction Set Processors. IEEE Access Marie-Christine Jakobs, Felix Pauck, Marco Platzner, Heike Wehrheim, Tobias Wiersema
2021	—	`conf`	Timing Optimization for Virtual FPGA Configurations. ARC Linus Witschen, Tobias Wiersema, Masood Raeisi Nafchi, Arne Bockhorn, Marco Platzner
2020	—	`conf`	A Hybrid Synthesis Methodology for Approximate Circuits. ACM Great Lakes Symposium on VLSI Muhammad Awais, Hassan Ghasemzadeh Mohammadi, Marco Platzner
2020	—	`conf`	An adaption mechanism for the error threshold of XCSF. GECCO Companion Tim Hansmeier, Paul Kaufmann, Marco Platzner
2020	C	`conf`	DeepWind: An Accurate Wind Turbine Condition Monitoring Framework via Deep Learning on Embedded Platforms. ETFA Hassan Ghasemzadeh Mohammadi, Rahil Arshad, Sneha Rautmare, Suraj Manjunatha, Maurice Kuschel, Felix Paul Jentzsch, Marco Platzner, Alexander Boschmann, Dirk Schollbach
2020	J	`jnl`	Dynamic Reliability Management for FPGA-Based Systems. Int. J. Reconfigurable Comput. Jahanzeb Anwer, Sebastian Meisner, Marco Platzner
2020	—	`conf`	Enabling XCSF to cope with dynamic environments via an adaptive error threshold. GECCO Companion Tim Hansmeier, Paul Kaufmann, Marco Platzner
2020	J	`jnl`	Evolution of application-specific cache mappings. Int. J. Hybrid Intell. Syst. Nam Ho, Paul Kaufmann, Marco Platzner
2020	—	`conf`	MigHEFT: DAG-based Scheduling of Migratable Tasks on Heterogeneous Compute Nodes. IPDPS Workshops Achim Lösch, Marco Platzner
2020	—	`conf`	Optimal and Greedy Heuristic Approaches for Scheduling and Mapping of Hardware Tasks to Reconfigurable Computing Devices. ARC Zakarya Guettatfi, Paul Kaufmann, Marco Platzner
2020	J	`jnl`	Proof-Carrying Approximate Circuits. IEEE Trans. Very Large Scale Integr. Syst. Linus Witschen, Tobias Wiersema, Marco Platzner
2020	—	`conf`	ReconROS: Flexible Hardware Acceleration for ROS2 Applications. FPT Christian Lienen, Marco Platzner, Bernhard Rinner
2020	J	`jnl`	Self-aware Cyber-Physical Systems. ACM Trans. Cyber Phys. Syst. Kirstie L. Bellman, Christopher Landauer, Nikil D. Dutt, Lukas Esterle, Andreas Herkersdorf, Axel Jantsch, Nima Taherinejad, Peter R. Lewis, Marco Platzner, Kalle Tammemäe
2019	—	`ed.`	2019 International Conference on ReConFigurable Computing and FPGAs, ReConFig 2019, Cancun, Mexico, December 9-11, 2019 ReConFig David Andrews, René Cumplido, Claudia Feregrino, Marco Platzner
2019	J	`jnl`	An Accelerator for Resolution Proof Checking based on FPGA and Hybrid Memory Cube Technology. J. Signal Process. Syst. Tim Hansmeier, Marco Platzner, Md Jubaer Hossain Pantho, David Andrews
2019	—	`conf`	An Approach for Mapping Periodic Real-Time Tasks to Reconfigurable Hardware. IPDPS Workshops Zakarya Guettatfi, Marco Platzner, Omar Kermia, Abdelhakim Khouas
2019	J	`jnl`	FPGAs im Rechenzentrum. Inform. Spektrum Marco Platzner, Christian Plessl
2019	—	`conf`	Jump Search: A Fast Technique for the Synthesis of Approximate Circuits. ACM Great Lakes Symposium on VLSI Linus Witschen, Hassan Ghasemzadeh Mohammadi, Matthias Artmann, Marco Platzner
2019	—	`conf`	Optimization of Application-Specific L1 Cache Translation Functions of the LEON3 Processor. SoCPaR Nam Ho, Paul Kaufmann, Marco Platzner
2019	—	`conf`	Proof-Carrying Hardware Versus the Stealthy Malicious LUT Hardware Trojan. ARC Qazi Arbab Ahmed, Tobias Wiersema, Marco Platzner
2019	J	`jnl`	Zynq-based acceleration of robust high density myoelectric signal processing. J. Parallel Distributed Comput. Alexander Boschmann, Andreas Agne, Georg Thombansen, Linus Witschen, Florian Kraus, Marco Platzner
2018	—	`conf`	A Highly Accurate Energy Model for Task Execution on Heterogeneous Compute Nodes. ASAP Achim Lösch, Marco Platzner
2018	—	`conf`	Ampehre: An Open Source Measurement Framework for Heterogeneous Compute Nodes. ARCS Achim Lösch, Alex Wiens, Marco Platzner
2018	—	`conf`	An FPGA/HMC-Based Accelerator for Resolution Proof Checking. ARC Tim Hansmeier, Marco Platzner, David Andrews
2018	C	`conf`	An MCTS-based Framework for Synthesis of Approximate Circuits. VLSI-SoC Muhammad Awais, Hassan Ghasemzadeh Mohammadi, Marco Platzner
2018	J	`jnl`	R-Codesign: Codesign Methodology for Real-Time Reconfigurable Embedded Systems Under Energy Constraints. IEEE Access Ines Ghribi, Riadh Ben Abdallah, Mohamed Khalgui, ZhiWu Li, Khalid Abdulaziz Alnowibet, Marco Platzner
2017	A	`conf`	A Zynq-based dynamically reconfigurable high density myoelectric prosthesis controller. DATE Alexander Boschmann, Georg Thombansen, Linus Witschen, Alex Wiens, Marco Platzner
2017	A	`conf`	Accurate private/shared classification of memory accesses: A run-time analysis system for the LEON3 multi-core processor. DATE Nam Ho, Ishraq Ibne Ashraf, Paul Kaufmann, Marco Platzner
2017	—	`conf`	Adaptable Realization of Industrial Analytics Functions on Edge-Devices using Reconfigurable Architectures. ML4CPS Carlos Paiz Gatica, Marco Platzner
2017	—	`conf`	Computational self-awareness as design approach for visual sensor nodes. ReCoSoC Zakarya Guettatfi, Philipp Hübner, Marco Platzner, Bernhard Rinner
2017	J	`jnl`	Evaluating fault-tolerance of redundant FPGA structures using Boolean difference calculus. Microprocess. Microsystems Jahanzeb Anwer, Marco Platzner
2017	—	`conf`	Evaluation methodology for complex non-deterministic functions: A case study in metaheuristic optimization of caches. AHS Paul Kaufmann, Nam Ho, Marco Platzner
2017	—	`conf`	Evolvable caches: Optimization of reconfigurable cache mappings for a LEON3/Linux-based multi-core processor. FPT Nam Ho, Paul Kaufmann, Marco Platzner
2017	J	`jnl`	Guest Editorial: IEEE Transactions on Computers and IEEE Transactions on Emerging Topics in Computing Joint Special Section on Innovation in Reconfigurable Computing Fabrics from Devices to Architectures. IEEE Trans. Computers Ronald F. DeMara, Marco Platzner, Marco Ottavi
2017	J	`jnl`	Guest Editorial: IEEE Transactions on Computers and IEEE Transactions on Emerging Topics in Computing Joint Special Section on Innovation in Reconfigurable Computing Fabrics from Devices to Architectures. IEEE Trans. Emerg. Top. Comput. Ronald F. DeMara, Marco Platzner, Marco Ottavi
2017	J	`jnl`	Proof-Carrying Hardware via Inductive Invariants. ACM Trans. Design Autom. Electr. Syst. Tobias Isenberg, Marco Platzner, Heike Wehrheim, Tobias Wiersema
2017	J	`jnl`	The First 25 Years of the FPL Conference: Significant Papers. ACM Trans. Reconfigurable Technol. Syst. Philip Heng Wai Leong, Hideharu Amano, Jason Helge Anderson, Koen Bertels, João M. P. Cardoso, Oliver Diessel, Guy Gogniat, Mike Hutton, JunKyu Lee, Wayne Luk, Patrick Lysaght, Marco Platzner, Viktor K. Prasanna, Tero Rissa, Cristina Silvano, Hayden Kwok-Hay So, Yu Wang
2017	—	`conf`	reMinMin: A novel static energy-centric list scheduling approach based on real measurements. ASAP Achim Lösch, Marco Platzner
2016	J	`jnl`	Adaptive playouts for online learning of policies during Monte Carlo Tree Search. Theor. Comput. Sci. Tobias Graf, Marco Platzner
2016	J	`jnl`	An architecture and design tool flow for embedding a virtual FPGA into a reconfigurable system-on-chip. Comput. Electr. Eng. Tobias Wiersema, Arne Bockhorn, Marco Platzner
2016	C	`conf`	Boolean Difference Based Reliability Evaluation of Fault-Tolerant Circuit Structures on FPGAs. DSD Jahanzeb Anwer, Marco Platzner
2016	—	`ch.`	Conclusions and Outlook. Self-aware Computing Systems Peter R. Lewis, Marco Platzner, Bernhard Rinner, Jim Tørresen, Xin Yao
2016	—	`conf`	I-Codesign: A Codesign Methodology for Reconfigurable Embedded Systems. ICSOFT (Selected Papers) Ines Ghribi, Riadh Ben Abdallah, Mohamed Khalgui, Marco Platzner
2016	—	`conf`	Monte-Carlo simulation balancing revisited. CIG Tobias Graf, Marco Platzner
2016	—	`conf`	New Co-design Methodology for Real-time Embedded Systems. ICSOFT-EA Ines Ghribi, Riadh Ben Abdallah, Mohamed Khalgui, Marco Platzner
2016	Misc	`conf`	On-the-fly computing: self-aware heterogeneous multi-cores. CODES+ISSS Marco Platzner
2016	A	`conf`	Performance-centric scheduling with task migration for a heterogeneous compute node in the data center. DATE Achim Lösch, Tobias Beisel, Tobias Kenter, Christian Plessl, Marco Platzner
2016	—	`conf`	Programming models for reconfigurable manycore systems. ReCoSoC David Andrews, Marco Platzner
2016	—	`ch.`	ReconOS. FPGAs for Software Programmers Andreas Agne, Marco Platzner, Christian Plessl, Markus Happe, Enno Lübbers
2016	—	`ch.`	Self-aware Compute Nodes. Self-aware Computing Systems Andreas Agne, Markus Happe, Achim Lösch, Christian Plessl, Marco Platzner
2016	—	`book`	Self-aware Computing Systems - An Engineering Approach Self-aware Computing Systems Peter R. Lewis, Marco Platzner, Bernhard Rinner, Jim Tørresen, Xin Yao
2016	—	`ch.`	Self-aware Computing: Introduction and Motivation. Self-aware Computing Systems Peter R. Lewis, Marco Platzner, Bernhard Rinner, Jim Tørresen, Xin Yao
2016	—	`conf`	Thread shadowing: On the effectiveness of error detection at the hardware thread level. ReConFig Sebastian Meisner, Marco Platzner
2016	—	`conf`	Using Deep Convolutional Neural Networks in Monte Carlo Tree Search. Computers and Games Tobias Graf, Marco Platzner
2016	—	`conf`	Verifying worst-case completion times for reconfigurable hardware modules using proof-carrying hardware. ReCoSoC Tobias Wiersema, Marco Platzner
2015	—	`conf`	Adaptive Playouts in Monte-Carlo Tree Search with Policy-Gradient Reinforcement Learning. ACG Tobias Graf, Marco Platzner
2015	J	`jnl`	Approximate Computing. Inform. Spektrum Christian Plessl, Marco Platzner, Peter J. Schreier
2015	—	`conf`	Comparison of thread signatures for error detection in hybrid multi-cores. FPT Sebastian Meisner, Marco Platzner
2015	J	`jnl`	Distributed Monte Carlo Tree Search: A Novel Technique and its Application to Computer Go. IEEE Trans. Comput. Intell. AI Games Lars Schaefers, Marco Platzner
2015	—	`conf`	FPGA-based acceleration of high density myoelectric signal processing. ReConFig Alexander Boschmann, Andreas Agne, Linus Witschen, Georg Thombansen, Florian Kraus, Marco Platzner
2015	—	`conf`	Microarchitectural optimization by means of reconfigurable and evolvable cache mappings. AHS Nam Ho, Abdullah Fathi Ahmed, Paul Kaufmann, Marco Platzner
2015	—	`conf`	On-The-Fly Verification of Reconfigurable Image Processing Modules Based on a Proof-Carrying Hardware Approach. ARC Tobias Wiersema, Sen Wu, Marco Platzner
2015	B	`conf`	Significant papers from the first 25 years of the FPL conference. FPL Philip Heng Wai Leong, Hideharu Amano, Jason Helge Anderson, Koen Bertels, João M. P. Cardoso, Oliver Diessel, Guy Gogniat, Mike Hutton, JunKyu Lee, Wayne Luk, Patrick Lysaght, Marco Platzner, Viktor K. Prasanna, Tero Rissa, Cristina Silvano, Hayden Kwok-Hay So, Yu Wang
2014	B	`conf`	A hardware/software infrastructure for performance monitoring on LEON3 multicore platforms. FPL Nam Ho, Paul Kaufmann, Marco Platzner
2014	J	`jnl`	An FPGA-Based Reconfigurable Mesh Many-Core. IEEE Trans. Computers Heiner Giefers, Marco Platzner
2014	—	`conf`	Analytic reliability evaluation for fault-tolerant circuit structures on FPGAs. DFT Jahanzeb Anwer, Marco Platzner
2014	—	`conf`	Common fate graph patterns in Monte Carlo Tree Search for computer go. CIG Tobias Graf, Marco Platzner
2014	—	`conf`	Embedding FPGA overlays into configurable Systems-on-Chip: ReconOS meets ZUMA. ReConFig Tobias Wiersema, Arne Bockhorn, Marco Platzner
2014	—	`conf`	FPGA Redundancy Configurations: An Automated Design Space Exploration. IPDPS Workshops Jahanzeb Anwer, Marco Platzner, Sebastian Meisner
2014	B	`conf`	Integrating Software and Hardware Verification. IFM Marie-Christine Jakobs, Marco Platzner, Heike Wehrheim, Tobias Wiersema
2014	—	`conf`	Memory security in reconfigurable computers: Combining formal verification with monitoring. FPT Tobias Wiersema, Stephanie Drzevitzky, Marco Platzner
2014	J	`jnl`	ReconOS: An Operating System Approach for Reconfigurable Computing. IEEE Micro Andreas Agne, Markus Happe, Ariane Keller, Enno Lübbers, Bernhard Plattner, Marco Platzner, Christian Plessl
2014	J	`jnl`	Self-Awareness as a Model for Designing and Operating Heterogeneous Multicores. ACM Trans. Reconfigurable Technol. Syst. Andreas Agne, Markus Happe, Achim Lösch, Christian Plessl, Marco Platzner
2014	J	`jnl`	Seven recipes for setting your FPGA on fire - A cookbook on heat generators. Microprocess. Microsystems Andreas Agne, Hendrik Hangmann, Markus Happe, Marco Platzner, Christian Plessl
2014	—	`conf`	Thread Shadowing: Using Dynamic Redundancy on Hybrid Multi-cores for Error Detection. ARC Sebastian Meisner, Marco Platzner
2014	—	`conf`	Towards robust HD EMG pattern recognition: Reducing electrode displacement effect using structural similarity. EMBC Alexander Boschmann, Marco Platzner
2014	—	`conf`	Towards self-adaptive caches: A run-time reconfigurable multi-core infrastructure. ICES Nam Ho, Paul Kaufmann, Marco Platzner
2013	J	`jnl`	A self-adaptive heterogeneous multi-core architecture for embedded real-time video object tracking. J. Real Time Image Process. Markus Happe, Enno Lübbers, Marco Platzner
2013	J	`jnl`	Classification of Electromyographic Signals: Comparing Evolvable Hardware to Conventional Classifiers. IEEE Trans. Evol. Comput. Paul Kaufmann, Kyrre Glette, Thiemo Gruber, Marco Platzner, Jim Tørresen, Bernhard Sick
2013	—	`conf`	Dynamic reliability management: Reconfiguring reliability-levels of hardware designs at runtime. ReConFig Jahanzeb Anwer, Sebastian Meisner, Marco Platzner
2013	—	`conf`	Improving transient state myoelectric signal recognition in hand movement classification using gyroscopes. EMBC Alexander Boschmann, Barbara Nofen, Marco Platzner
2013	—	`conf`	On Semeai Detection in Monte-Carlo Go. Computers and Games Tobias Graf, Lars Schaefers, Marco Platzner
2013	C	`conf`	On-The-Fly Computing: A novel paradigm for individualized IT services. ISORC Markus Happe, Friedhelm Meyer auf der Heide, Peter Kling, Marco Platzner, Christian Plessl
2012	—	`conf`	Comparison of Bayesian move prediction systems for Computer Go. CIG Martin Wistuba, Lars Schaefers, Marco Platzner
2012	J	`jnl`	Compensating Resource Fluctuations by Means of Evolvable Hardware: The Run-Time Reconfigurable Functional Unit Row Classifier Architecture. Int. J. Adapt. Resilient Auton. Syst. Paul Kaufmann, Kyrre Glette, Marco Platzner, Jim Tørresen
2012	J	`jnl`	IMORC: An infrastructure and architecture template for implementing high-performance reconfigurable FPGA accelerators. Microprocess. Microsystems Tobias Schumacher, Christian Plessl, Marco Platzner
2012	—	`conf`	Reducing classification accuracy degradation of pattern recognition based myoelectric control caused by electrode shift using a high density electrode array. EMBC Alexander Boschmann, Marco Platzner
2011	—	`conf`	Achieving hardware security for reconfigurable systems on chip by a proof-carrying code approach. ReCoSoC Stephanie Drzevitzky, Marco Platzner
2011	Misc	`conf`	Design and architectures for dependable embedded systems. CODES+ISSS Jörg Henkel, Lars Bauer, Joachim Becker, Oliver Bringmann, Uwe Brinkschulte, Samarjit Chakraborty, Michael Engel, Rolf Ernst, Hermann Härtig, Lars Hedrich, Andreas Herkersdorf, Rüdiger Kapitza, Daniel Lohmann, Peter Marwedel, Marco Platzner, Wolfgang Rosenstiel, Ulf Schlichtmann, Olaf Spinczyk, Mehdi Baradaran Tahoori, Jürgen Teich, Norbert Wehn, Hans-Joachim Wunderlich
2011	—	`ch.`	Evolution of Electronic Circuits. Cartesian Genetic Programming Lukás Sekanina, James Alfred Walker, Paul Kaufmann, Marco Platzner
2011	J	`jnl`	FPGA Acceleration of Communication-Bound Streaming Applications: Architecture Modeling and a 3D Image Compositing Case Study. Int. J. Reconfigurable Comput. Tobias Schumacher, Tim Süß, Christian Plessl, Marco Platzner
2011	B	`conf`	Memory Virtualization for Multithreaded Reconfigurable Hardware. FPL Andreas Agne, Marco Platzner, Enno Lübbers
2011	—	`ch.`	Multi-objective Intrinsic Evolution of Embedded Systems. Organic Computing Paul Kaufmann, Marco Platzner
2011	—	`conf`	Parallel Monte-Carlo Tree Search for HPC Systems. Euro-Par (2) Tobias Graf, Ulf Lorenz, Marco Platzner, Lars Schaefers
2011	A	`conf`	Performance estimation framework for automated exploration of CPU-accelerator architectures. FPGA Tobias Kenter, Christian Plessl, Marco Platzner, Michael Kauschke
2011	—	`ch.`	Problem Decomposition in Cartesian Genetic Programming. Cartesian Genetic Programming James Alfred Walker, Julian F. Miller, Paul Kaufmann, Marco Platzner
2010	—	`conf`	A Self-Reconfigurable Lightweight Interconnect for Scalable Processor Fabrics. ERSA Heiner Giefers, Marco Platzner
2010	B	`conf`	A Triple Hybrid Interconnect for Many-Cores: Reconfigurable Mesh, NoC and Barrier. FPL Heiner Giefers, Marco Platzner
2010	B	`conf`	A novel hybrid evolutionary strategy and its periodization with multi-objective genetic optimizers. IEEE Congress on Evolutionary Computation Paul Kaufmann, Tobias Knieper, Marco Platzner
2010	—	`conf`	Coping with Resource Fluctuations: The Run-time Reconfigurable Functional Unit Row Classifier Architecture. ICES Tobias Knieper, Paul Kaufmann, Kyrre Glette, Marco Platzner, Jim Tørresen
2010	—	`book`	Dynamically Reconfigurable Systems - Architectures, Design Methods and Applications. Dynamically Reconfigurable Systems Marco Platzner, Jürgen Teich, Norbert Wehn
2010	—	`conf`	Engineering self-coordinating software intensive systems. FoSER Wilhelm Schäfer, Mauro Birattari, Johannes Blömer, Marco Dorigo, Gregor Engels, Rehan O'Grady, Marco Platzner, Franz-Josef Rammig, Wolfgang Reif, Ansgar Trächtler
2010	J	`jnl`	Proof-Carrying Hardware: Concept and Prototype Tool Flow for Online Verification. Int. J. Reconfigurable Comput. Stephanie Drzevitzky, Uwe Kastens, Marco Platzner
2010	—	`ch.`	ReconOS: An Operating System for Dynamically Reconfigurable Hardware. Dynamically Reconfigurable Systems Enno Lübbers, Marco Platzner
2010	J	`jnl`	Selected papers from the 18 IET Comput. Digit. Tech. Udo Kebschull, Marco Platzner, Jürgen Teich
2010	—	`conf`	Towards Adaptive Networking for Embedded Devices based on Reconfigurable Hardware. ERSA Enno Lübbers, Marco Platzner, Christian Plessl, Ariane Keller, Bernhard Plattner
2009	—	`conf`	A Multithreaded Framework for Sequential Monte Carlo Methods on CPU/FPGA Platforms. ARC Markus Happe, Enno Lübbers, Marco Platzner
2009	A	`conf`	ARMLang: A language and compiler for programming reconfigurable mesh many-cores. IPDPS Heiner Giefers, Marco Platzner
2009	B	`conf`	An accelerator for K-TH nearest neighbor thinning based on the IMORC infrastructure. FPL Tobias Schumacher, Christian Plessl, Marco Platzner
2009	—	`conf`	Communication Performance Characterization for Reconfigurable Accelerator Design on the XD1000. ReConFig Tobias Schumacher, Tim Süß, Christian Plessl, Marco Platzner
2009	B	`conf`	Cooperative multithreading in dynamically reconfigurable systems. FPL Enno Lübbers, Marco Platzner
2009	—	`conf`	EvoCaches: Application-specific Adaptation of Cache Mappings. AHS Paul Kaufmann, Christian Plessl, Marco Platzner
2009	Misc	`conf`	IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing. FCCM Tobias Schumacher, Christian Plessl, Marco Platzner
2009	B	`conf`	Program-driven fine-grained power management for the reconfigurable mesh. FPL Heiner Giefers, Marco Platzner
2009	—	`conf`	Proof-Carrying Hardware: Towards Runtime Verification of Reconfigurable Modules. ReConFig Stephanie Drzevitzky, Uwe Kastens, Marco Platzner
2009	J	`jnl`	ReconOS: Multithreaded programming for reconfigurable computers. ACM Trans. Embed. Comput. Syst. Enno Lübbers, Marco Platzner
2008	—	`conf`	A Comparison of Evolvable Hardware Architectures for Classification Tasks. ICES Kyrre Glette, Jim Tørresen, Paul Kaufmann, Marco Platzner
2008	—	`conf`	A Hardware Accelerator for k-th Nearest Neighbor Thinning. ERSA Tobias Schumacher, Robert Meiche, Paul Kaufmann, Enno Lübbers, Christian Plessl, Marco Platzner
2008	B	`conf`	A portable abstraction layer for hardware threads. FPL Enno Lübbers, Marco Platzner
2008	A	`conf`	Advanced techniques for the creation and propagation of modules in cartesian genetic programming. GECCO Paul Kaufmann, Marco Platzner
2008	—	`conf`	Communication and Synchronization in Multithreaded Reconfigurable Computing Systems. ERSA Enno Lübbers, Marco Platzner
2008	—	`conf`	Comparing Evolvable Hardware to Conventional Classifiers for Electromyographic Prosthetic Hand Control. AHS Kyrre Glette, Jim Tørresen, Thiemo Gruber, Bernhard Sick, Paul Kaufmann, Marco Platzner
2008	B	`conf`	Fine grain reconfigurable architectures. FPL Josef Angermeier, Mateusz Majer, Jürgen Teich, Lars Braun, Tobias Schwalb, Philipp Graf, Michael Hübner, Jürgen Becker, Enno Lübbers, Marco Platzner, Christopher Claus, Walter Stechele, Andreas Herkersdorf, Markus Rullmann, Renate Merker
2008	—	`conf`	On Robust Evolution of Digital Hardware. BICC Tobias Knieper, Bertrand Defo, Paul Kaufmann, Marco Platzner
2008	—	`conf`	Realizing reconfigurable mesh algorithms on softcore arrays. ICSAMOS Heiner Giefers, Marco Platzner
2008	—	`conf`	The GOmputer: Accelerating GO with FPGAs. ERSA Marco Platzner, Sven Döhre, Markus Happe, Tobias Kenter, Ulf Lorenz, Tobias Schumacher, Andre Send, Alexander Warkentin
2007	B	`conf`	A Many-core Implementation based on the Reconfigurable Mesh Model. FPL Heiner Giefers, Marco Platzner
2007	—	`conf`	Accelerating the Cube Cut Problem with an FPGA-Augmented Compute Cluster. PARCO Tobias Schumacher, Enno Lübbers, Paul Kaufmann, Marco Platzner
2007	J	`jnl`	Dynamically Reconfigurable Architectures. EURASIP J. Embed. Syst. Neil Bergmann, Marco Platzner, Jürgen Teich
2007	—	`conf`	MOVES: A Modular Framework for Hardware Evolution. AHS Paul Kaufmann, Marco Platzner
2007	B	`conf`	ReconOS: An RTOS supporting Hard- and Software Threads. FPL Enno Lübbers, Marco Platzner
2007	J	`jnl`	Server-based execution of periodic tasks on dynamically reconfigurable hardware. IET Comput. Digit. Tech. Klaus Danne, Roland Mühlenbernd, Marco Platzner
2007	—	`conf`	Toward Self-adaptive Embedded Systems: Multi-objective Hardware Evolution. ARCS Paul Kaufmann, Marco Platzner
2006	B	`conf`	An EDF schedulability test for periodic tasks on reconfigurable hardware devices. LCTES Klaus Danne, Marco Platzner
2006	B	`conf`	Executing Hardware Tasks on Dynamically Reconfigurable Devices Under Real-Time Conditions. FPL Klaus Danne, Roland Mühlenbernd, Marco Platzner
2006	—	`conf`	Optimal temporal partitioning based on slowdown and retiming. FPT Christian Plessl, Marco Platzner, Lothar Thiele
2006	A	`conf`	Partitioned scheduling of periodic real-time tasks onto reconfigurable hardware. IPDPS Klaus Danne, Marco Platzner
2005	B	`conf`	A Heuristic Approach to Schedule Periodic Real-Time Tasks on Reconfigurable Hardware. FPL Klaus Danne, Marco Platzner
2005	—	`conf`	Periodic Real-Time Scheduling for FPGA Computers. WISES Klaus Danne, Marco Platzner
2005	J	`jnl`	System-level performance evaluation of reconfigurable processors. Microprocess. Microsystems Rolf Enzler, Christian Plessl, Marco Platzner
2005	—	`conf`	Zippy - A coarse-grained reconfigurable array with support for hardware virtualization. ASAP Christian Plessl, Marco Platzner
2004	B	`conf`	A Runtime Environment for Reconfigurable Hardware Operating Systems. FPL Herbert Walder, Marco Platzner
2004	Misc	`conf`	Efficient Execution of Process Networks on a Reconfigurable Hardware Virtual Machine. FCCM Matthias Dyer, Marco Platzner, Lothar Thiele
2004	B	`ed.`	Field Programmable Logic and Application, 14th International Conference , FPL 2004, Leuven, Belgium, August 30-September 1, 2004, Proceedings FPL Jürgen Becker, Marco Platzner, Serge Vernalde
2004	J	`jnl`	Operating Systems for Reconfigurable Embedded Platforms: Online Scheduling of Real-Time Tasks. IEEE Trans. Computers Christoph Steiger, Herbert Walder, Marco Platzner
2004	—	`conf`	Virtualization of Hardware - Introduction and Survey. ERSA Christian Plessl, Marco Platzner
2004	—	`conf`	XF-Board: A Prototyping Platform for Reconfigurable Hardware Operating Systems. ERSA Herbert Walder, Samuel Nobs, Marco Platzner
2003	—	`conf`	Co-Simulation of a Hybrid Multi-Context Architecture. Engineering of Reconfigurable Systems and Algorithms Rolf Enzler, Christian Plessl, Marco Platzner
2003	A	`conf`	Fast Online Task Placement on FPGAs: Free Space Partitioning and 2D-Hashing. IPDPS Herbert Walder, Christoph Steiger, Marco Platzner
2003	B	`conf`	Heuristics for Onine Scheduling Real-Time Tasks to Partially Reconfigurable Devices. FPL Christoph Steiger, Herbert Walder, Marco Platzner
2003	J	`jnl`	Instance-Specific Accelerators for Minimum Covering. J. Supercomput. Christian Plessl, Marco Platzner
2003	A	`conf`	Online Scheduling and Placement of Real-time Tasks to Partially Reconfigurable Devices. RTSS Christoph Steiger, Herbert Walder, Marco Platzner, Lothar Thiele
2003	A	`conf`	Online Scheduling for Block-Partitioned Reconfigurable Devices . DATE Herbert Walder, Marco Platzner
2003	—	`conf`	Reconfigurable Hardware Operating Systems: From Design Concepts to Realizations. Engineering of Reconfigurable Systems and Algorithms Herbert Walder, Marco Platzner
2003	—	`conf`	TKDM - a reconfigurable co-processor in a PC's memory slot. FPT Christian Plessl, Marco Platzner
2003	J	`jnl`	The case for reconfigurable hardware in wearable computing. Pers. Ubiquitous Comput. Christian Plessl, Rolf Enzler, Herbert Walder, Jan Beutel, Marco Platzner, Lothar Thiele, Gerhard Tröster
2003	B	`conf`	Virtualizing Hardware with Multi-context Reconfigurable Arrays. FPL Rolf Enzler, Christian Plessl, Marco Platzner
2002	J	`jnl`	A Framework for Run-time Reconfigurable Systems. J. Supercomput. Michael Eisenring, Marco Platzner
2002	Misc	`conf`	Custom Computing Machines for the Set Covering Problem. FCCM Christian Plessl, Marco Platzner
2002	B	`conf`	Partially Reconfigurable Cores for Xilinx Virtex. FPL Matthias Dyer, Christian Plessl, Marco Platzner
2002	Misc	`conf`	Reconfigurable Hardware in Wearable Computing Nodes. ISWC Christian Plessl, Rolf Enzler, Herbert Walder, Jan Beutel, Marco Platzner, Lothar Thiele
2001	J	`jnl`	Object-oriented domain specific compilers for programming FPGAs. IEEE Trans. Very Large Scale Integr. Syst. Oskar Mencer, Marco Platzner, Martin Morf, Michael J. Flynn
2000	Misc	`conf`	An Implementation Framework for Run-time Reconfigurable Systems. PDPTA Michael Eisenring, Marco Platzner
2000	B	`conf`	Optimization of Run-Time Reconfigurable Embedded Systems. FPL Michael Eisenring, Marco Platzner
2000	J	`jnl`	Reconfigurable Accelerators for Combinatorial Problems. Computer Marco Platzner
2000	J	`jnl`	Toward Embedded Qualitative Simulation: A Specialized Computer Architecture for QSim. IEEE Intell. Syst. Marco Platzner, Bernhard Rinner, Reinhold Weiss
1999	B	`conf`	Communication Synthesis for Reconfigurable Embedded Systems. FPL Michael Eisenring, Marco Platzner, Lothar Thiele
1999	—	`conf`	Dynamic Circuit Generation for Boolean Satisfiability in an Object-Oriented Design Environment. HICSS Oskar Mencer, Marco Platzner
1998	B	`conf`	Acceleration of Satisfiability Algorithms by Reconfigurable Hardware. FPL Marco Platzner, Giovanni De Micheli
1997	J	`jnl`	Parallel qualitative simulation. Simul. Pract. Theory Marco Platzner, Bernhard Rinner, Reinhold Weiss
1995	—	`conf`	A Special-purpose Coprocessor for Qualitative Simulation. Euro-Par Gerald Friedl, Marco Platzner, Bernhard Rinner
1995	C	`conf`	A distributed computer architecture for qualitative simulation based on a multi-DSP and FPGAs. PDP Marco Platzner, Bernhard Rinner, Reinhold Weiss
1995	J	`jnl`	Exploiting Parallelism in Constraint Satisfaction for Qualitative Simulation. J. Univers. Comput. Sci. Marco Platzner, Bernhard Rinner, Reinhold Weiss
1995	—	`conf`	Parallel Qualitative Simulation. EUROSIM Marco Platzner, Bernhard Rinner, Reinhold Weiss