Marco Palena

24 papers A 3B 4Journal 14Unranked 2
YearRankTypeTitle / Venue / Authors
2025 J jnl
6G-INTENSE: Intent-Driven Native Artificial Intelligence Architecture Supporting Network-Compute Abstraction and Sensing at the Deep Edge.
IEEE Veh. Technol. Mag.
Akram Boutouchent, Abdelkader Mekrache, Adlen Ksentini, Gereziher Adhane, João Pedro Celestino da Fonseca, Joseph McNamara, Kostas Ramantas, Marco Palena, Marius Iordache, Renato Lo Cigno, Salwa Mostafa, Swastika Roy, Christos V. Verikoukis
2025 A conf
A Theorem Prover Based Approach for SAT-Based Model Checking Certification.
CADE
Giulia Sindoni, Paolo Pasini, Gianpiero Cabodi, Paolo E. Camurati, Alberto Griggio, Marco Palena, Marco Roveri, Stefano Tonetta
2024 J jnl
Edge-device Collaborative Computing for Multi-view Classification.
CoRR
Marco Palena, Tania Cerquitelli, Carla-Fabiana Chiasserini
2024 J jnl
Edge-device collaborative computing for multi-view classification.
Comput. Networks
Marco Palena, Tania Cerquitelli, Carla-Fabiana Chiasserini
2024 J jnl
Hardware Model Checking Algorithms and Techniques.
Algorithms
Gianpiero Cabodi, Paolo E. Camurati, Marco Palena, Paolo Pasini
2024 J jnl
Improving Bounded Model Checking Exploiting Interpolation-Based Learning and Strengthening.
IEEE Access
Gianpiero Cabodi, Paolo E. Camurati, Marco Palena, Paolo Pasini
2024 J jnl
Optimizing Binary Decision Diagrams for Interpretable Machine Learning Classification.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Gianpiero Cabodi, Paolo E. Camurati, João Marques-Silva, Marco Palena, Paolo Pasini
2022 J jnl
Interpolation with guided refinement: revisiting incrementality in SAT-based unbounded model checking.
Formal Methods Syst. Des.
Gianpiero Cabodi, Paolo E. Camurati, Marco Palena, Paolo Pasini
2021 A conf
Optimizing Binary Decision Diagrams for Interpretable Machine Learning Classification.
DATE
Gianpiero Cabodi, Paolo E. Camurati, Alexey Ignatiev, João Marques-Silva, Marco Palena, Paolo Pasini
2020 J jnl
Reducing Interpolant Circuit Size Through SAT-Based Weakening.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Gianpiero Cabodi, Paolo Camurati, Marco Palena, Paolo Pasini, Danilo Vendraminetto
2019 J jnl
Logic Synthesis for Interpolant Circuit Compaction.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Gianpiero Cabodi, Paolo Camurati, Marco Palena, Paolo Pasini, Danilo Vendraminetto
2018 J jnl
Test of Reconfigurable Modules in Scan Networks.
IEEE Trans. Computers
Riccardo Cantoro, Farrokh Ghani Zadegan, Marco Palena, Paolo Pasini, Erik Larsson, Matteo Sonza Reorda
2018 J jnl
To split or to group: from divide-and-conquer to sub-task sharing for verifying multiple properties in model checking.
Int. J. Softw. Tools Technol. Transf.
Gianpiero Cabodi, Paolo Camurati, Carmelo Loiacono, Marco Palena, Paolo Pasini, Denis Patti, Stefano Quer
2017 — —
Exploiting Boolean Satisfiability Solvers for High Performance Bit-Level Model Checking.
Marco Palena
2017 B conf
Interpolation-Based Learning as a Mean to Speed-Up Bounded Model Checking (Short Paper).
SEFM
Gianpiero Cabodi, Paolo Camurati, Marco Palena, Paolo Pasini, Danilo Vendraminetto
2017 J jnl
SAT solver management strategies in IC3: an experimental approach.
Formal Methods Syst. Des.
Gianpiero Cabodi, Paolo Camurati, Alan Mishchenko, Marco Palena, Paolo Pasini
2016 B conf
A 7/2-Approximation Algorithm for the Maximum Duo-Preservation String Mapping Problem.
CPM
Nicolas Boria, Gianpiero Cabodi, Paolo Camurati, Marco Palena, Paolo Pasini, Stefano Quer
2016 J jnl
A Greedy Approach to Answer Reachability Queries on DAGs.
CoRR
Nicolas Boria, Gianpiero Cabodi, Paolo Camurati, Marco Palena, Paolo Pasini, Stefano Quer
2016 B conf
Reducing interpolant circuit size by ad-hoc logic synthesis and SAT-based weakening.
FMCAD
Gianpiero Cabodi, Paolo Camurati, Marco Palena, Paolo Pasini, Danilo Vendraminetto
2016 — conf
Test Time Minimization in Reconfigurable Scan Networks.
ATS
Riccardo Cantoro, Marco Palena, Paolo Pasini, Matteo Sonza Reorda
2014 J jnl
Hardware Model Checking Competition 2014: An Analysis and Comparison of Solvers and Benchmarks.
J. Satisf. Boolean Model. Comput.
Gianpiero Cabodi, Carmelo Loiacono, Marco Palena, Paolo Pasini, Denis Patti, Stefano Quer, Danilo Vendraminetto, Armin Biere, Keijo Heljanko
2014 B conf
Interpolation with Guided Refinement: Revisiting incrementality in SAT-based unbounded model checking.
FMCAD
Gianpiero Cabodi, Marco Palena, Paolo Pasini
2013 A conf
Fast cone-of-influence computation and estimation in problems with multiple properties.
DATE
Carmelo Loiacono, Marco Palena, Paolo Pasini, Denis Patti, Stefano Quer, Stefano Ricossa, Danilo Vendraminetto, Jason Baumgartner
2013 — conf
Trading-off Incrementality and Dynamic Restart of Multiple Solvers in IC3.
DIFTS@FMCAD
Marco Palena, Gianpiero Cabodi, Alan Mishchenko