Marcelo Daniel Berejuck

13 papers Journal 7Unranked 6
YearRankTypeTitle / Venue / Authors
2021 — conf
Evaluation of blockchain techniques to ensure secure access on remote FPGA laboratories.
ISDFS
Emilio Werner, Jhennifer Cristine Matias, Marcelo Daniel Berejuck, Hamadou Saliah-Hassane
2021 J jnl
MPI hardware framework for many-core based embedded systems.
Int. J. Sens. Networks
Rodrigo V. M. Pereira, Laio Oriel Seman, Marcelo Daniel Berejuck, Douglas Rossi de Melo, Analúcia Schiaffino Morales, Eduardo Augusto Bezerra
2021 — conf
Main Attacks and Ways to Keep Security Guidelines Updated in Remote Laboratories.
REV
Emilio Werner, Jhennifer Cristine Matias, Marcelo Daniel Berejuck, Hamadou Saliah-Hassane
2021 — conf
Work-in Progress: Development of an E-learning FPGA Platform Following the IEEE SA Std. 1876 - 2019 Standard for Networked Smart Learning Objects for Online Laboratories.
REV
Marcelo Daniel Berejuck, Jhennifer Cristine Matias, Emilio Werner, Hamadou Saliah-Hassane
2020 J jnl
Finite-State Markov Chains Channel Model for CubeSats Communication Uplink.
IEEE Trans. Aerosp. Electron. Syst.
Julian J. Lopez-Salamanca, Laio Oriel Seman, Marcelo Daniel Berejuck, Eduardo A. Bezerra
2019 — conf
Dedicated monitoring service without routing mitigation for Networks-on-Chip.
LASCAS
Gabriel Ganzer, Marcelo Daniel Berejuck
2018 J jnl
A dynamic partial reconfiguration design flow for permanent faults mitigation in FPGAs.
Microelectron. Reliab.
Victor M. Goncalves Martins, Paulo Ricardo Cechelero Villa, Rodrigo Travessini, Marcelo Daniel Berejuck, Eduardo Augusto Bezerra
2017 — conf
A Digital Implementation of Eddystone Standard Using IBM 180nm Cell Library.
SBESC
Rodrigo V. M. Pereira, Fernando Rangel de Sousa, Eduardo Augusto Bezerra, Marcelo Daniel Berejuck
2016 J jnl
An overview about Networks-on-Chip with multicast suppor.
CoRR
Marcelo Daniel Berejuck
2016 J jnl
Evaluation of a Connectionless Technique for System-on-Chip Interconnection.
J. Circuits Syst. Comput.
Marcelo Daniel Berejuck, Antônio Augusto Fröhlich
2015 J jnl
Network-on-Chip with load balancing based on interleave of flits technique.
CoRR
Marcelo Daniel Berejuck
2014 J jnl
Evaluation of silicon consumption for a connectionless Network-on-Chip.
CoRR
Marcelo Daniel Berejuck, Antônio Augusto Fröhlich
2009 — conf
Adding mechanisms for QoS to a network-on-chip.
SBCCI
Marcelo Daniel Berejuck, César Albenes Zeferino