Marcelo Antonio Pavanello

20 papers Journal 11Unranked 9
YearRankTypeTitle / Venue / Authors
2024 — conf
Electrical Characterization of nMOSFETs from a 180 nm Commercial Technology at Low Temperatures.
CCE
Jessé de Oliveira, Marcelo Antonio Pavanello, Michelly de Souza
2024 — conf
Experimental Decomposition of the Carrier Mobility in the Conduction Planes of 2-Level Stacked Nanowires.
CCE
Giovanni Almeida Matos, Jaime CalÇade Rodrigues, Michelly de Souza, Mikaël Cassé, Sylvain Barraud, Olivier Faynot, Marcelo Antonio Pavanello
2021 — conf
Experimental Assessment of Variability in Junctionless Nanowire nMOS Transistors.
ESSDERC
Michelly de Souza, Sylvain Barraud, Mikaël Cassé, Maud Vinet, Olivier Faynot, Marcelo Antonio Pavanello
2019 — conf
Compact Analytical Model for Trap-Related Low Frequency Noise in Junctionless Transistors.
ESSDERC
Renan Trevisoli, Rodrigo Trevisoli Doria, Sylvain Barraud, Marcelo Antonio Pavanello
2019 — conf
FOSS EKV2.6 Verilog-A Compact MOSFET Model.
ESSDERC
Wladek Grabinski, Ahmed Abo-Elhadid, Marek Mierzwinski, Laurent Lemaitre, Mike Brinson, Christophe Lallement, Jean-Michel Sallese, Sadayuki Yoshitomi, Paul Malisse, Henri Oguey, Stefan Cserveny, Marcelo Antonio Pavanello, Christian C. Enz, François Krummenacher, Eric A. Vittoz, Michelly de Souza, Daniel Tomaszewski, Jolanta Malesinska, Grzegorz Gluszko, Matthias Bucher, Nikolaos Makris, Aristeidis Nikolaou
2017 — conf
A new method for junctionless transistors parameters extraction.
ESSDERC
Renan Trevisoli Doria, Rodrigo Trevisoli Doria, Michelly de Souza, Marcelo Antonio Pavanello, Sylvain Barraud
2017 J jnl
Harmonic distortion analysis of triple gate SOI nanowire MOSFETS down to 100 K.
Microelectron. Reliab.
Bruna Cardoso Paz, Renan Trevisoli Doria, Mikaël Cassé, Sylvain Barraud, Gilles Reimbold, Maud Vinet, Olivier Faynot, Marcelo Antonio Pavanello
2016 — conf
Analog performance of strained SOI nanowires down to 10K.
ESSDERC
Bruna Cardoso Paz, Marcelo Antonio Pavanello, Mikaël Cassé, Sylvain Barraud, Gilles Reimbold, Maud Vinet, Olivier Faynot
2016 J jnl
Drain current model for short-channel triple gate junctionless nanowire transistors.
Microelectron. Reliab.
Bruna Cardoso Paz, Mikaël Cassé, Sylvain Barraud, Gilles Reimbold, Olivier Faynot, F. Avila-Herrera, Antonio Cerdeira, Marcelo Antonio Pavanello
2016 J jnl
Experimental and simulation analysis of electrical characteristics of common-source current mirrors implemented with asymmetric self-cascode silicon-on-insulator n-channel metal-oxide-semiconductor field-effect transistors.
IET Circuits Devices Syst.
Rafael Assalti, Lígia Martins d'Oliveira, Marcelo Antonio Pavanello, Denis Flandre, Michelly de Souza
2016 J jnl
Temperature dependence of the electrical characteristics up to 370 K of amorphous In-Ga-ZnO thin film transistors.
Microelectron. Reliab.
Magali Estrada, M. Rivas, Ivan Garduño, F. Avila-Herrera, Antonio Cerdeira, Marcelo Antonio Pavanello, Israel Mejia, M. A. Quevedo-Lopez
2013 J jnl
Asymmetric channel doping profile and temperature reduction influence on the performance of current mirrors implemented with FD SOI nMOSFETs.
Microelectron. Reliab.
Michelly de Souza, Bruna Cardoso Paz, Denis Flandre, Marcelo Antonio Pavanello
2012 J jnl
An analytic method to compute the stress dependence on the dimensions and its influence in the characteristics of triple gate devices.
Microelectron. Reliab.
Renan Trevisoli Doria, João Antonio Martino, Eddy Simoen, Cor Claeys, Marcelo Antonio Pavanello
2011 J jnl
An explicit multi-exponential model for semiconductor junctions with series and shunt resistances.
Microelectron. Reliab.
Denise C. Lugo Muñoz, Juan Muci, Adelmo Ortiz-Conde, Francisco J. García-Sánchez, Michelly de Souza, Marcelo Antonio Pavanello
2008 J jnl
Harmonic distortion analysis of double gate graded-channel MOSFETs operating in saturation.
Microelectron. J.
Rodrigo Trevisoli Doria, Antonio Cerdeira, Jean-Pierre Raskin, Denis Flandre, Marcelo Antonio Pavanello
2006 J jnl
Cryogenic operation of graded-channel silicon-on-insulator nMOSFETs for high performance analog applications.
Microelectron. J.
Marcelo Antonio Pavanello, Paula Ghedini Der Agopian, João Antonio Martino, Denis Flandre
2006 J jnl
Evaluation of graded-channel SOI MOSFET operation at high temperatures.
Microelectron. J.
Milene Galeti, Marcelo Antonio Pavanello, João Antonio Martino
2006 J jnl
Gain improvement in operational transconductance amplifiers using Graded-Channel SOI nMOSFETS.
Microelectron. J.
Salvador Pinillos Gimenez, Marcelo Antonio Pavanello, João Antonio Martino, Denis Flandre
2003 — conf
Design of Operational Transconductance Amplifiers with Improved Gain by Using Graded-Channel SOI nMOSFETs.
SBCCI
Salvador Pinillos Gimenez, Marcelo Antonio Pavanello, João Antonio Martino, Stephane Adriaensen, Denis Flandre
2001 — conf
Analog Circuit Design Using Graded-Channel SOI NMOSFETS.
SBCCI
Marcelo Antonio Pavanello, João Antonio Martino, Denis Flandre