Marcello Lajolo

26 papers A 4C 4Misc 1Journal 3Unranked 13
YearRankTypeTitle / Venue / Authors
2011 — book
Low Power Networks-on-Chip.
Cristina Silvano, Marcello Lajolo, Gianluca Palermo
2008 A conf
Variation tolerant NoC design by means of self-calibrating links.
DATE
Simone Medardoni, Marcello Lajolo, Davide Bertozzi
2007 A conf
Hardware scheduling support in SMP architectures.
DATE
André C. Nácul, Francesco Regazzoni, Marcello Lajolo
2007 J jnl
In Memoriam: Margarida F. Jacome.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Gustavo de Veciana, Marcello Lajolo, Chen He, Enrico Macii, Sachin S. Sapatnekar
2006 C conf
C-based Design of a Flexible Wrapper for Tiled Networks On Chip.
FDL
Subhek Garg, Marcello Lajolo
2006 — conf
Hardware/software partitioning of operating systems: a behavioral synthesis approach.
ACM Great Lakes Symposium on VLSI
Sathish Chandra, Francesco Regazzoni, Marcello Lajolo
2005 C conf
Automatic synthesis of the Hardware/Software Interface.
FDL
Francesco Regazzoni, André C. Nácul, Marcello Lajolo
2005 C conf
Interface-Centric Abstraction Level for Rapid HW/SW Integration.
FDL
André C. Nácul, Marcello Lajolo, T. Givarjis
2005 — conf
SOFTENIT: a methodology for boosting the software content of system-on-chip designs.
ACM Great Lakes Symposium on VLSI
Abhishek Mitra, Marcello Lajolo, Kanishka Lahiri
2003 C conf
A Case Study of a System Level Approach to Exploration of Queuing Management Schemes for Input Queue Packet Switches.
PDP
Chen He, Marcello Lajolo, Margarida F. Jacome
2002 J jnl
Cosimulation-based power estimation for system-on-chip design.
IEEE Trans. Very Large Scale Integr. Syst.
Marcello Lajolo, Anand Raghunathan, Sujit Dey, Luciano Lavagno
2002 — conf
On the evaluation of fairness for input queue switches.
ICC
Dirceu Cavendish, Marcello Lajolo, Hongbo Liu
2002 — conf
On the support of minimum service rates for input queue switches.
ICC
Dirceu Cavendish, Marcello Lajolo, Hongbo Liu
2001 J jnl
Bus guardians: an effective solution for online detection and correction of faults affecting system-on-chip buses.
IEEE Trans. Very Large Scale Integr. Syst.
Marcello Lajolo
2001 Misc conf
Early Evaluation Of Bus Interconnects Dependability For System-On-Chip Designs.
VLSI Design
Marcello Lajolo, Matteo Sonza Reorda, Massimo Violante
2000 — conf
Automatic test bench generation for simulation-based validation.
CODES
Marcello Lajolo, Luciano Lavagno, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
2000 — conf
Behavioral-level test vector generation for system-on-chip designs.
HLDVT
Marcello Lajolo, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante, Luciano Lavagno
2000 — conf
Compilation-based software performance estimation for system level design.
HLDVT
Mihai T. Lazarescu, Jwahar R. Bammi, Edwin A. Harcourt, Luciano Lavagno, Marcello Lajolo
2000 — conf
Early Power Estimation for System-on-Chip Designs.
PATMOS
Marcello Lajolo, Luciano Lavagno, Matteo Sonza Reorda, Massimo Violante
2000 A conf
Efficient Power Co-Estimation Techniques for System-on-Chip Design.
DATE
Marcello Lajolo, Anand Raghunathan, Sujit Dey, Luciano Lavagno
2000 A conf
Evaluating System Dependability in a Co-Design Framework.
DATE
Marcello Lajolo, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante, Luciano Lavagno
2000 — conf
System-level test bench generation in a co-design framework.
ETW
Marcello Lajolo, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante, Luciano Lavagno
1999 — conf
A compilation-based software estimation scheme for hardware/software co-simulation.
CODES
Marcello Lajolo, Mihai T. Lazarescu, Alberto L. Sangiovanni-Vincentelli
1999 — conf
Fast Instruction Cache Simulation Strategies in a Hardware/Software Co-Design Environment.
ASP-DAC
Marcello Lajolo, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli
1998 — conf
A case study on modeling shared memory access effects during performance analysis of HW/SW systems.
CODES
Marcello Lajolo, Anand Raghunathan, Sujit Dey, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli
1998 — conf
Software timing analysis using HW/SW cosimulation and instruction set simulator.
CODES
Jie Liu, Marcello Lajolo, Alberto L. Sangiovanni-Vincentelli