Marcello Barbirotta

27 papers B 3Journal 10Unranked 14

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	Configurable Hardware Acceleration for Hyperdimensional Computing Extension on RISC-V. IEEE Trans. Computers Rocco Martino, Marco Angioli, Antonello Rosato, Marcello Barbirotta, Abdallah Cheikh, Mauro Olivieri
2026	J	`jnl`	HD-CB: The First Exploration of Hyperdimensional Computing for Contextual Bandits Problems. IEEE Open J. Comput. Soc. Marco Angioli, Antonello Rosato, Marcello Barbirotta, Rocco Martino, Francesco Menichelli, Mauro Olivieri
2025	J	`jnl`	Efficient Implementation of LinearUCB through Algorithmic Improvements and Vector Computing Acceleration for Embedded Learning Systems. CoRR Marco Angioli, Marcello Barbirotta, Abdallah Cheikh, Antonio Mastrandrea, Francesco Menichelli, Mauro Olivieri
2025	J	`jnl`	Efficient Implementation of LinearUCB through Algorithmic Improvements and Vector Computing Acceleration for Embedded Learning Systems. ACM Trans. Embed. Comput. Syst. Marco Angioli, Marcello Barbirotta, Abdallah Cheikh, Antonio Mastrandrea, Francesco Menichelli, Mauro Olivieri
2025	J	`jnl`	HD-CB: The First Exploration of Hyperdimensional Computing for Contextual Bandits Problems. CoRR Marco Angioli, Antonello Rosato, Marcello Barbirotta, Rocco Martino, Francesco Menichelli, Mauro Olivieri
2025	B	`conf`	HD-CBBIN: A Lightweight Approach for Contextual Bandit Learning in Real-Time Applications. IJCNN Marco Angioli, Antonello Rosato, Marcello Barbirotta, Rocco Martino, Andrea Marcelli, Antonio Mastrandrea, Mauro Olivieri
2024	J	`jnl`	A RISC-V Fault-Tolerant Soft-Processor Based on Full/Partial Heterogeneous Dual-Core Protection. IEEE Access Francesco Vigli, Marcello Barbirotta, Abdallah Cheikh, Francesco Menichelli, Antonio Mastrandrea, Mauro Olivieri
2024	B	`conf`	AeneasHDC: An Automatic Framework for Deploying Hyperdimensional Computing Models on FPGAs. IJCNN Marco Angioli, Saeid Jamili, Marcello Barbirotta, Abdallah Cheikh, Antonio Mastrandrea, Francesco Menichelli, Antonello Rosato, Mauro Olivieri
2024	—	`conf`	Alternative Implementations of Error Correcting Codes in Register Files of a RISC-V Safety Critical Processor. ApplePies Marcello Barbirotta, Marco Angioli, Antonio Mastrandrea, Abdallah Cheikh, Francesco Menichelli, Mauro Olivieri
2024	J	`jnl`	Design, Implementation and Evaluation of a New Variable Latency Integer Division Scheme. IEEE Trans. Computers Marco Angioli, Marcello Barbirotta, Abdallah Cheikh, Antonio Mastrandrea, Francesco Menichelli, Saeid Jamili, Mauro Olivieri
2024	—	`conf`	Dual-Modular-Redundancy Voting Circuits for Single-Event-Transient Mitigation. DFT Marcello Barbirotta, Marco Angioli, Antonio Mastrandrea, Francesco Menichelli, Abdallah Cheikh, Mauro Olivieri
2024	J	`jnl`	Dynamic Triple Modular Redundancy in Interleaved Hardware Threads: An Alternative Solution to Lockstep Multi-Cores for Fault-Tolerant Systems. IEEE Access Marcello Barbirotta, Francesco Menichelli, Abdallah Cheikh, Antonio Mastrandrea, Marco Angioli, Mauro Olivieri
2024	J	`jnl`	Enhancing Fault Tolerance in High-Performance Computing: A Real Hardware Case Study on a RISC-V Vector Processing Unit. IEEE Open J. Comput. Soc. Marcello Barbirotta, Francesco Minervini, Carlos Rojas Morales, Adrián Cristal, Osman S. Unsal, Mauro Olivieri
2024	—	`conf`	Exploring Variable Latency Dividers in Vector Hardware Accelerators. PRIME Marco Angioli, Marcello Barbirotta, Abdallah Cheikh, Antonio Mastrandrea, Mauro Olivieri
2024	—	`conf`	Special Session: SE-UVM, an Integrated Simulation Environment for Single Event Induced Failures Characterization and its Application to the CV32E40P Processor. DFT Marcello Barbirotta, Marco Angioli, Antonio Mastrandrea, Francesco Menichelli, Abdallah Cheikh, Mauro Olivieri
2023	—	`conf`	A Universal Hardware Emulator for Verification IPs on FPGA: A Novel and Low-Cost Approach. ApplePies Saeid Jamili, Antonio Mastrandrea, Abdallah Cheikh, Marcello Barbirotta, Francesco Menichelli, Marco Angioli, Mauro Olivieri
2023	—	`conf`	Automatic Hardware Accelerators Reconfiguration through LinearUCB Algorithms on a RISC-V Processor. PRIME Marco Angioli, Marcello Barbirotta, Antonio Mastrandrea, Saeid Jamili, Mauro Olivieri
2023	—	`conf`	Heterogeneous Tightly-Coupled Dual Core Architecture Against Single Event Effects. ApplePies Marcello Barbirotta, Francesco Menichelli, Antonio Mastrandrea, Abdallah Cheikh, Marco Angioli, Saeid Jamili, Mauro Olivieri
2023	—	`conf`	Single Event Transient Reliability Analysis on a Fault-Tolerant RISC-V Microprocessor Design. ApplePies Marcello Barbirotta, Marco Angioli, Antonio Mastrandrea, Abdallah Cheikh, Saeid Jamili, Francesco Menichelli, Mauro Olivieri
2022	—	`conf`	3D-Printed Face Mask with Integrated Sensors as Protective and Monitoring Tool. AISEM Silvia Casalinuovo, Alessio Buzzin, Antonio Mastrandrea, Ivan Mazzetta, Marcello Barbirotta, Lorenzo Iannascoli, Augusto Nascetti, Giampiero de Cesare, Donatella Puglisi, Domenico Caputo
2022	—	`conf`	Analysis of a Fault Tolerant Edge-Computing Microarchitecture Exploiting Vector Acceleration. PRIME Marcello Barbirotta, Abdallah Cheikh, Antonio Mastrandrea, Francesco Menichelli, Mauro Olivieri
2022	—	`conf`	Contextual Bandits Algorithms for Reconfigurable Hardware Accelerators. ApplePies Marco Angioli, Marcello Barbirotta, Abdallah Cheikh, Antonio Mastrandrea, Francesco Menichelli, Saeid Jamili, Mauro Olivieri
2022	J	`jnl`	Design and Evaluation of Buffered Triple Modular Redundancy in Interleaved-Multi-Threading Processors. IEEE Access Marcello Barbirotta, Abdallah Cheikh, Antonio Mastrandrea, Francesco Menichelli, Mauro Olivieri
2022	—	`conf`	Implementation of Dynamic Acceleration Unit Exchange on a RISC-V Soft-Processor. ApplePies Saeid Jamili, Abdallah Cheikh, Antonio Mastrandrea, Marcello Barbirotta, Francesco Menichelli, Marco Angioli, Mauro Olivieri
2021	—	`conf`	A Fault Tolerant soft-core obtained from an Interleaved-Multi- Threading RISC- V microprocessor design. DFT Marcello Barbirotta, Abdallah Cheikh, Antonio Mastrandrea, Francesco Menichelli, Francesco Vigli, Mauro Olivieri
2020	B	`conf`	ADMM Consensus for Deep LSTM Networks. IJCNN Antonello Rosato, Federico Succetti, Marcello Barbirotta, Massimo Panella
2020	—	`conf`	Fault resilience analysis of a RISC-V microprocessor design through a dedicated UVM environment. DFT Marcello Barbirotta, Antonio Mastrandrea, Francesco Menichelli, Francesco Vigli, Luigi Blasi, Abdallah Cheikh, Stefano Sordillo, Fabio Di Gennaro, Mauro Olivieri