Marcel Runge

20 papers C 6Journal 2Unranked 12
YearRankTypeTitle / Venue / Authors
2023 — conf
A 4.4 GS/s 220 MHz ΣΔ ADC with a Linearized Back-Gate Controlled GmC Filter.
VLSI Technology and Circuits
Julius Edler, Marcel Runge, Sebastian Linnhoff, Friedel Gerfers
2023 J jnl
An 18-MS/s 76-dB SNDR Continuous-Time Δ Σ Modulator Incorporating an Input Voltage Tracking GmC Loop Filter.
IEEE J. Solid State Circuits
Marcel Runge, Julius Edler, Tobias Kaiser, Kai Misselwitz, Friedel Gerfers
2022 — conf
A 30-MHz BW 74.6-dB SNDR 92-dB SFDR CT ΔΣ Modulator with Active Body-Bias DAC Calibration in 22nm FDSOI CMOS.
CICC
Marcel Runge, Julius Edler, Dario Schmock, Tobias Kaiser, Friedel Gerfers
2022 — conf
A Calibration-Free 96.7 dB SNDR 4 MS/s CT I-SD Modulator With Single Feedback DAC.
ICECS 2022
Kai Misselwitz, Marcel Runge, Friedel Gerfers
2021 — conf
A 0.9V 45MS/s CT ΔΣ Modulator with 94dB SFDR and 25.6fJ/conv. enabled by a Digital Static and ISI Calibration in 22 FDSOI CMOS.
CICC
Marcel Runge, Dario Schmock, Tobias Kaiser, Friedel Gerfers
2021 — conf
A 18MS/s 76dB SNDR 93dB SFDR CT ΔΣ Modulator with Input Voltage Tracking 2nd-Order GmVC Filter and Shared FIR DAC in 22nm FDSOI CMOS.
CICC
Marcel Runge, Julius Edler, Tobias Kaiser, Friedel Gerfers
2021 — conf
A Dynamic Body-Bias Linearization Technique Enabling Wide-Band GmC based Continous-Time Sigma-Delta Converters in 22 nm FD-SOI CMOS.
MWSCAS
Julius Edler, Marcel Runge, Friedel Gerfers
2021 J jnl
Advanced Mixed Signal Concepts Exploiting the Strong Body-Bias Effect in CMOS 22FDX
IEEE Trans. Circuits Syst. I Regul. Pap.
Enne Wittenhagen, Marcel Runge, Nima Lotfi, Hossein Ghafarian, Yuan Tian, Friedel Gerfers
2020 — conf
A 64 GBaud 6-Bit Current Steering DAC With a Binary Tree Current Summing Network.
ICECS
Paul Hollmann, Marcel Runge, Friedel Gerfers
2020 C conf
A DAC Linearization Technique Enabling 15-Bit INL through Adaptive Body-Biasing in 22FDX.
ISCAS
Marcel Runge, Dario Schmock, Enne Wittenhagen, Friedel Gerfers
2020 C conf
A Sub-Sampling Beam-Forming Summation Track and Hold for Software Defined Radio.
ISCAS
Enne Wittenhagen, Marcel Runge, Wilhelm Keusgen, Friedel Gerfers
2019 C conf
A Single-Channel 18.5 GS/s 5-bit Flash ADC using a Body-Biased Comparator Architecture in 22nm FD-SOI.
ISCAS
Nima Lotfi, Pedro Lehmann Ibáñez, Marcel Runge, Friedel Gerfers
2019 — conf
Body-Bias Techniques in CMOS 22FDX® for Mixed-Signal Circuits and Systems.
ICECS
Friedel Gerfers, Nima Lotfi, Enne Wittenhagen, Hossein Ghafarian, Yuan Tian, Marcel Runge
2019 C conf
Optimized Zero Placement within Noise Coupling Transfer Functions for Oversampled ADCs.
ISCAS
Marcel Runge, Nima Lotfi, Friedel Gerfers
2018 — conf
A 0.02-mm2 9-bit 100-MS/s Charge-Injection Cell Based SAR-ADC in 65-nm LP CMOS.
ESSCIRC
Marcel Runge, Dario Schmock, Philipp Scholz, Georg Böck, Friedel Gerfers
2018 — conf
A Temperature and Process Corner Insensitive Design Method for Digital Circuits in 40nm CMOS.
MWSCAS
Marcel Runge, Sebastian Linnhoff, Friedel Gerfers
2018 — conf
AMDAC Common-Mode Shifting Technique enabling Power Consumption Reduction in Pipeline ADCs.
MWSCAS
Nima Lotfi, Marcel Runge, Friedel Gerfers
2018 C conf
Correlation Based Time-Variant DAC Error Estimation in Continuous-Time ∑Δ ADCs With Pseudo Random Noise.
ISCAS
Marcel Runge, Friedel Gerfers
2017 C conf
A digital compensation method canceling static and non-linear time-variant feedback DAC errors in ΣΔ analog-to-digital converters.
ISCAS
Marcel Runge, Friedel Gerfers
2017 — conf
Noise and non-linearity analysis of a charge-injection-cell-based 10-bit 50-MS/s SAR-ADC.
MWSCAS
Marcel Runge, Dario Schmock, Friedel Gerfers