Marcel Baláz - RankMe

24 papers C 17Journal 4Unranked 3

Year	Rank	Type	Title / Venue / Authors
2022	—	`conf`	Intelligent Monitoring System for Universal Data Collection and Analysis. RADIOELEKTRONIKA Ondrej Kachman, Jakub Findura, Marcel Baláz, Gábor Gyepes, Libor Majer, Marian Vojs
2020	C	`conf`	Efficient Patch Module for Single-bank or Dual-bank Firmware Updates for Embedded Devices. DDECS Ondrej Kachman, Marcel Baláz
2019	J	`jnl`	Universal framework for remote firmware updates of low-power devices. Comput. Commun. Ondrej Kachman, Marcel Baláz, Peter Malík
2018	J	`jnl`	Hardware redundancy architecture based on reconfigurable logic blocks with persistent high reliability improvement. Microelectron. Reliab. Stefan Kristofík, Marcel Baláz, Peter Malík
2017	—	`conf`	Configurable Reprogramming Methodology for Embedded Low-Power Devices. DoCEIS Ondrej Kachman, Marcel Baláz
2017	C	`conf`	Firmware Update Manager: A remote firmware reprogramming tool for low-power devices. DDECS Ondrej Kachman, Marcel Baláz
2016	C	`conf`	Built-in self-repair architecture generator for digital cores. DDECS Stefan Kristofík, Marcel Baláz
2016	—	`conf`	Effective Over-the-Air Reprogramming for Low-Power Devices in Cyber-Physical Systems. DoCEIS Ondrej Kachman, Marcel Baláz
2016	C	`conf`	Optimized differencing algorithm for firmware updates of low-power devices. DDECS Ondrej Kachman, Marcel Baláz
2015	C	`conf`	Generic Self Repair Architecture with Multiple Fault Handling Capability. DSD Marcel Baláz, Stefan Kristofík
2015	C	`conf`	Generic Self Repair Architecture with On-Line Fault Diagnosis. DDECS Stefan Kristofík, Marcel Baláz, Mária Fischerová
2014	C	`conf`	Case study: BISR for a processor multiplier. DDECS Andrej Kincel, Marcel Baláz
2014	C	`conf`	Generic built-in self-repair architectures for SoC logic cores. DDECS Marcel Baláz, Stefan Kristofík, Mária Fischerová
2013	J	`jnl`	Compressed Skewed-Load Delay Test Generation Based on Evolution and Deterministic Initialization of Populations. Comput. Informatics Roland Dobai, Marcel Baláz
2013	C	`conf`	MBIST for LEON3 processor core cache. DDECS Andrej Kincel, Marcel Baláz
2013	J	`jnl`	SAT-based generation of compressed skewed-load tests for transition delay faults. Microprocess. Microsystems Roland Dobai, Marcel Baláz
2012	C	`conf`	Automated Generation of Built-In Self-Repair Architectures for Random Logic SoC Cores. DSD Roland Dobai, Marcel Baláz, Mária Fischerová
2012	C	`conf`	Genetic method for compressed skewed-load delay test generation. DDECS Roland Dobai, Marcel Baláz
2011	C	`conf`	SAT-Based Generation of Compressed Skewed-Load Tests for Transition Delay Faults. DSD Roland Dobai, Marcel Baláz
2009	C	`conf`	MDCT / IMDCT low power implementations in 90 nm CMOS technology for MP3 audio. DDECS Peter Malík, Michal Ufnal, Arkadiusz W. Luczyk, Marcel Baláz, Witold A. Pleskacz
2008	C	`conf`	Various MDCT implementations in 0.35µm CMOS. DDECS Peter Malík, Marcel Baláz, Martin Simlastík, Arkadiusz W. Luczyk, Witold A. Pleskacz
2007	C	`conf`	An Improved MDCT IP Core Generator with Architectural Model Simulation. DDECS Peter Malík, Marcel Baláz, Tomás Pikula, Martin Simlastík
2006	C	`conf`	FPGA Implementation of a Fast MDCT Algorithm. DDECS Martin Simlastík, Peter Malík, Tomás Pikula, Marcel Baláz
2006	C	`conf`	MDCT IP Core Generator with Architectural Model Simulation. VLSI-SoC Peter Malík, Marcel Baláz, Tomás Pikula, Martin Simlastík