Manuel J. Barragan Asian

24 papers A 2B 4C 2Journal 10Unranked 6
YearRankTypeTitle / Venue / Authors
2026 — conf
Benchmarking the Symmetry of MOSFET Compact Models with Emphasis on ACM2.
LASCAS
Deni Germano Alves Neto, Márcio Cherem Schneider, Manuel J. Barragan Asian, Sylvain Bourdel, Carlos Galup-Montoro
2024 J jnl
Design-Oriented Single-Piece Explicit I-V DC Charge-Based Model for MOS Transistors in Nanometric Technologies.
IEEE Access
Julien Poupon, Manuel J. Barragan Asian, Andreia Cathelin, Sylvain Bourdel
2024 J jnl
N-Path Filtering and Mixing Analysis - A General Approach Based on Fourier Transform.
IEEE Trans. Circuits Syst. I Regul. Pap.
Florence Podevin, Imadeddine Bendjeddou, Fadel Mohsen, Catalin Andrei Dobrin, Sana Ibrahim, Ali Al Shakoush, Mamadou Diallo, Jordan Corsi, Loic Vincent, Manuel J. Barragan Asian, Sylvain Bourdel
2024 J jnl
Wideband Tunable N-Path Mixer With Calibrated Harmonic Rejection Including the 7th LO Harmonic.
IEEE Trans. Circuits Syst. I Regul. Pap.
Sana Ibrahim, Ali Al Shakoush, Serge Subias, Loic Vincent, Manuel J. Barragan Asian, Laurent Fesquet, Florence Podevin, Sylvain Bourdel
2024 — conf
Zero-Overhead Nonintrusive Test of mmW Integrated Circuits Based on Wafer-Level Parametric Tests.
NewCAS
Olivier Occello, Marc Margalef-Rovira, Manuel J. Barragan Asian, C. Durand, A. Rhellab, Loic Vincent, Jordan Corsi, Sylvie Lépilliet, G. Ducournau, P. Ferrari
2017 B conf
Design of a sinusoidal signal generator with calibrated harmonic cancellation for mixed-signal BIST in a 28 nm FDSOI technology.
ETS
Hani Malloug, Manuel J. Barragan Asian, Salvador Mir, Laurent Basteres, Hervé Le Gall
2015 J jnl
A Procedure for Alternate Test Feature Design and Selection.
IEEE Des. Test
Manuel J. Barragan Asian, Gildas Léger
2013 B conf
Efficient selection of signatures for analog/RF alternate test.
ETS
Manuel J. Barragan Asian, Gildas Léger
2012 J jnl
Digital Adaptive Calibration of Multi-Step Analog to Digital Converters.
J. Low Power Electron.
Amir Zjajo, Manuel J. Barragan Asian, José Pineda de Gyvez
2012 J jnl
Low-Power Die-Level Process Variation and Temperature Monitors for Yield Analysis and Optimization in Deep-Submicron CMOS.
IEEE Trans. Instrum. Meas.
Amir Zjajo, Manuel J. Barragan Asian, José Pineda de Gyvez
2012 — conf
Multi-condition alternate test of analog, mixed-signal, and RF systems.
LATW
Manuel J. Barragan Asian, Gildas Léger, José Luis Huertas
2012 B conf
OBT for settling error test of sampled-data systems using signal-dependent clocking.
ETS
Manuel J. Barragan Asian, Gildas Léger, José L. Huertas
2011 J jnl
Alternate Test of LNAs Through Ensemble Learning of On-Chip Digital Envelope Signatures.
J. Electron. Test.
Manuel J. Barragan Asian, Rafaella Fiorelli, Gildas Léger, Adoración Rueda, José L. Huertas
2011 J jnl
Analog Sinewave Signal Generators for Mixed-Signal Built-in Test Applications.
J. Electron. Test.
Manuel J. Barragan Asian, Diego Vázquez, Adoración Rueda
2011 — conf
Improving the Accuracy of RF Alternate Test Using Multi-VDD Conditions: Application to Envelope-Based Test of LNAs.
Asian Test Symposium
Manuel J. Barragan Asian, Rafaella Fiorelli, Gildas Léger, Adoración Rueda, José L. Huertas
2010 — conf
(Some) Open Problems to Incorporate BIST in Complex Heterogeneous Integrated Systems.
DELTA
Manuel J. Barragan Asian, Gloria Huertas, Adoración Rueda, José Luis Huertas
2010 J jnl
A BIST Solution for Frequency Domain Characterization of Analog Circuits.
J. Electron. Test.
Manuel J. Barragan Asian, Diego Vázquez, Adoración Rueda
2010 B conf
Low-cost signature test of RF blocks based on envelope response analysis.
ETS
Manuel J. Barragan Asian, Rafaella Fiorelli, Diego Vázquez, Adoración Rueda, José Luis Huertas
2010 C conf
On-chip biased voltage-controlled oscillator with temperature compensation of the oscillation amplitude for robust I/Q generation.
ISCAS
Antonio J. Ginés, Ricardo Doldán, Manuel J. Barragan Asian, Adoración Rueda, Eduardo J. Peralías
2009 — conf
A BIST Solution for the Functional Characterization of RF Systems Based on Envelope Response Analysis.
Asian Test Symposium
Manuel J. Barragan Asian, Rafaella Fiorelli, Diego Vázquez, Adoración Rueda, José Luis Huertas
2008 A conf
Practical Implementation of a Network Analyzer for Analog BIST Applications.
DATE
Manuel J. Barragan Asian, Diego Vázquez, Adoración Rueda
2007 A conf
Interactive presentation: BIST method for die-level process parameter variation monitoring in analog/mixed-signal integrated circuits.
DATE
Amir Zjajo, Manuel J. Barragan Asian, José Pineda de Gyvez
2006 C conf
A Sinewave Analyzer for Mixed-Signal BIST Applications in a 0.35µm Technology.
DDECS
Manuel J. Barragan Asian, Diego Vázquez, Adoración Rueda
2005 J jnl
Sine-Wave Signal Characterization Using Square-Wave and SigmaDelta-Modulation: Application to Mixed-Signal BIST.
J. Electron. Test.
Diego Vázquez, Gloria Huertas, África Luque, Manuel J. Barragan Asian, Gildas Léger, Adoración Rueda, José Luis Huertas