Manqing Mao

12 papers C 1Journal 7Unranked 4
YearRankTypeTitle / Venue / Authors
2024 J jnl
Multi-User Chat Assistant (MUCA): a Framework Using LLMs to Facilitate Group Conversations.
CoRR
Manqing Mao, Paishun Ting, Yijian Xiang, Mingyang Xu, Julia Chen, Jianzhe Lin
2019 J jnl
A Deep Q-Learning Approach for Dynamic Management of Heterogeneous Processors.
IEEE Comput. Archit. Lett.
Ujjwal Gupta, Sumit K. Mandal, Manqing Mao, Chaitali Chakrabarti, Ümit Y. Ogras
2019 — conf
Improving Reliability of ReRAM-Based DNN Implementation through Novel Weight Distribution.
SiPS
Jingtao Li, Manqing Mao, Chaitali Chakrabarti
2019 J jnl
MAX
IEEE J. Emerg. Sel. Topics Circuits Syst.
Manqing Mao, Xiaochen Peng, Rui Liu, Jingtao Li, Shimeng Yu, Chaitali Chakrabarti
2018 — conf
A Versatile ReRAM-based Accelerator for Convolutional Neural Networks.
SiPS
Manqing Mao, Xiaoyu Sun, Xiaochen Peng, Shimeng Yu, Chaitali Chakrabarti
2018 J jnl
Design and Analysis of Energy-Efficient and Reliable 3-D ReRAM Cross-Point Array System.
IEEE Trans. Very Large Scale Integr. Syst.
Manqing Mao, Shimeng Yu, Chaitali Chakrabarti
2017 J jnl
A Multilayer Approach to Designing Energy-Efficient and Reliable ReRAM Cross-Point Array System.
IEEE Trans. Very Large Scale Integr. Syst.
Manqing Mao, Pai-Yu Chen, Shimeng Yu, Chaitali Chakrabarti
2017 J jnl
Cost-Effective Design Solutions for Enhancing PRAM Reliability and Performance.
IEEE Trans. Multi Scale Comput. Syst.
Chengen Yang, Manqing Mao, Yu Cao, Chaitali Chakrabarti
2016 J jnl
Optimizing Latency, Energy, and Reliability of 1T1R ReRAM Through Cross-Layer Techniques.
IEEE J. Emerg. Sel. Topics Circuits Syst.
Manqing Mao, Yu Cao, Shimeng Yu, Chaitali Chakrabarti
2015 C conf
Optimizing latency, energy, and reliability of 1T1R ReRAM through appropriate voltage settings.
ICCD
Manqing Mao, Yu Cao, Shimeng Yu, Chaitali Chakrabarti
2015 — conf
Programming strategies to improve energy efficiency and reliability of ReRAM memory systems.
SiPS
Manqing Mao, Yu Cao, Shimeng Yu, Chaitali Chakrabarti
2014 — conf
Low cost ECC schemes for improving the reliability of DRAM+PRAMMAIN memory systems.
SiPS
Manqing Mao, Chengen Yang, Zihan Xu, Yu Cao, Chaitali Chakrabarti