Manoj Kumar

24 papers Journal 18Unranked 6
YearRankTypeTitle / Venue / Authors
2025 J jnl
CMOS Based Active Inductors: A Review.
Circuits Syst. Signal Process.
Isha Kadyan, Manoj Kumar, Amit Prakash Singh
2025 J jnl
Design of CMOS VCO with XNOR and transmission gate based delay stages.
Integr.
Manoj Kumar, Priyanshu Lakra
2025 J jnl
Ring VCO using Active Resistors and Active Inductors for K band Applications.
Circuits Syst. Signal Process.
Isha Kadyan, Manoj Kumar, Amit Prakash Singh
2024 — conf
Design of Low Power CMOS based Array Multiplier in 90nm Technology.
ICCCNT
Tejaswi Chetamoni, Mothe Rishi, Manoj Kumar
2024 J jnl
Design of a low power LNA circuit with noise canceling approach in 90 nm CMOS process.
Integr.
Vikram Singh, Manoj Kumar, Nitin Kumar
2023 J jnl
A PVT tolerant low power wide tuning range differential voltage controlled oscillator design in 90 nm CMOS technology.
Integr.
Vivek Jangra, Manoj Kumar
2021 J jnl
A Common-Gate Current-Reuse UWB LNA for Wireless Applications in 90 nm CMOS.
Wirel. Pers. Commun.
Vikram Singh, Sandeep Kumar Arya, Manoj Kumar
2021 — conf
Low Power XNOR based Single Ended VCO Circuit Design with Dynamic Threshold MOS.
IC3
Vivek Jangra, Manoj Kumar
2021 J jnl
Low power CMOS differential ring VCO designs using dual delay stages in 0.13 ​μm technology for wireless applications.
Microelectron. J.
Nitin Kumar, Manoj Kumar
2020 J jnl
Low power active load and IMOS varactor based VCO designs using differential delay stages in 0.18 ​μm technology.
Microelectron. J.
Vivek Jangra, Manoj Kumar
2020 J jnl
Thermophoresis and suction/injection roles on free convective MHD flow of Ag-kerosene oil nanofluid.
J. Comput. Des. Eng.
Himanshu Upreti, Alok Kumar Pandey, Manoj Kumar
2019 J jnl
A 3-14 GHz, Self-Body Biased Common-Gate UWB LNA for Wireless Applications in 90 nm CMOS.
J. Circuits Syst. Comput.
Vikram Singh, Sandeep Arya, Manoj Kumar
2019 J jnl
Low Power, Ring VCO with Pre-Charge and Pre-Discharge Circuit for 4 GHz-6.1 GHz Applications in 0.18 μm CMOS.
J. Circuits Syst. Comput.
Nitin Kumar, Manoj Kumar
2018 J jnl
A Low Power CMOS-Based VCO Design with I-MOS Varactor Tuning Control.
J. Circuits Syst. Comput.
Manoj Kumar, Dileep Dwivedi
2018 J jnl
Comparative analysis of adiabatic logic challenges for low power CMOS circuit designs.
Microprocess. Microsystems
Dinesh Kumar, Manoj Kumar
2018 J jnl
Design of Linear Low-Power Voltage-Controlled Oscillator with I-MOS Varactor and Back-Gate Tuning.
Circuits Syst. Signal Process.
Manoj Kumar
2016 — conf
Design of low power two bit magnitude comparator using adiabatic logic.
ISPACS
Dinesh Kumar, Manoj Kumar
2016 — conf
Modified 4-2 compressor using improved multiplexer for low power applications.
ICACCI
Dinesh Kumar, Manoj Kumar
2012 — conf
Design of 9-transistor single bit full adder.
CCSEIT
Manoj Kumar
2012 J jnl
Single bit full adder design using 8 transistors with novel 3 transistors XNOR gate
CoRR
Manoj Kumar, Sandeep Kumar Arya, Sujata Pandey
2011 — conf
Design of CMOS Energy Efficient Single Bit Full Adders.
HPAGC
Manoj Kumar, Sujata Pandey, Sandeep Arya
2011 J jnl
Voltage Controlled Ring Oscillator Design with Novel 3 Transistors XNOR/XOR Gates.
Circuits Syst.
Manoj Kumar, Sandeep Kumar Arya, Sujata Pandey
2010 J jnl
Level Shifter Design for Low Power Applications
CoRR
Manoj Kumar, Sandeep Kumar Arya, Sujata Pandey
2010 J jnl
Sequential combination of statistics, econometrics and Adaptive Neural-Fuzzy Interface for stock market prediction.
Expert Syst. Appl.
Tanvir Ansari, Manoj Kumar, Anupam Shukla, Joydip Dhar, Ritu Tiwari