Manish Vachharajani

33 papers A* 4A 7B 3C 1Misc 4Journal 11Unranked 3

Year	Rank	Type	Title / Venue / Authors
2012	J	`jnl`	Reliability Modeling and Management of Nanophotonic On-Chip Networks. IEEE Trans. Very Large Scale Integr. Syst. Zheng Li, Moustafa Mohamed, Xi Chen, Eric Dudley, Ke Meng, Li Shang, Alan Rolf Mickelson, Russ Joseph, Manish Vachharajani, Brian Schwartz, Yihe Sun
2011	J	`jnl`	Automatic Generation of Multicore Chemical Kernels. IEEE Trans. Parallel Distributed Syst. John C. Linford, John Michalakes, Manish Vachharajani, Adrian Sandu
2011	J	`jnl`	Iris: A hybrid nanophotonic network design for high-performance and low-power on-chip communication. ACM J. Emerg. Technol. Comput. Syst. Zheng Li, Moustafa Mohamed, Xi Chen, Hongyu Zhou, Alan Rolf Mickelson, Li Shang, Manish Vachharajani
2010	A	`conf`	An efficient software transactional memory using commit-time invalidation. CGO Justin Emile Gottschlich, Manish Vachharajani, Jeremy G. Siek
2010	J	`jnl`	Global On-Chip Coordination at Light Speed. IEEE Des. Test Comput. Zheng Li, Moustafa Mohamed, Hongyu Zhou, Li Shang, Alan Rolf Mickelson, Dejan Filipovic, Manish Vachharajani, Wounjhang Park, Yihe Sun
2010	A	`conf`	Large program trace analysis and compression with ZDDs. CGO Graham D. Price, Manish Vachharajani
2010	A	`conf`	Power-efficient variation-aware photonic on-chip network management. ISLPED Moustafa Mohamed, Zheng Li, Xi Chen, Li Shang, Alan Rolf Mickelson, Manish Vachharajani, Yihe Sun
2009	A	`conf`	A high-performance low-power nanophotonic on-chip network. ISLPED Zheng Li, Jie Wu, Li Shang, Alan Rolf Mickelson, Manish Vachharajani, Dejan Filipovic, Wounjhang Park, Yihe Sun
2009	—	`conf`	An efficient lock-aware transactional memory implementation. ICOOOLPS@ECOOP Justin Emile Gottschlich, Jeremy G. Siek, Manish Vachharajani, Dwight Y. Winkler, Daniel A. Connors
2009	A	`conf`	Multi-core acceleration of chemical kinetics for simulation and prediction. SC John C. Linford, John Michalakes, Manish Vachharajani, Adrian Sandu
2009	A*	`conf`	Spectrum: a hybrid nanophotonic-electric on-chip network. DAC Zheng Li, Dan Fay, Alan Rolf Mickelson, Li Shang, Manish Vachharajani, Dejan Filipovic, Wounjhang Park, Yihe Sun
2008	B	`conf`	FastForward for efficient pipeline parallelism: a cache-optimized concurrent lock-free queue. PPoPP John Giacomoni, Tipp Moseley, Manish Vachharajani
2008	A	`conf`	GPU acceleration of numerical weather prediction. IPDPS John Michalakes, Manish Vachharajani
2008	J	`jnl`	Gpu Acceleration of Numerical Weather Prediction. Parallel Process. Lett. John Michalakes, Manish Vachharajani
2008	C	`conf`	Gradual typing with unification-based inference. DLS Jeremy G. Siek, Manish Vachharajani
2008	B	`conf`	Visualizing potential parallelism in sequential programs. PACT Graham D. Price, John Giacomoni, Manish Vachharajani
2007	B	`conf`	FastForward for Efficient Pipeline Parallelism. PACT John Giacomoni, Tipp Moseley, Manish Vachharajani
2007	—	`conf`	Frame shared memory: line-rate networking on commodity hardware. ANCS John Giacomoni, John K. Bennett, Antonio Carzaniga, Douglas C. Sicker, Manish Vachharajani, Alexander L. Wolf
2006	J	`jnl`	A Case for Compressing Traces with BDDs. IEEE Comput. Archit. Lett. Graham D. Price, Manish Vachharajani
2006	J	`jnl`	The Liberty Simulation Environment: A deliberate approach to high-level system modeling. ACM Trans. Comput. Syst. Manish Vachharajani, Neil Vachharajani, David A. Penry, Jason A. Blome, Sharad Malik, David I. August
2005	J	`jnl`	Achieving Structural and Composable Modeling of Complex Systems. Int. J. Parallel Program. David I. August, Sharad Malik, Li-Shiuan Peh, Vijay S. Pai, Manish Vachharajani, Paul Willmann
2005	J	`jnl`	Chip multi-processor scalability for single-threaded applications. SIGARCH Comput. Archit. News Neil Vachharajani, Matthew Iyer, Chinmay Ashok, Manish Vachharajani, David I. August, Daniel A. Connors
2005	J	`jnl`	Compiler Optimization-Space Exploration. J. Instr. Level Parallelism Spyridon Triantafyllis, Manish Vachharajani, David I. August
2004	—	`conf`	Decoupled Software Pipelining with the Synchronization Array. IEEE PACT Ram Rangan, Neil Vachharajani, Manish Vachharajani, David I. August
2004	Misc	`conf`	Facilitating reuse in hardware models with enhanced type inference. CODES+ISSS Manish Vachharajani, Neil Vachharajani, Sharad Malik, David I. August
2004	A*	`conf`	RIFLE: An Architectural Framework for User-Centric Information-Flow Security. MICRO Neil Vachharajani, Matthew J. Bridges, Jonathan Chang, Ram Rangan, Guilherme Ottoni, Jason A. Blome, George A. Reis, Manish Vachharajani, David I. August
2004	J	`jnl`	The Liberty Simulation Environment, version 1.0. SIGMETRICS Perform. Evaluation Rev. Manish Vachharajani, Neil Vachharajani, David A. Penry, Jason A. Blome, David I. August
2004	A*	`conf`	The liberty structural specification language: a high-level modeling language for component reuse. PLDI Manish Vachharajani, Neil Vachharajani, David I. August
2003	A	`conf`	Compiler Optimization-Space Exploration. CGO Spyridon Triantafyllis, Manish Vachharajani, Neil Vachharajani, David I. August
2003	Misc	`conf`	The liberty simulation environment as a pedagogical tool. WCAE Jason A. Blome, Manish Vachharajani, Neil Vachharajani, David I. August
2002	Misc	`conf`	Design Tools for Application Specific Embedded Processors. EMSOFT Wei Qin, Subramanian Rajagopalan, Manish Vachharajani, Hangsheng Wang, Xinping Zhu, David I. August, Kurt Keutzer, Sharad Malik, Li-Shiuan Peh
2002	A*	`conf`	Microarchitectural exploration with Liberty. MICRO Manish Vachharajani, Neil Vachharajani, David A. Penry, Jason A. Blome, David I. August
2000	Misc	`conf`	Handling irregular ILP within conventional VLIW schedulers using artificial resource constraints. CASES Subramanian Rajagopalan, Manish Vachharajani, Sharad Malik