Manfred Schimmler

65 papers A* 1A 2B 6Misc 7Journal 15Unranked 33
YearRankTypeTitle / Venue / Authors
2017 — conf
GPGPU-based identification of cointegrated portfolios.
SSCI
Vasco Grossmann, Manfred Schimmler
2016 — conf
Combining GPU and FPGA technology for efficient exhaustive interaction analysis in GWAS.
ASAP
Jan Christian Kässens, Lars Wienbrandt, Manfred Schimmler, Jorge González-Domínguez, Bertil Schmidt
2016 — conf
Portfolio-based contract selection in commodity futures markets.
SSCI
Vasco Grossmann, Manfred Schimmler
2015 J jnl
High-speed exhaustive 3-locus interaction epistasis analysis on FPGAs.
J. Comput. Sci.
Jan Christian Kässens, Lars Wienbrandt, Jorge González-Domínguez, Bertil Schmidt, Manfred Schimmler
2015 J jnl
Parallelizing Epistasis Detection in GWAS on FPGA and GPU-Accelerated Computing Systems.
IEEE ACM Trans. Comput. Biol. Bioinform.
Jorge González-Domínguez, Lars Wienbrandt, Jan Christian Kässens, David Ellinghaus, Manfred Schimmler, Bertil Schmidt
2014 B conf
An efficient implementation of PBKDF2 with RIPEMD-160 on multiple FPGAs.
ICPADS
Ayman Abbas, Rian Voss, Lars Wienbrandt, Manfred Schimmler
2014 Misc conf
FPGA-based Acceleration of Detecting Statistical Epistasis in GWAS.
ICCS
Lars Wienbrandt, Jan Christian Kässens, Jorge González-Domínguez, Bertil Schmidt, David Ellinghaus, Manfred Schimmler
2014 — conf
Quality and consistency assurance of quote data for algorithmic trading strategies.
CIFEr
Sven Koschnicke, Vasco Grossmann, Christoph Starke, Manfred Schimmler
2012 Misc conf
An FPGA Implementation of an Investment Strategy Processor.
ICCS
Christoph Starke, Vasco Grossmann, Lars Wienbrandt, Manfred Schimmler
2012 B conf
Dictionary Attack on TrueCrypt with RIVYERA S3-5000.
ICPADS
Ayman Abbas, Claas Anders Rathje, Lars Wienbrandt, Manfred Schimmler
2012 — conf
Improvement of BLASTp on the FPGA-Based High-Performance Computer RIVYERA.
ISBRA
Lars Wienbrandt, Daniel Siebert, Manfred Schimmler
2012 J jnl
Master/Slave assignment optimization for high performance computing in an EC2 cloud using MPI.
Netw. Protoc. Algorithms
Florian Schatz, Sven Koschnicke, Niklas Paulsen, Manfred Schimmler
2012 J jnl
Optimizing Investment Strategies with the Reconfigurable Hardware Platform RIVYERA.
Int. J. Reconfigurable Comput.
Christoph Starke, Vasco Grossmann, Lars Wienbrandt, Sven Koschnicke, John Carstens, Manfred Schimmler
2011 — conf
MPI Performance Analysis of Amazon EC2 Cloud Services for High Performance Computing.
ACC (1)
Florian Schatz, Sven Koschnicke, Niklas Paulsen, Christoph Starke, Manfred Schimmler
2011 Misc conf
Massively parallel FPGA-based implementation of BLASTp with the two-hit method.
ICCS
Lars Wienbrandt, Stefan Baumgart, Jost Bissel, Florian Schatz, Manfred Schimmler
2010 — conf
Collecting Statistical Information in DNA Sequences for the Detection of Special Motifs.
BIOCOMP
Lars Wienbrandt, Manfred Schimmler
2010 Misc conf
Using the reconfigurable massively parallel architecture COPACOBANA 5000 for applications in bioinformatics.
ICCS
Lars Wienbrandt, Stefan Baumgart, Jost Bissel, Carol May Yen Yeo, Manfred Schimmler
2009 — conf
A Massively Parallel Architecture for Bioinformatics.
ICCS (1)
Gerd Pfeiffer, Stefan Baumgart, Jan Schröder, Manfred Schimmler
2008 — conf
A Specification Methodology for the Optimal Layout of a 2-Stage Interconnect Bus for Massively Parallel Architectures.
CDES
Gerd Pfeiffer, Manfred Schimmler
2008 — conf
BMA - Boolean Matrices as Model for Motif Kernels.
BCBGC
Jan Schröder, Manfred Schimmler, Heiko Schröder, Karsten Tischer
2008 B conf
Enhancing COPACOBANA for advanced applications in cryptography and cryptanalysis.
FPL
Tim Güneysu, Christof Paar, Gerd Pfeiffer, Manfred Schimmler
2008 — conf
Massively Parallelized DNA Motif Search on the Reconfigurable Hardware Platform COPACOBANA.
PRIB
Jan Schröder, Lars Wienbrandt, Gerd Pfeiffer, Manfred Schimmler
2007 — conf
Parallel Computing with Low-Cost FPGAs: A Framework for COPACOBANA.
PARCO
Tim Güneysu, Christof Paar, Jan Pelzl, Gerd Pfeiffer, Manfred Schimmler, Christian Schleiffer
2006 — conf
A Configuration Concept for a Massively Parallel FPGA Architecture.
CDES
Sandeep S. Kumar, Christof Paar, Jan Pelzl, Gerd Pfeiffer, Manfred Schimmler
2006 A conf
Breaking Ciphers with COPACOBANA - A Cost-Optimized Parallel Code Breaker.
CHES
Sandeep S. Kumar, Christof Paar, Jan Pelzl, Gerd Pfeiffer, Manfred Schimmler
2006 Misc conf
COPACOBANA A Cost-Optimized Special-Purpose Hardware for Code-Breaking.
FCCM
Sandeep S. Kumar, Christof Paar, Jan Pelzl, Gerd Pfeiffer, Manfred Schimmler
2006 Misc conf
PLUG: An Agent Based Prototype Validation of CAD-Constructions.
IKE
Stefan Baumgart, Begona Toledo, Karin Spors, Manfred Schimmler
2005 — conf
Completely Redundant Modular Exponentiation by Operand Changing.
CDES
Viktor Bunimov, Manfred Schimmler
2005 B conf
Efficient Hardware Architectures for Modular Multiplication on FPGAs.
FPL
David Narh Amanor, Viktor Bunimov, Christof Paar, Jan Pelzl, Manfred Schimmler
2005 — conf
Hardware Enhanced Biosequence Alignment.
METMBS
Gerd Pfeiffer, Heinz Kreft, Manfred Schimmler
2004 J jnl
A bit-serial floating-point unit for a massively parallel system on a chip.
Parallel Algorithms Appl.
Manfred Schimmler, Bertil Schmidt, Hans-Werner Lang
2004 — conf
Fast Modular Multiplication by Operand Changing.
ITCC (2)
Manfred Schimmler, Viktor Bunimov
2004 — conf
High Radix Modular Multiplication of Large Integers Optimised with Respect to Area and Time.
ESA/VLSI
Viktor Bunimov, Manfred Schimmler
2003 — conf
A Simple Circuit to Reduce the Search Range for Large Prime Numbers.
VLSI
Manfred Schimmler, Viktor Bunimov
2003 — conf
An Area-Efficient Bit-Serial Integer Multiplier.
VLSI
Manfred Schimmler, Bertil Schmidt, Hans-Werner Lang, Sven Heithecker
2003 — conf
Area and Time Efficient Modular Multiplication of Large Integers.
ASAP
Viktor Bunimov, Manfred Schimmler
2003 Misc conf
Design of a Bit-Serial Floating Point Unit for a Fine Grained Parallel Processor Array.
PDPTA
Manfred Schimmler, Bertil Schmidt, Hans-Werner Lang
2003 — conf
Efficient Parallel Multiplication Algorithm for Large Integres.
Euro-Par
Viktor Bunimov, Manfred Schimmler
2003 — conf
Key Generation for Secure High Speed Communication.
Security and Management
Viktor Bunimov, Manfred Schimmler, Wolfgang Bziuk
2002 J jnl
A hybrid architecture for bioinformatics.
Future Gener. Comput. Syst.
Bertil Schmidt, Heiko Schröder, Manfred Schimmler
2002 A conf
Massively Parallel Solutions for Molecular Sequence Analysis.
IPDPS
Bertil Schmidt, Heiko Schröder, Manfred Schimmler
2001 B conf
Protein Sequence Comparison on the Instruction Systolic Array.
PaCT
Bertil Schmidt, Heiko Schröder, Manfred Schimmler
2001 — conf
Scanning Biosequence Databases on a Hybrid Parallel Architecture.
Euro-Par
Bertil Schmidt, Heiko Schröder, Manfred Schimmler
2001 J jnl
Tomographic Image Reconstruction on the Instruction Systolic Array.
Comput. Artif. Intell.
Bertil Schmidt, Heiko Schröder, Manfred Schimmler
2000 — conf
Architectures and Algorithms for Multimedia Applications.
Euro-Par
Manfred Schimmler
2000 J jnl
KPROC - An Instruction Systolic Architecture for Parallel Prefix Applications.
Parallel Distributed Comput. Pract.
Bertil Schmidt, Manfred Schimmler
1999 J jnl
A Morphological Approach to Hough Transform on an Instruction Systolic Array.
Comput. Artif. Intell.
Bertil Schmidt, Manfred Schimmler, Heiko Schröder
1999 — conf
A Parallel Accelerator Architecture for Multimedia Video Compression.
Euro-Par
Bertil Schmidt, Manfred Schimmler
1998 — conf
Long Operand Arithmetic on Instruction Systolic Computer Architectures and Its Application in RSA Cryptography.
Euro-Par
Bertil Schmidt, Manfred Schimmler, Heiko Schröder
1997 — conf
Morphological Hough Transform on the Instruction Systolic Array.
Euro-Par
Bertil Schmidt, Manfred Schimmler, Heiko Schröder
1994 — conf
The Instruction Systolic Array - Implementation of a Low-Cost Parallel Architecture as Add-On Board for Personal Computers.
HPCN
Manfred Schimmler, Hans-Werner Lang, Rüdiger Maaß
1991 — conf
A Fault Tolerant and High Speed Instruction Systolic Array.
VLSI
Manfred Schimmler, Hartmut Schmeck
1991 — conf
A Reconfigurable Instruction Systolic Array.
Fault-Tolerant Computing Systems
Michael Phieler, Manfred Schimmler, Hartmut Schmeck
1991 — —
Graphenalgorithmen auf gitterverbundenen Prozessorfeldern.
Manfred Schimmler
1991 — conf
Parallel strong orientation on a mesh connected computer.
ASAP
Manfred Schimmler
1991 J jnl
Parallel strong orientation on a mesh connected computer.
Parallel Comput.
Manfred Schimmler
1990 J jnl
Systolic algorithm for tensor products of matrices: implementation and applications.
Parallel Comput.
E. V. Krishnamurthy, Manfred Kunde, Manfred Schimmler, Heiko Schröder
1989 J jnl
A Correction Network for N-Sorters.
SIAM J. Comput.
Manfred Schimmler, Christoph Starke
1989 J jnl
A simple systolic method to find all bridges of an undirected graph.
Parallel Comput.
Manfred Schimmler, Heiko Schröder
1988 — conf
A Correction Network for N-Sorters.
AWOC
Manfred Schimmler, Christoph Starke
1988 B conf
A Simple Systolic Method to Find all Bridges of an Undirected Graph.
WG
Manfred Schimmler, Heiko Schröder
1988 J jnl
The instruction systolic array and its relation to other models of parallel computers.
Parallel Comput.
Manfred Kunde, Hans-Werner Lang, Manfred Schimmler, Hartmut Schmeck, Heiko Schröder
1985 — conf
A Method for Realistic Comparisons of Sorting Algorithms for VLSI.
FODO
Hans-Werner Lang, Manfred Schimmler, Hartmut Schmeck, Heiko Schröder
1985 J jnl
Systolic Sorting on a Mesh-Connected Network.
IEEE Trans. Computers
Hans-Werner Lang, Manfred Schimmler, Hartmut Schmeck, Heiko Schröder
1983 A* conf
A Fast Sorting Algorithm for VLSI.
ICALP
Hans-Werner Lang, Manfred Schimmler, Hartmut Schmeck, Heiko Schröder