Mamoru Nakanishi

27 papers B 1C 1Misc 2Journal 14Unranked 9

Year	Rank	Type	Title / Venue / Authors
2015	J	`jnl`	Software-Hardware-Cooperative Protocol Processor for Extendable 10G-EPON MAC Chip. IEICE Trans. Electron. Naoki Miura, Akihiko Miyazaki, Junichi Kato, Nobuyuki Tanaka, Satoshi Shigematsu, Masami Urano, Mamoru Nakanishi, Tsugumichi Shibata
2014	J	`jnl`	An FPGA Implementation of the Two-Dimensional FDTD Method and Its Performance Comparison with GPGPU. IEICE Trans. Electron. Ryota Takasu, Yoichi Tomioka, Yutaro Ishigaki, Ning Li, Tsugumichi Shibata, Mamoru Nakanishi, Hitoshi Kitazawa
2014	—	`conf`	Cellular automaton based pixel-level snakes. NEWCAS Tomohiro Fujita, Syo Sawada, Kaihei Iwanaga, Takeshi Kumaki, Mamoru Nakanishi, Takeshi Ogura
2013	—	`conf`	Evaluation of advanced pixel-level snakes on cellular hardware platform. NEWCAS Matsui Takao, Tomohiro Fujita, Tsuji Yuji, Takeshi Kumaki, Mamoru Nakanishi, Takeshi Ogura
2012	C	`conf`	Extendable point-to-multi-point protocol processor for 10G-EPON MAC SoCs. ISCAS Naoki Miura, Akihiko Miyazaki, Junichi Kato, Nobuyuki Tanaka, Masami Urano, Mamoru Nakanishi, Tsugumichi Shibata
2011	—	`conf`	10G/1G dual-rate EPON OLT LSI with dual encryption modes alternated using DBA-information-based algorithm control. ISOCC Sadayuki Yasuda, Takahiro Hatano, Hiroki Suto, Masami Urano, Mamoru Nakanishi, Tsugumichi Shibata
2011	—	`conf`	A 22-Gb/s and over-33-mega-frame/s throughput bridge-function unit in a low-latency OLT LSI for the coexistence of 10G-EPON and GE-PON. A-SSCC Shoko Ohteru, Tomoaki Kawamura, Hiroki Suto, Masami Urano, Mamoru Nakanishi, Tsugumichi Shibata
2010	J	`jnl`	Capacitive-Sensing Circuit Technique for Image Quality Improvement on Fingerprint Sensor LSIs. IEEE J. Solid State Circuits Toshishige Shimamura, Hiroki Morimura, Satoshi Shigematsu, Mamoru Nakanishi, Katsuyuki Machida
2008	—	`conf`	A Fingerprint Sensor with Impedance Sensing for Fraud Detection. ISSCC Toshishige Shimamura, Hiroki Morimura, Nobuhiro Shimoyama, Tomomi Sakata, Satoshi Shigematsu, Katsuyuki Machida, Mamoru Nakanishi
2007	J	`jnl`	Logic and Analog Test Schemes for a Single-Chip Pixel-Parallel Fingerprint Identification LSI. IEICE Trans. Electron. Satoshi Shigematsu, Hiroki Morimura, Toshishige Shimamura, Takahiro Hatano, Namiko Ikeda, Yukio Okazaki, Katsuyuki Machida, Mamoru Nakanishi
2006	J	`jnl`	Fingerprint Image Enhancement and Rotation Schemes for a Single-Chip Fingerprint Sensor and Identifier. IEICE Trans. Electron. Satoshi Shigematsu, Koji Fujii, Hiroki Morimura, Takahiro Hatano, Mamoru Nakanishi, Namiko Ikeda, Toshishige Shimamura, Katsuyuki Machida, Yukio Okazaki, Hakaru Kyuragi
2005	J	`jnl`	A New Real Time Object Segmentation and Tracking Algorithm and its Parallel Hardware Architecture. J. VLSI Signal Process. Mahmoud Méribout, Mamoru Nakanishi
2004	J	`jnl`	A robust hardware algorithm for real-time object tracking in video sequences. Real Time Imaging Mahmoud Méribout, Lazhar Khriji, Mamoru Nakanishi
2002	—	`conf`	A 500-dpi cellular-logic processing array for fingerprint-image enhancement and verification. CICC Koji Fujii, Mamoru Nakanishi, Satoshi Shigematsu, Hiroki Morimura, Takahiro Hatano, Namiko Ikeda, Toshishige Shimamura, Yukio Okazaki, Hakaru Kyuragi
2002	J	`jnl`	A parallel algorithm for real-time object recognition. Pattern Recognit. Mahmoud Méribout, Mamoru Nakanishi, Takeshi Ogura
2002	J	`jnl`	Accurate and Real-time Image Processing on a New PC-compatible Board. Real Time Imaging Mahmoud Méribout, Mamoru Nakanishi, Takeshi Ogura
2002	—	`conf`	Fingerprint Image Enhancement by Pixel-Parallel Processing. ICPR (3) Namiko Ikeda, Mamoru Nakanishi, Koji Fujii, Takahiro Hatano, Satoshi Shigematsu, Takuya Adachi, Yukio Okazaki, Hakaru Kyuragi
2000	J	`jnl`	Hough Transform Algorithm for Three-Dimensional Segment Extraction and its Parallel Hardware Implementation. Comput. Vis. Image Underst. Mahmoud Méribout, Mamoru Nakanishi, Eiichi Hosoya, Takeshi Ogura
2000	J	`jnl`	On using the CAM concept for parametric curve extraction. IEEE Trans. Image Process. Mahmoud Méribout, Takeshi Ogura, Mamoru Nakanishi
2000	J	`jnl`	Real-time CAM-based Hough transform algorithm and its performance evaluation. Mach. Vis. Appl. Mamoru Nakanishi, Takeshi Ogura
1999	J	`jnl`	A Real-Time Image Segmentation on a Massively Parallel Architecture. Real Time Imaging Mahmoud Méribout, Mamoru Nakanishi, Takeshi Ogura
1998	—	`conf`	Real-time 3D Reconstruction System using CAM-based Highly Parallel Processing Board. Three-Dimensional Image Capture and Applications Eiichi Hosoya, Mamoru Nakanishi, Takeshi Ogura
1997	—	`conf`	Real-Time Line Extraction Using a Highly Parallel Hough Tranform Board. ICIP (2) Mamoru Nakanishi, Takeshi Ogura
1996	B	`conf`	A real-time CAM-based Hough transform algorithm and its performance evaluation. ICPR Mamoru Nakanishi, Takeshi Ogura
1996	Misc	`conf`	Real-time 3D Feature Extraction Hardware Algorithm with Feature Point Matching Capability. MVA Eiichi Hosoya, Takeshi Ogura, Mamoru Nakanishi
1996	Misc	`conf`	Real-time Hough Transform Based Circular Shape Extraction. MVA Mahmoud Méribout, Takeshi Ogura, Mamoru Nakanishi
1995	J	`jnl`	Improved reslicing by voxel-project-method. Syst. Comput. Jpn. Mamoru Nakanishi