Malay K. Ganai

65 papers A* 15A 9B 10C 3Misc 3Journal 8Unranked 14

Year	Rank	Type	Title / Venue / Authors
2014	—	`conf`	Environment-Sensitive Performance Tuning for Distributed Service Orchestration. VECPAR Yu Lin, Franjo Ivancic, Pallavi Joshi, Gogul Balakrishnan, Malay K. Ganai, Aarti Gupta
2014	—	`ed.`	Proceedings of the Second International Workshop on Design and Implementation of Formal Tools and Systems, Portland, OR, USA, October 19, 2013. DIFTS@FMCAD Malay K. Ganai, Alper Sen
2014	—	`conf`	ReproLite: A Lightweight Tool to Quickly Reproduce Hard System Bugs. SoCC Kaituo Li, Pallavi Joshi, Aarti Gupta, Malay K. Ganai
2013	A*	`conf`	Efficient data race prediction with incremental reasoning on time-stamped lock history. ASE Malay K. Ganai
2013	—	`conf`	SETSUDŌ: perturbation-based testing framework for scalable distributed systems. TRIOS@SOSP Pallavi Joshi, Malay K. Ganai, Gogul Balakrishnan, Aarti Gupta, Nadia Papakonstantinou
2012	—	`conf`	DTAM: dynamic taint analysis of multi-threaded programs for relevancy. SIGSOFT FSE Malay K. Ganai, Dongyoon Lee, Aarti Gupta
2012	B	`conf`	Dynamic Livelock Analysis of Multi-threaded Programs. RV Malay K. Ganai
2012	—	`ed.`	Proceedings of the First International Workshop on Design and Implementation of Formal Tools and Systems, Austin, USA, November 3, 2011 DIFTS@FMCAD Malay K. Ganai, Armin Biere
2011	A*	`conf`	BEST: A symbolic testing tool for predicting multi-threaded program failures. ASE Malay K. Ganai, Nipun Arora, Chao Wang, Aarti Gupta, Gogul Balakrishnan
2011	B	`conf`	Predicting Concurrency Failures in the Generalized Execution Traces of x86 Executables. RV Chao Wang, Malay K. Ganai
2011	A*	`conf`	Scalable and precise symbolic analysis for atomicity violations. ASE Malay K. Ganai
2011	J	`jnl`	Symbolic predictive analysis for concurrent programs. Formal Aspects Comput. Chao Wang, Sudipta Kundu, Rhishikesh Limaye, Malay K. Ganai, Aarti Gupta
2010	A*	`conf`	Contessa: Concurrency Testing Augmented with Symbolic Analysis. CAV Sudipta Kundu, Malay K. Ganai, Chao Wang
2010	A	`conf`	Efficient state space exploration: Interleaving stateless and state-based model checking. ICCAD Malay K. Ganai, Chao Wang, Weihong Li
2010	B	`conf`	Integrating ICP and LRA solvers for deciding nonlinear real arithmetic problems. FMCAD Sicun Gao, Malay K. Ganai, Franjo Ivancic, Aarti Gupta, Sriram Sankaranarayanan, Edmund M. Clarke
2010	B	`conf`	Interval Analysis for Concurrent Trace Programs Using Transaction Sequence Graphs. RV Malay K. Ganai, Chao Wang
2010	C	`conf`	Numerical stability analysis of floating-point computations using software model checking. MEMOCODE Franjo Ivancic, Malay K. Ganai, Sriram Sankaranarayanan, Aarti Gupta
2010	B	`conf`	Propelling SAT and SAT-based BMC using careset. FMCAD Malay K. Ganai
2010	B	`conf`	Scalable and precise program analysis at NEC. FMCAD Gogul Balakrishnan, Malay K. Ganai, Aarti Gupta, Franjo Ivancic, Vineet Kahlon, Weihong Li, Naoto Maeda, Nadia Papakonstantinou, Sriram Sankaranarayanan, Nishant Sinha, Chao Wang
2010	A	`conf`	Trace-Based Symbolic Analysis for Atomicity Violations. TACAS Chao Wang, Rhishikesh Limaye, Malay K. Ganai, Aarti Gupta
2009	C	`conf`	Bang for the buck: Improvising and scheduling verification engines for effective resource utilization. MEMOCODE Malay K. Ganai, Weihong Li
2009	B	`conf`	Efficient decision procedure for non-linear arithmetic constraints using CORDIC. FMCAD Malay K. Ganai, Franjo Ivancic
2009	—	`conf`	Reduction of Verification Conditions for Concurrent System Using Mutually Atomic Transactions. SPIN Malay K. Ganai, Sudipta Kundu
2009	B	`conf`	Symbolic Predictive Analysis for Concurrent Programs. FM Chao Wang, Sudipta Kundu, Malay K. Ganai, Aarti Gupta
2008	J	`jnl`	Bitwidth Reduction via Symbolic Interval Analysis for Software Model Checking. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Aleksandr Zaks, Zijiang Yang, Ilya Shlyakhter, Franjo Ivancic, Srihari Cadambi, Malay K. Ganai, Aarti Gupta, Pranav Ashar
2008	A	`conf`	Completeness in SMT-based BMC for Software Programs. DATE Malay K. Ganai, Aarti Gupta
2008	—	`conf`	Efficient Decision Procedure for Bounded Integer Non-linear Operations Using SMT(). Haifa Verification Conference Malay K. Ganai
2008	—	`conf`	Efficient Modeling of Concurrent Systems in BMC. SPIN Malay K. Ganai, Aarti Gupta
2008	J	`jnl`	Efficient SAT-based bounded model checking for software verification. Theor. Comput. Sci. Franjo Ivancic, Zijiang Yang, Malay K. Ganai, Aarti Gupta, Pranav Ashar
2008	A	`conf`	Embedded software verification: challenges and solutions. ICCAD Chao Wang, Malay K. Ganai, Shuvendu K. Lahiri, Daniel Kroening
2008	B	`conf`	PED: Proof-Guided Error Diagnosis by Triangulation of Program Error Causes. SEFM Gogul Balakrishnan, Malay K. Ganai
2008	A*	`conf`	Partial order reduction for scalable testing of systemC TLM designs. DAC Sudipta Kundu, Malay K. Ganai, Rajesh Gupta
2008	A*	`conf`	Tunneling and slicing: towards scalable BMC. DAC Malay K. Ganai, Aarti Gupta
2008	—	`conf`	d-TSR: Parallelizing SMT-Based BMC Using Tunnels over a Distributed Framework. Haifa Verification Conference Malay K. Ganai, Weihong Li
2007	—	`conf`	Efficient BMC for Multi-Clock Systems with Clocked Specifications. ASP-DAC Malay K. Ganai, Aarti Gupta
2007	—	`book`	SAT-Based Scalable Formal Verification Solutions Malay K. Ganai, Aarti Gupta
2007	J	`jnl`	SDSAT: Tight Integration of Small Domain Encoding and Lazy Approaches in Solving Difference Logic. J. Satisf. Boolean Model. Comput. Malay K. Ganai, Muralidhar Talupur, Aarti Gupta
2007	Misc	`conf`	Synthesizing "Verification Aware" Models: Why and How? VLSI Design Malay K. Ganai, Akira Mukaiyama, Aarti Gupta, Kazutoshi Wakabayashi
2007	J	`jnl`	Verification of Embedded Memory Systems using Efficient Memory Modeling CoRR Malay K. Ganai, Aarti Gupta, Pranav Ashar
2006	A	`conf`	Accelerating high-level bounded model checking. ICCAD Malay K. Ganai, Aarti Gupta
2006	J	`jnl`	Efficient distributed SAT and SAT-based distributed Bounded Model Checking. Int. J. Softw. Tools Technol. Transf. Malay K. Ganai, Aarti Gupta, Zijiang Yang, Pranav Ashar
2006	A*	`conf`	Predicate learning and selective theory deduction for a difference logic solver. DAC Chao Wang, Aarti Gupta, Malay K. Ganai
2006	—	`conf`	SAT-Based Verification Methods and Applications in Hardware Verification. SFM Aarti Gupta, Malay K. Ganai, Chao Wang
2005	A*	`conf`	Beyond safety: customized SAT-based model checking. DAC Malay K. Ganai, Aarti Gupta, Pranav Ashar
2005	B	`conf`	Deciding Separation Logic Formulae by SAT and Incremental Negative Cycle Elimination. LPAR Chao Wang, Franjo Ivancic, Malay K. Ganai, Aarti Gupta
2005	A*	`conf`	F-Soft: Software Verification Platform. CAV Franjo Ivancic, Zijiang Yang, Malay K. Ganai, Aarti Gupta, Ilya Shlyakhter, Pranav Ashar
2005	Misc	`conf`	Lazy Constraints and SAT Heuristics for Proof-Based Abstraction. VLSI Design Aarti Gupta, Malay K. Ganai, Pranav Ashar
2005	A	`conf`	Localization and Register Sharing for Predicate Abstraction. TACAS Himanshu Jain, Franjo Ivancic, Aarti Gupta, Malay K. Ganai
2005	C	`conf`	Model Checking C Programs Using F-SOFT. ICCD Franjo Ivancic, Ilya Shlyakhter, Aarti Gupta, Malay K. Ganai, Vineet Kahlon, Chao Wang, Zijiang Yang
2005	A	`conf`	Verification of Embedded Memory Systems using Efficient Memory Modeling. DATE Malay K. Ganai, Aarti Gupta, Pranav Ashar
2004	A*	`conf`	Efficient Modeling of Embedded Memories in Bounded Model Checking. CAV Malay K. Ganai, Aarti Gupta, Pranav Ashar
2004	—	`conf`	Efficient SAT-based Bounded Model Checking for Software Verification. ISoLA (Preliminary proceedings) Pranav Ashar, Malay K. Ganai, Aarti Gupta, Franjo Ivancic, Zijiang Yang
2004	A	`conf`	Efficient SAT-based unbounded symbolic model checking using circuit cofactoring. ICCAD Malay K. Ganai, Aarti Gupta, Pranav Ashar
2003	A*	`conf`	Abstraction and BDDs Complement SAT-Based BMC in DiVer. CAV Aarti Gupta, Malay K. Ganai, Chao Wang, Zijiang Yang, Pranav Ashar
2003	—	`conf`	Efficient Distributed SAT and SAT-Based Distributed Bounded Model Checking. CHARME Malay K. Ganai, Aarti Gupta, Zijiang Yang, Pranav Ashar
2003	A	`conf`	Iterative Abstraction using SAT-based BMC with Proof Analysis. ICCAD Aarti Gupta, Malay K. Ganai, Zijiang Yang, Pranav Ashar
2003	A*	`conf`	Learning from BDDs in SAT-based bounded model checking. DAC Aarti Gupta, Malay K. Ganai, Chao Wang, Zijiang Yang, Pranav Ashar
2002	A*	`conf`	Combining strengths of circuit-based and CNF-based algorithms for a high-performance SAT solver. DAC Malay K. Ganai, Pranav Ashar, Aarti Gupta, Lintao Zhang, Sharad Malik
2002	—	`conf`	Improved SAT-Based Bounded Reachability Analysis. ASP-DAC/VLSI Design Malay K. Ganai, Adnan Aziz
2002	J	`jnl`	Robust Boolean reasoning for equivalence checking and functional property verification. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Andreas Kuehlmann, Viresh Paruthi, Florian Krohm, Malay K. Ganai
2001	A*	`conf`	Circuit-based Boolean Reasoning. DAC Andreas Kuehlmann, Malay K. Ganai, Viresh Paruthi
2001	—	`conf`	Rarity based guided state space search. ACM Great Lakes Symposium on VLSI Malay K. Ganai, Adnan Aziz
2001	J	`jnl`	SIVA: A System for Coverage-Directed State Space Search. J. Electron. Test. Malay K. Ganai, Praveen Yalagandula, Adnan Aziz, Andreas Kuehlmann, Vigyan Singhal
1999	A*	`conf`	Enhancing Simulation with BDDs and ATPG. DAC Malay K. Ganai, Adnan Aziz, Andreas Kuehlmann
1999	Misc	`conf`	Performance Driven Synthesis for Pass-Transistor Logic. VLSI Design Tai-Hung Liu, Malay K. Ganai, Adnan Aziz, Jeffrey L. Burns