Maitham Shams - RankMe

32 papers A 1C 4Misc 4Journal 10Unranked 13

Year	Rank	Type	Title / Venue / Authors
2023	C	`conf`	FinFET 6T-SRAM Compute-in-Memory Targeting Low Power Neural Networks Operations. ISCAS Waqas Gul, Maitham Shams, Dhamin Al-Khalili
2018	J	`jnl`	Gate Oxide Short Defect Model in FinFETs. J. Electron. Test. Roya Dibaj, Dhamin Al-Khalili, Maitham Shams
2018	—	`conf`	Temperature Independent Subthreshold Circuits Design. ISOCC Morteza Nabavi, Maitham Shams, Mohamad Sawan
2017	Misc	`conf`	Comprehensive investigation of gate oxide short in FinFETs. VTS Roya Dibaj, Dhamin Al-Khalili, Maitham Shams
2015	—	`conf`	Single-ended 6T sub-threshold SRAM with horizontal local bit-lines. MWSCAS Sukneet Basuta, Maitham Shams
2014	J	`jnl`	Investigation of Low-Voltage Pulse Parameters on Electroporation and Electrical Lysis Using a Microfluidic Device With Interdigitated Electrodes. IEEE Trans. Biomed. Eng. Bashir I. Morshed, Maitham Shams, Tofy Mussivand
2013	J	`jnl`	Analysis of Electric Fields inside Microchannels and Single Cell Electrical Lysis with a Microfluidic Device. Micromachines Bashir I. Morshed, Maitham Shams, Tofy Mussivand
2012	J	`jnl`	A gate sizing and transistor fingering strategy for subthreshold CMOS circuits. IEICE Electron. Express Morteza Nabavi, Maitham Shams
2012	J	`jnl`	Ultra Low Power CMOS-Based Sensor for On-Body Radiation Dose Measurements. IEEE J. Emerg. Sel. Topics Circuits Syst. Muhammad Arsalan, Atif Shamim, Maitham Shams, Nicolas G. Tarr, Langis Roy
2011	J	`jnl`	A simple and effective fluidic encapsulation protocol for bioMEMS devices. IEICE Electron. Express Bashir I. Morshed, Maitham Shams, Tofy Mussivand
2011	J	`jnl`	Preference of designing CMOS subthreshold logic circuits using uniform-size transistors. IEICE Electron. Express Manmit Muker, Maitham Shams
2010	J	`jnl`	An Efficient Delay Model for MOS Current-Mode Logic Automated Design and Optimization. IEEE Trans. Circuits Syst. I Regul. Pap. Osman Musa Abdulkarim, Maitham Shams
2008	—	`conf`	Implementation of asynchronous pipeline circuits in multi-threshold CMOS technologies. ACM Great Lakes Symposium on VLSI Raghid Shreih, Maitham Shams
2008	J	`jnl`	Wireless Dosimeter: System-on-Chip Versus System-in-Package for Biomedical and Space Applications. IEEE Trans. Circuits Syst. II Express Briefs Atif Shamim, Muhammad Arsalan, Langis Roy, Maitham Shams, Nicolas G. Tarr
2007	—	`conf`	A symmetric mos current-mode logic universal gate for high speed applications. ACM Great Lakes Symposium on VLSI Osman Musa Abdulkarim, Maitham Shams
2007	C	`conf`	Asynchronous Adiabatic Logic. ISCAS Muhammad Arsalan, Maitham Shams
2006	—	`conf`	Design and Analysis of A Class-E Frequency-Controlled Transcutaneous Energy Transfer System. ICECS Ahmad Mizannojehdehi, Maitham Shams, Tofy Mussivand
2005	—	`conf`	A mathematical programming approach to designing MOS current-mode logic circuits. ISCAS (3) Shahnam Khabiri, Maitham Shams
2005	—	`conf`	An MCML four-bit ripple-carry adder design in 1 GHz range. ISCAS (2) Shahnam Khabiri, Maitham Shams
2005	Misc	`conf`	Charge-Recovery Power Clock Generators for Adiabatic Logic Circuits. VLSI Design Muhammad Arsalan, Maitham Shams
2005	—	`conf`	Delay modeling of CMOS/CPL logic circuits. ISCAS (6) Yuanzhong Wan, Maitham Shams
2005	—	`conf`	Design of High-Performance Power-Aware Asynchronous Pipelined Circuits in MOS Current Mode Logic. ASYNC Tin Wai Kwan, Maitham Shams
2005	Misc	`conf`	Design of Multi-GHz Asynchronous Pipelined Circuits in MOS Current-Mode Logic. VLSI Design Tin Wai Kwan, Maitham Shams
2005	Misc	`conf`	Optimization of Mixed Logic Circuits with Application to a 64-Bit Static Adder. VLSI Design Yuanzhong Wan, Maitham Shams
2004	—	`conf`	Implementation of MCML universal logic gate for 10 GHz-range in 0.13 µm CMOS technology. ISCAS (2) Shahnam Khabiri, Maitham Shams
2004	—	`conf`	Multi-GHz energy-efficient asynchronous pipelined circuits in MOS Current Mode Logic. ISCAS (2) Tin Wai Kwan, Maitham Shams
2003	—	`conf`	A unified delay model for CMOS logic styles. ICECS Maitham Shams
1999	—	`conf`	A formulation for quick evaluation and optimization of digital CMOS circuits. ISCAS (6) Maitham Shams, Mohamed I. Elmasry
1999	C	`conf`	Delay Optimization of CMOS Logic Circuits Using Closed-Form Expressions. ICCD Maitham Shams, Mohamed I. Elmasry
1998	J	`jnl`	Modeling and comparing CMOS implementations of the C-element. IEEE Trans. Very Large Scale Integr. Syst. Maitham Shams, Jo C. Ebergen, Mohamed I. Elmasry
1997	C	`conf`	Optimizing CMOS Implementations of the C-element. ICCD Maitham Shams, Jo C. Ebergen, Mohamed I. Elmasry
1996	A	`conf`	A comparison of CMOS implementations of an asynchronous circuits primitive: the C-element. ISLPED Maitham Shams, Jo C. Ebergen, Mohamed I. Elmasry