Mahesh B. Patil

30 papers C 2Misc 3Journal 21Unranked 4

Year	Rank	Type	Title / Venue / Authors
2024	J	`jnl`	Systematic equation formulation for simulation of power electronic circuits using explicit methods. CoRR Mahesh B. Patil
2023	J	`jnl`	Circuit simulation using explicit methods. CoRR Mahesh B. Patil, V. V. S. Pavan Kumar Hari
2023	J	`jnl`	Circuit simulation using explicit methods: singular matrix issues. CoRR Mahesh B. Patil
2022	J	`jnl`	An open-source simulation package for power electronics education. CoRR Mahesh B. Patil, V. V. S. Pavan Kumar Hari, Ruchita D. Korgaonkar, Kumar Appaiah
2021	J	`jnl`	GSEIM: A General-purpose Simulator with Explicit and Implicit Methods. CoRR Mahesh B. Patil, Ruchita D. Korgaonkar, Kumar Appaiah
2020	J	`jnl`	A Novel Hierarchical Circuit LUT Model for SOI Technology for Rapid Prototyping. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Sitansusekhar Roymohapatra, Ganesh R. Gore, Akanksha Yadav, Mahesh B. Patil, Krishnan S. Rengarajan, Subramanian S. Iyer, Maryam Shojaei Baghini
2020	J	`jnl`	Multi-Objective Optimisation of Damper Placement for Improved Seismic Response in Dynamically Similar Adjacent Buildings. CoRR Mahesh B. Patil, Ramakrishna U., Mohan S. C
2019	J	`jnl`	Water Distribution System Design Using Multi-Objective Genetic Algorithm with External Archive and Local Search. CoRR Mahesh B. Patil, M. Naveen Naidu, A. Vasan, Murari R. R. Varma
2019	J	`jnl`	Water Distribution System Design Using Multi-Objective Particle Swarm Optimisation. CoRR Mahesh B. Patil, M. Naveen Naidu, A. Vasan, Murari R. R. Varma
2018	J	`jnl`	Using External Archive for Improved Performance in Multi-Objective Optimization. CoRR Mahesh B. Patil
2017	—	`conf`	Enhanced Look-Up Table Approach for Modeling of Floating Body SOI MOSFET. iNIS Sitansusekhar Roymohapatra, Ganesh R. Gore, Akanksha Yadav, Mahesh B. Patil, Krishnan S. Rengrajan, Maryam Shojaei Baghini
2013	C	`conf`	An approach to complement electronics courses using virtual environment. EDUCON Jinu Jayachandran, Nina Joseph, Maheshwar Mangat, Vinay Verma, N. P. Narendra, Aniruddha Shastri, Devendra Patil, Madhumita Date, Joseph John, Mahesh B. Patil
2011	J	`jnl`	A novel architecture for improving slew rate in FinFET-based op-amps and OTAs. Microelectron. J. Rajesh Amratlal Thakker, Mayank Srivastava, Ketankumar H. Tailor, Maryam Shojaei Baghini, Dinesh Kumar Sharma, V. Ramgopal Rao, Mahesh B. Patil
2010	J	`jnl`	A Table-Based Approach to Study the Impact of Process Variations on FinFET Circuit Performance. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Rajesh Amratlal Thakker, Chaitanya Sathe, Maryam Shojaei Baghini, Mahesh B. Patil
2010	—	`conf`	Auto-BET-AMS: An automated device and circuit optimization platform to benchmark emerging technologies for performance and variability using an analog and mixed-signal design framework. ISQED Angada B. Sachid, Rajesh Amratlal Thakker, Chaitanya Sathe, Maryam Shojaei Baghini, Dinesh Kumar Sharma, V. Ramgopal Rao, Mahesh B. Patil
2009	J	`jnl`	A Novel Table-Based Approach for Design of FinFET Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Rajesh Amratlal Thakker, Chaitanya Sathe, Angada B. Sachid, Maryam Shojaei Baghini, V. Ramgopal Rao, Mahesh B. Patil
2009	—	`conf`	Automated design and optimization of circuits in emerging technologies. ASP-DAC Rajesh Amratlal Thakker, Chaitanya Sathe, Angada B. Sachid, Maryam Shojaei Baghini, V. Ramgopal Rao, Mahesh B. Patil
2009	J	`jnl`	Automatic Design of Low-Power Low-Voltage Analog Circuits Using Particle Swarm Optimization with Re-Initialization. J. Low Power Electron. Rajesh Amratlal Thakker, Maryam Shojaei Baghini, Mahesh B. Patil
2009	C	`conf`	Bridging Technology-CAD and Design-CAD for Variability Aware Nano-CMOS Circuits. ISCAS B. P. Harish, Navakanta Bhat, Mahesh B. Patil
2009	Misc	`conf`	Low-Power Low-Voltage Analog Circuit Design Using Hierarchical Particle Swarm Optimization. VLSI Design Rajesh Amratlal Thakker, Maryam Shojaei Baghini, Mahesh B. Patil
2009	J	`jnl`	Parameter extraction for PSP MOSFET model using hierarchical particle swarm optimization. Eng. Appl. Artif. Intell. Rajesh Amratlal Thakker, Mahesh B. Patil, K. G. Anil
2008	J	`jnl`	Hybrid-CV Modeling for Estimating the Variability in Dynamic Power. J. Low Power Electron. B. P. Harish, Navakanta Bhat, Mahesh B. Patil
2007	J	`jnl`	On a Generalized Framework for Modeling the Effects of Process Variations on Circuit Delay Performance Using Response Surface Methodology. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. B. P. Harish, Navakanta Bhat, Mahesh B. Patil
2007	—	`conf`	Process Variability-Aware Statistical Hybrid Modeling of Dynamic Power Dissipation in 65 nm CMOS Designs. ICCTA B. P. Harish, Navakanta Bhat, Mahesh B. Patil
2006	Misc	`conf`	Evaluation of Non-Quasi-Static Effects during SEU in Deep-Submicron MOS Devices and Circuits. VLSI Design Palkesh Jain, D. Vinay Kumar, J. M. Vasi, Mahesh B. Patil
2003	Misc	`conf`	Application of Look-up Table Approach to High-K Gate Dielectric MOS Transistor circuits. VLSI Design D. Vinay Kumar, Nihar R. Mohapatra, Mahesh B. Patil, V. Ramgopal Rao
2002	J	`jnl`	A new public-domain simulator for power electronic circuits. IEEE Trans. Educ. Mahesh B. Patil, Shyama P. Das, Avinash Joshi, Mukul Chandorkar
1999	J	`jnl`	Extension of the VR discretization scheme for velocity saturation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Mahesh B. Patil
1998	J	`jnl`	New discretization scheme for two-dimensional semiconductor device simulation on triangular grid. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Mahesh B. Patil
1998	J	`jnl`	Numerical Evaluation of Iterative Schemes for Drift-diffusion Simulation. VLSI Design Mahesh B. Patil, Umberto Ravaioli, Thomas Kerkhoven