Mahendra Rathor

29 papers A 1C 1Misc 1Journal 20Unranked 5
YearRankTypeTitle / Venue / Authors
2026 J jnl
Dual-Mode Rounding Algorithms and Hardware for Posit-Based DNN Training: The Future of Mixed Precision Frameworks.
ACM Trans. Embed. Comput. Syst.
Vishesh Mishra, Mahendra Rathor, Urbi Chatterjee
2026 J jnl
EASY: Exploring zero-cost watermarking using voice image features for hardware security.
Integr.
Mahendra Rathor
2025 J jnl
ALOHA-FP2I: Efficient Algorithms and Hardware for Multi-Mode Rounding of Floating Point to Integer.
ACM Trans. Embed. Comput. Syst.
Mahendra Rathor
2024 J jnl
Hard-Sign: A Hardware Watermarking Scheme Using Dated Handwritten Signature.
IEEE Des. Test
Mahendra Rathor, Girraj Prasad Rathor
2024 J jnl
Revisiting Black-Hat HLS: A Lightweight Countermeasure to HLS-Aided Trojan Attack.
IEEE Embed. Syst. Lett.
Mahendra Rathor, Anirban Sengupta
2024 J jnl
Securing Reusable IP Cores Using Voice Biometric Based Watermark.
IEEE Trans. Dependable Secur. Comput.
Mahendra Rathor, Aditya Anshul, Anirban Sengupta
2024 — conf
Sorting Attacks Resilient Authentication Protocol for CMOS Image Sensor Based PUF.
AsianHOST
Anurag Kamal, Vishesh Mishra, Sparsh Mittal, Mahendra Rathor, Chandan Kumar, Urbi Chatterjee
2024 Misc conf
Vig-WaR: Vigilantly Watching Ransomware for Robust Trapping and Containment.
VLSID
Akash Panzade, Deepak Kumar, Mahendra Rathor, Urbi Chatterjee
2023 A conf
Aiding to Multimedia Accelerators: A Hardware Design for Efficient Rounding of Binary Floating Point Numbers.
DATE
Mahendra Rathor, Vishesh Mishra, Urbi Chatterjee
2023 J jnl
Biometrics for Hardware Security and Trust: Discussion and Analysis.
IT Prof.
Anirban Sengupta, Mahendra Rathor, Rahul Chaurasia
2023 J jnl
Exploring Handwritten Signature Image Features for Hardware Security.
IEEE Trans. Dependable Secur. Comput.
Mahendra Rathor, Anirban Sengupta, Rahul Chaurasia, Aditya Anshul
2023 J jnl
Quadruple phase watermarking during high level synthesis for securing reusable hardware intellectual property cores.
Comput. Electr. Eng.
Mahendra Rathor, Aditya Anshul, K. Bharath, Rahul Chaurasia, Anirban Sengupta
2022 — conf
Dual-Tone Multi-Frequency Assisted Acoustic Side Channel Attack to Retrieve Dialled Call Log.
SPACE
Abhishek Revskar, Mahendra Rathor, Urbi Chatterjee
2022 — ch.
Hardware (IP) Watermarking During Behavioral Synthesis.
Behavioral Synthesis for Hardware Security
Anirban Sengupta, Mahendra Rathor
2022 J jnl
Sorting Attacks Resilient Authentication Protocol for CMOS Image Sensor Based PUF.
IACR Cryptol. ePrint Arch.
Chandan Kumar, Mahendra Rathor, Urbi Chatterjee
2021 J jnl
Facial Biometric for Securing Hardware Accelerators.
IEEE Trans. Very Large Scale Integr. Syst.
Anirban Sengupta, Mahendra Rathor
2021 — conf
Signature Biometric based Authentication of IP Cores for Secure Electronic Systems.
iSES
Mahendra Rathor, Anirban Sengupta
2020 J jnl
Enhanced Security of DSP Circuits Using Multi-Key Based Structural Obfuscation and Physical-Level Watermarking for Consumer Electronics Systems.
IEEE Trans. Consumer Electron.
Anirban Sengupta, Mahendra Rathor
2020 J jnl
IP Core Steganography Using Switch Based Key-Driven Hash-Chaining and Encoding for Securing DSP Kernels Used in CE Systems.
IEEE Trans. Consumer Electron.
Mahendra Rathor, Anirban Sengupta
2020 J jnl
Obfuscated Hardware Accelerators for Image Processing Filters - Application Specific and Functionally Reconfigurable Processors.
IEEE Trans. Consumer Electron.
Anirban Sengupta, Mahendra Rathor
2020 J jnl
Securing Hardware Accelerators for CE Systems Using Biometric Fingerprinting.
IEEE Trans. Very Large Scale Integr. Syst.
Anirban Sengupta, Mahendra Rathor
2020 — conf
Securing IP Cores in CE Systems using Key-driven Hash-chaining based Steganography.
ICCE-Berlin
Mahendra Rathor, Pallabi Sarkar, Vipul Kumar Mishra, Anirban Sengupta
2020 J jnl
Structural Obfuscation and Crypto-Steganography-Based Secured JPEG Compression Hardware for Medical Imaging Systems.
IEEE Access
Anirban Sengupta, Mahendra Rathor
2019 — conf
Enhanced Functional Obfuscation of DSP core using Flip-Flops and Combinational logic.
ICCE-Berlin
Mahendra Rathor, Anirban Sengupta
2019 J jnl
IP Core Steganography for Protecting DSP Kernels Used in CE Systems.
IEEE Trans. Consumer Electron.
Anirban Sengupta, Mahendra Rathor
2019 C conf
Improved Delay Estimation Model for Loop based DSP cores.
ICCE
Anirban Sengupta, Mahendra Rathor
2019 J jnl
Protecting DSP Kernels Using Robust Hologram-Based Obfuscation.
IEEE Trans. Consumer Electron.
Anirban Sengupta, Mahendra Rathor
2019 J jnl
Robust Logic locking for Securing Reusable DSP Cores.
IEEE Access
Mahendra Rathor, Anirban Sengupta
2019 J jnl
Security of Functionally Obfuscated DSP Core Against Removal Attack Using SHA-512 Based Key Encryption Hardware.
IEEE Access
Anirban Sengupta, Mahendra Rathor