Maciej Kopczynski

20 papers C 1Journal 5Unranked 13
YearRankTypeTitle / Venue / Authors
2024 — conf
Usage of Real-World Maps for 3D Mobile Games - Transformations and Optimizations.
CISIM
Maciej Kopczynski
2024 — conf
World Maps Conversions for 3D Mobile Games Working in Real-Time Environment.
ISD
Maciej Kopczynski
2022 J jnl
FPGA supported rough set reduct calculation for big datasets.
J. Intell. Inf. Syst.
Maciej Kopczynski, Tomasz Grzes
2022 — conf
Mobile Phone as a 6DoF Motion Controller.
CISIM
Maciej Kopczynski
2021 — conf
Development of Digital Competences of Elementary School Teachers with a Life-Long Learning Approach.
CISIM
Michal Czolombitko, Tomasz Grzes, Maciej Kopczynski, Urszula Kuzelewska, Anna Lupinska-Dubicka, Dorota Mozyrska, Joanna Panasiuk
2021 — conf
FPGA in Core Calculation for Big Datasets.
CISIM
Maciej Kopczynski
2021 J jnl
Hardware Rough Set Processor Parallel Architecture in FPGA for Finding Core in Big Datasets.
J. Artif. Intell. Soft Comput. Res.
Maciej Kopczynski, Tomasz Grzes
2020 C conf
Parallelized Hardware Rough Set Processor Architecture in FPGA for Core Calculation in Big Datasets.
ICARCV
Maciej Kopczynski, Tomasz Grzes
2019 — conf
Hardware Implementation on Field Programmable Gate Array of Two-Stage Algorithm for Rough Set Reduct Generation.
IJCRS
Tomasz Grzes, Maciej Kopczynski
2017 — conf
Hardware Supported Rule-Based Classification on Big Datasets.
IJCRS (1)
Maciej Kopczynski, Tomasz Grzes, Jaroslaw Stepaniuk
2016 J jnl
Core for Large Datasets: Rough Sets on FPGA.
Fundam. Informaticae
Maciej Kopczynski, Tomasz Grzes, Jaroslaw Stepaniuk
2016 — conf
Hardware Supported Rough Sets Based Rules Generation for Big Datasets.
CISIM
Maciej Kopczynski, Tomasz Grzes, Jaroslaw Stepaniuk
2016 J jnl
Rough Sets Based LEM2 Rules Generation Supported by FPGA.
Fundam. Informaticae
Maciej Kopczynski, Tomasz Grzes, Jaroslaw Stepaniuk
2015 — conf
Computation of Cores in Big Datasets: An FPGA Approach.
RSKT
Maciej Kopczynski, Tomasz Grzes, Jaroslaw Stepaniuk
2015 — conf
Core for Large Datasets: Rough Sets on FPGA.
CS&P
Maciej Kopczynski, Tomasz Grzes, Jaroslaw Stepaniuk
2014 — conf
FPGA in Rough-Granular Computing: Reduct Generation.
WI-IAT (1)
Maciej Kopczynski, Tomasz Grzes, Jaroslaw Stepaniuk
2014 — conf
Generating Core in Rough Set Theory: Design and Implementation on FPGA.
RSEISP
Maciej Kopczynski, Tomasz Grzes, Jaroslaw Stepaniuk
2013 — conf
FPGA in Rough Set Based Core and Reduct Computation.
RSKT
Tomasz Grzes, Maciej Kopczynski, Jaroslaw Stepaniuk
2013 — ch.
Hardware Implementations of Rough Set Methods in Programmable Logic Devices.
Rough Sets and Intelligent Systems (2)
Maciej Kopczynski, Jaroslaw Stepaniuk
2013 J jnl
The First Step Toward Processor for Rough Set Methods.
Fundam. Informaticae
Jaroslaw Stepaniuk, Maciej Kopczynski, Tomasz Grzes