Maarten Kuijk - RankMe

35 papers B 1C 2Journal 20Unranked 12

Year	Rank	Type	Title / Venue / Authors
2025	B	`conf`	Ambient Light Rejection Method for SPAD-Based Optical Wireless Communications. WCNC Jan Coosemans, Maarten Kuijk, Valéry Ann Jacobs
2024	J	`jnl`	Correlation-Assisted Pixel Array for Direct Time of Flight. Sensors Ayman Morsy, Maarten Kuijk
2022	J	`jnl`	Correction: Jegannathan et al. An Overview of CMOS Photodetectors Utilizing Current-Assistance for Swift and Efficient Photo-Carrier Detection. Sensors 2021, 21, 4576. Sensors Gobinath Jegannathan, Volodymyr Seliuchenko, Thomas Van den Dries, Thomas Lapauw, Sven Boulanger, Hans Ingelberts, Maarten Kuijk
2021	J	`jnl`	An Overview of CMOS Photodetectors Utilizing Current-Assistance for Swift and Efficient Photo-Carrier Detection. Sensors Gobinath Jegannathan, Volodymyr Seliuchenko, Thomas Van den Dries, Thomas Lapauw, Sven Boulanger, Hans Ingelberts, Maarten Kuijk
2020	J	`jnl`	Current-Assisted SPAD with Improved p-n Junction and Enhanced NIR Performance. Sensors Gobinath Jegannathan, Thomas Van den Dries, Maarten Kuijk
2019	—	`conf`	A 5 ps resolution, 8.6 ns delay range digital delay line using combinatorial redundancy. PRIME Thomas Van den Dries, Hans Ingelberts, Sven Boulanger, Maarten Kuijk
2018	—	`conf`	Partial reset HDR image sensor with improved fixed pattern noise performance. IMSE Volodymyr Seliuchenko, Sharath Patil, Marcelo Mizuki, Saad Ahmad, Maarten Kuijk
2015	J	`jnl`	A 42 mW 200 fs-Jitter 60 GHz Sub-Sampling PLL in 40 nm CMOS. IEEE J. Solid State Circuits Viki Szortyka, Qixian Shi, Kuba Raczkowski, Bertrand Parvais, Maarten Kuijk, Piet Wambacq
2015	J	`jnl`	A Wideband Beamforming Lowpass Filter for 60 GHz Phased-Array Receivers. IEEE Trans. Circuits Syst. I Regul. Pap. Viki Szortyka, Kuba Raczkowski, Maarten Kuijk, Piet Wambacq
2014	—	`conf`	21.4 A 42mW 230fs-jitter sub-sampling 60GHz PLL in 40nm CMOS. ISSCC Viki Szortyka, Qixian Shi, Kuba Raczkowski, Bertrand Parvais, Maarten Kuijk, Piet Wambacq
2010	J	`jnl`	A 2.6 mW 6 bit 2.2 GS/s Fully Dynamic Pipeline ADC in 40 nm Digital CMOS. IEEE J. Solid State Circuits Bob Verbruggen, Jan Craninckx, Maarten Kuijk, Piet Wambacq, Geert Van der Plas
2010	—	`conf`	A 2.6mW 6b 2.2GS/s 4-times interleaved fully dynamic pipelined ADC in 40nm digital CMOS. ISSCC Bob Verbruggen, Jan Craninckx, Maarten Kuijk, Piet Wambacq, Geert Van der Plas
2009	J	`jnl`	A 2.2 mW 1.75 GS/s 5 Bit Folding Flash ADC in 90 nm Digital CMOS. IEEE J. Solid State Circuits Bob Verbruggen, Jan Craninckx, Maarten Kuijk, Piet Wambacq, Geert Van der Plas
2009	J	`jnl`	A Fully Integrated 7.3 kV HBM ESD-Protected Transformer-Based 4.5-6 GHz CMOS LNA. IEEE J. Solid State Circuits Jonathan Borremans, Steven Thijs, Piet Wambacq, Yves Rolain, Dimitri Linten, Maarten Kuijk
2009	J	`jnl`	A Low-Complexity, Low-Phase-Noise, Low-Voltage Phase-Aligned Ring Oscillator in 90 nm Digital CMOS. IEEE J. Solid State Circuits Jonathan Borremans, Julien Ryckaert, Claude Desset, Maarten Kuijk, Piet Wambacq, Jan Craninckx
2009	C	`conf`	A Standardized Knobs and Monitors RTL2RTL Insertion Methodology for Fine Grain SoC Tuning. DSD Ahmed Mohamed AbdelHamid, Ankur Anchlia, Stylianos Mamagkakis, Miguel Corbalan Miranda, Bart Dierickx, Maarten Kuijk
2008	J	`jnl`	A 1 × 64 Complementary Metal Oxide Semiconductor ranging sensor based on Current-Assisted Photonic Demodulators. Int. J. Intell. Syst. Technol. Appl. Ward van der Tempel, Daniel Van Nieuwenhove, Riemer Grootjans, Maarten Kuijk
2008	—	`conf`	A 2.2mW 5b 1.75GS/s Folding Flash ADC in 90nm Digital CMOS. ISSCC Bob Verbruggen, Jan Craninckx, Maarten Kuijk, Piet Wambacq, Geert Van der Plas
2008	—	`conf`	A 400 μW 4.7-to-6.4GHz VCO under an Above-IC Inductor in 45nm CMOS. ISSCC Jonathan Borremans, Piet Wambacq, Maarten Kuijk, Geert Carchon, Stefaan Decoutere
2008	J	`jnl`	A Compact Wideband Front-End Using a Single-Inductor Dual-Band VCO in 90 nm Digital CMOS. IEEE J. Solid State Circuits Jonathan Borremans, Andrea Bevilacqua, Stephane Bronckers, Morin Dehan, Maarten Kuijk, Piet Wambacq, Jan Craninckx
2008	—	`conf`	A Single-Inductor Dual-Band VCO in a 0.06mm ISSCC Jonathan Borremans, Stephane Bronckers, Piet Wambacq, Maarten Kuijk, Jan Craninckx
2008	—	`conf`	A low-complexity, low phase noise, low-voltage phase-aligned ring oscillator in 90 nm digital CMOS. ESSCIRC Jonathan Borremans, Julien Ryckaert, Piet Wambacq, Maarten Kuijk, Jan Craninckx
2008	J	`jnl`	Low-Area Active-Feedback Low-Noise Amplifier Design in Scaled Digital CMOS. IEEE J. Solid State Circuits Jonathan Borremans, Piet Wambacq, Charlotte Soens, Yves Rolain, Maarten Kuijk
2008	J	`jnl`	Time-Of-Flight distance sensor with enhanced dynamic range. Int. J. Intell. Syst. Technol. Appl. Daniel Van Nieuwenhove, Ward van der Tempel, Riemer Grootjans, Maarten Kuijk
2007	—	`conf`	A switchable low-area 2.4-and-5 GHz dual-band LNA in digital CMOS. ESSCIRC Jonathan Borremans, Piet Wambacq, Geert Van der Plas, Yves Rolain, Maarten Kuijk
2006	—	`conf`	Constant Impedance Scaling Paradigm for Scaling LC transmission lines. ISQED J. Balachandran, Steven Brebels, Geert Carchon, Walter De Raedt, Eric Beyne, Maarten Kuijk, Bart Nauwelaers
2006	—	`conf`	Constant impedance scaling paradigm for interconnect synthesis. SLIP J. Balachandran, Steven Brebels, Geert Carchon, Maarten Kuijk, Walter De Raedt, Bart Nauwelaers, Eric Beyne
2006	—	`conf`	Efficient Link Architecture for On-Chip Serial links and Networks. SoC J. Balachandran, Maarten Kuijk, Steven Brebels, Geert Carchon, Walter De Raedt, Bart Nauwelaers, Eric Beyne
2006	J	`jnl`	Modeling of Substrate Noise Generation, Isolation, and Impact for an LC-VCO and a Digital Modem on a Lightly-Doped Substrate. IEEE J. Solid State Circuits Charlotte Soens, Geert Van der Plas, Mustafa Badaroglu, Piet Wambacq, Stéphane Donnay, Yves Rolain, Maarten Kuijk
2006	J	`jnl`	Wafer-level package interconnect options. IEEE Trans. Very Large Scale Integr. Syst. J. Balachandran, Steven Brebels, Geert Carchon, Maarten Kuijk, Walter De Raedt, Bart Nauwelaers, Eric Beyne
2005	J	`jnl`	Performance degradation of LC-tank VCOs by impact of digital switching noise in lightly doped substrates. IEEE J. Solid State Circuits Charlotte Soens, Geert Van der Plas, Piet Wambacq, Stéphane Donnay, Maarten Kuijk
2004	J	`jnl`	An 8-Gb/s capacitively coupled receiver with high common-mode rejection for uncoded data. IEEE J. Solid State Circuits Xavier Maillard, Maarten Kuijk
2002	J	`jnl`	A 900-Mb/s CMOS data recovery DLL using half-frequency clock. IEEE J. Solid State Circuits Xavier Maillard, Frédéric Devisch, Maarten Kuijk
2000	C	`conf`	A power reduction method for off-chip interconnects. ISCAS Frédéric Devisch, Johan Stiens, Roger Vounckx, Maarten Kuijk
2000	J	`jnl`	Asynchronous 250-Mb/s optical receivers with integrated detector in standard CMOS technology for optocoupler applications. IEEE J. Solid State Circuits Cathleen Rooman, Daniël Coppée, Maarten Kuijk