M. D. Arafat Kabir

16 papers A 1B 2Misc 2Journal 6Unranked 5
YearRankTypeTitle / Venue / Authors
2026 J jnl
Adaptive Redistribution Layer Routing for Chiplet-Package Co-Design in 2.5D System.
ACM Trans. Design Autom. Electr. Syst.
Zhen Zhuang, Weishiun Hung, M. D. Arafat Kabir, Yarui Peng, Tsung-Yi Ho
2025 J jnl
DA-VinCi: A Deep-Learning Accelerator Overlay Using In-Memory Computing.
ACM Trans. Reconfigurable Technol. Syst.
M. D. Arafat Kabir, Nathaniel Fredricks, Tendayi Kamucheka, Joel Mandebi, Miaoqing Huang, Jason D. Bakos, David Andrews
2024 J jnl
FAMOUS: Flexible Accelerator for the Attention Mechanism of Transformer on UltraScale+ FPGAs.
CoRR
Ehsan Kabir, M. D. Arafat Kabir, Austin R. J. Downey, Jason D. Bakos, David Andrews, Miaoqing Huang
2024 — conf
Famous: Flexible Accelerator for the Attention Mechanism of Transformer on Ultrascale+ FPGAs.
ICFPT
Ehsan Kabir, M. D. Arafat Kabir, Austin R. J. Downey, Jason D. Bakos, David Andrews, Miaoqing Huang
2024 B conf
IMAGine: An In-Memory Accelerated GEMV Engine Overlay.
FPL
M. D. Arafat Kabir, Tendayi Kamucheka, Nathaniel Fredricks, Joel Mandebi, Jason D. Bakos, Miaoqing Huang, David Andrews
2024 J jnl
IMAGine: An In-Memory Accelerated GEMV Engine Overlay.
CoRR
M. D. Arafat Kabir, Tendayi Kamucheka, Nathaniel Fredricks, Joel Mandebi, Jason D. Bakos, Miaoqing Huang, David Andrews
2024 Misc conf
The BRAM is the Limit: Shattering Myths, Shaping Standards, and Building Scalable PIM Accelerators.
FCCM
M. D. Arafat Kabir, Tendayi Kamucheka, Nathaniel Fredricks, Joel Mandebi, Jason D. Bakos, Miaoqing Huang, David Andrews
2024 J jnl
The BRAM is the Limit: Shattering Myths, Shaping Standards, and Building Scalable PIM Accelerators.
CoRR
M. D. Arafat Kabir, Tendayi Kamucheka, Nathaniel Fredricks, Joel Mandebi, Jason D. Bakos, Miaoqing Huang, David Andrews
2023 B conf
FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ?
FPL
M. D. Arafat Kabir, Ehsan Kabir, Joshua Hollis, Eli Levy-Mackay, Atiyehsadat Panahi, Jason D. Bakos, Miaoqing Huang, David Andrews
2023 J jnl
FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ?
CoRR
M. D. Arafat Kabir, Ehsan Kabir, Joshua Hollis, Eli Levy-Mackay, Atiyehsadat Panahi, Jason D. Bakos, Miaoqing Huang, David Andrews
2023 Misc conf
Making BRAMs Compute: Creating Scalable Computational Memory Fabric Overlays.
FCCM
M. D. Arafat Kabir, Joshua Hollis, Atiyehsadat Panahi, Jason D. Bakos, Miaoqing Huang, David Andrews
2021 — conf
Cross-Boundary Inductive Timing Optimization for 2.5D Chiplet-Package Co-Design.
ACM Great Lakes Symposium on VLSI
M. D. Arafat Kabir, Dusan Petranovic, Yarui Peng
2021 — conf
Holistic and In-Context Design Flow for 2.5D Chiplet-Package Interaction Co-Optimization.
VLSI-DAT
M. D. Arafat Kabir, Weishiun Hung, Tsung-Yi Ho, Yarui Peng
2020 — conf
Chiplet-Package Co-Design For 2.5D Systems Using Standard ASIC CAD Tools.
ASP-DAC
M. D. Arafat Kabir, Yarui Peng
2020 A conf
Coupling Extraction and Optimization for Heterogeneous 2.5D Chiplet-Package Co-Design.
ICCAD
M. D. Arafat Kabir, Dusan Petranovic, Yarui Peng
2020 — conf
Holistic 2.5D Chiplet Design Flow: A 65nm Shared-Block Microcontroller Case Study.
SoCC
M. D. Arafat Kabir, Yarui Peng