Luís Guerra e Silva

15 papers A* 1A 2B 1C 2Journal 4Unranked 5

Year	Rank	Type	Title / Venue / Authors
2023	B	`conf`	EUROPULS: NEUROmorphic energy-efficient secure accelerators based on Phase change materials aUgmented siLicon photonicS. ETS Fabio Pavanello, Cédric Marchand, Ian O'Connor, Régis Orobtchouk, Fabien Mandorlo, Xavier Letartre, Sébastien Cueff, Elena-Ioana Vatajelu, Giorgio Di Natale, Benoit Cluzel, Aurelien Coillet, Benoît Charbonnier, Pierre Noe, Frantisek Kavan, Martin Zoldak, Michal Szaj, Peter Bienstman, Thomas Van Vaerenbergh, Ulrich Rührmair, Paulo F. Flores, Luís Guerra e Silva, Ricardo Chaves, Luís Miguel Silveira, Mariano Ceccato, Dimitris Gizopoulos, George Papadimitriou, Vasileios Karakostas, Axel Brando, Francisco J. Cazorla, Ramon Canal, Pau Closas, Adria Gusi-Amigo, Paolo Crovetti, Alessio Carpegna, Tzamn Melendez Carmona, Stefano Di Carlo, Alessandro Savino
2023	J	`jnl`	NEUROPULS: NEUROmorphic energy-efficient secure accelerators based on Phase change materials aUgmented siLicon photonicS. CoRR Fabio Pavanello, Cédric Marchand, Ian O'Connor, Régis Orobtchouk, Fabien Mandorlo, Xavier Letartre, Sébastien Cueff, Elena-Ioana Vatajelu, Giorgio Di Natale, Benoit Cluzel, Aurelien Coillet, Benoît Charbonnier, Pierre Noe, Frantisek Kavan, Martin Zoldak, Michal Szaj, Peter Bienstman, Thomas Van Vaerenbergh, Ulrich Rührmair, Paulo F. Flores, Luís Guerra e Silva, Ricardo Chaves, Luís Miguel Silveira, Mariano Ceccato, Dimitris Gizopoulos, George Papadimitriou, Vasileios Karakostas, Axel Brando, Francisco J. Cazorla, Ramon Canal, Pau Closas, Adria Gusi-Amigo, Paolo Crovetti, Alessio Carpegna, Tzamn Melendez Carmona, Stefano Di Carlo, Alessandro Savino
2013	—	`conf`	TAU 2013 variation aware timing analysis contest. ISPD Debjit Sinha, Luís Guerra e Silva, Jia Wang, Shesha Raghunathan, Dileep Netrabile, Ahmed Shebaita
2012	—	`conf`	Unifying functional and parametric timing verification. ACM Great Lakes Symposium on VLSI Luís Guerra e Silva
2011	—	`conf`	Handling intra-die variations in PSTA. ACM Great Lakes Symposium on VLSI Luís Guerra e Silva, Luís Miguel Silveira
2010	J	`jnl`	Effective Corner-Based Techniques for Variation-Aware IC Timing Verification. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Luís Guerra e Silva, Joel R. Phillips, Luís Miguel Silveira
2010	A*	`conf`	Speedpath analysis under parametric timing models. DAC Luís Guerra e Silva, Joel R. Phillips, L. Miguel Silveira
2007	A	`conf`	Efficient computation of the worst-delay corner. DATE Luís Guerra e Silva, Luís Miguel Silveira, Joel R. Phillips
2006	—	`conf`	Library Compatible Variational Delay Computation. VLSI-SoC (Selected Papers) Luís Guerra e Silva, Zhenhai Zhu, Joel R. Phillips, L. Miguel Silveira
2006	C	`conf`	Variation-Aware, Library Compatible Delay Modeling Strategy. VLSI-SoC Luís Guerra e Silva, Zhenhai Zhu, Joel R. Phillips, L. Miguel Silveira
2005	C	`conf`	Grid-based statistical timing analysis. IADIS AC Luís Guerra e Silva, Luís Miguel Silveira
2003	J	`jnl`	Solving Satisfiability in Combinational Circuits. IEEE Des. Test Comput. João Marques-Silva, Luís Guerra e Silva
2002	J	`jnl`	Satisfiability models and algorithms for circuit delay computation. ACM Trans. Design Autom. Electr. Syst. Luís Guerra e Silva, João Marques-Silva, Luís Miguel Silveira, Karem A. Sakallah
1999	A	`conf`	Algorithms for Solving Boolean Satisfiability in Combinational Circuits. DATE Luís Guerra e Silva, Luís Miguel Silveira, João Marques-Silva
1998	—	`conf`	Timing analysis using propositional satisfiability. ICECS Luís Guerra e Silva, João P. Marques Silva, Luís Miguel Silveira, Karem A. Sakallah