Lunyao Wang

13 papers A* 1A 1Journal 10Unranked 1
YearRankTypeTitle / Venue / Authors
2026 J jnl
Enhancing logic optimization of Alliance tool based on directed acyclic graphs.
Integr.
Qiyao He, Zhang Hu, Yinshui Xia, Lunyao Wang, Zhufei Chu
2026 J jnl
FeFET based pipeline-style logic-in-memory circuits.
Microelectron. J.
Yang Li, Zhaohui Yang, Lunyao Wang, Zhichao Dong, Yuqiang Hu, Qianhuo Wu, Yinshui Xia, Xiaojing Zha
2026 J jnl
Performance Evaluation and Enhancement Scheme for RRAM-Based In-Memory Computing Circuits by Signal Integrity Analysis With Consideration of Electro-Thermal and Parasitic Effects.
IEEE Trans. Circuits Syst. I Regul. Pap.
Wenbo Wang, Xingyu Zhai, Jiarui Qiu, Hao Xie, Lunyao Wang, Yinshui Xia, Wenchao Chen
2025 J jnl
FeFET-based built-in less-than operation and non-volatile comparator design.
IEICE Electron. Express
Xiaojing Zha, Yinshui Xia, Lunyao Wang, Yidie Ye
2025 A* conf
Mixed Structural Choice Operator: Enhancing Technology Mapping with Heterogeneous Representations.
DAC
Zhang Hu, Hongyang Pan, Yinshui Xia, Lunyao Wang, Zhufei Chu
2025 J jnl
Mixed Structural Choice Operator: Enhancing Technology Mapping with Heterogeneous Representations.
CoRR
Zhang Hu, Hongyang Pan, Yinshui Xia, Lunyao Wang, Zhufei Chu
2024 A conf
A Semi-Tensor Product based Circuit Simulation for SAT-sweeping.
DATE
Hongyang Pan, Ruibing Zhang, Yinshui Xia, Lunyao Wang, Fan Yang, Xuan Zeng, Zhufei Chu
2024 J jnl
Semi-Tensor Product-Based Exact Synthesis for Logic Rewriting.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Hongyang Pan, Yinshui Xia, Lunyao Wang, Zhufei Chu
2023 J jnl
A Semi-Tensor Product based Circuit Simulation for SAT-sweeping.
CoRR
Hongyang Pan, Ruibing Zhang, Yinshui Xia, Lunyao Wang, Fan Yang, Xuan Zeng, Zhufei Chu
2022 J jnl
2022 roadmap on neuromorphic devices and applications research in China.
Neuromorph. Comput. Eng.
Qing Wan, Changjin Wan, Huaqiang Wu, Yuchao Yang, Xiaohe Huang, Peng Zhou, Lin Chen, Tian-Yu Wang, Yi Li, Kanhao Xue, Yu-Hui He, Xiangshui Miao, Xi Li, Chenchen Xie, Houpeng Chen, Zhitang Song, Hong Wang, Yue Hao, Junyao Zhang, Jia Huang, Zheng Yu Ren, Li Qiang Zhu, Jianyu Du, Chen Ge, Yang Liu, Guanglong Ding, Ye Zhou, Su-Ting Han, Guosheng Wang, Xiao Yu, Bing Chen, Zhufei Chu, Lunyao Wang, Yinshui Xia, Chen Mu, Feng Lin, Chixiao Chen, Bojun Cheng, Yannan Xing, Weitao Zeng, Hong Chen, Lei Yu, Giacomo Indiveri, Ning Qiao
2022 J jnl
Efficient Design of Majority-Logic-Based Approximate Arithmetic Circuits.
IEEE Trans. Very Large Scale Integr. Syst.
Zhufei Chu, Chuanhe Shang, Tingting Zhang, Yinshui Xia, Lunyao Wang, Weiqiang Liu
2021 J jnl
BCD Adder Designs Based on Three-Input XOR and Majority Gates.
IEEE Trans. Circuits Syst. II Express Briefs
Zhufei Chu, Zeqiang Li, Yinshui Xia, Lunyao Wang, Weiqiang Liu
2019 — conf
Power optimization for FPRM logic using approximate computing technique.
ASICON
Yichen Wang, Lunyao Wang