Lukás Nagy - RankMe

42 papers A 1C 14Journal 10Unranked 16

Year	Rank	Type	Title / Venue / Authors
2025	J	`jnl`	Development of slope detection ASIC for on-chip current sensing in voltage converters. Integr. Richard Ravasz, Viera Stopjaková, David Maljar, Daniel Arbet, Lukás Nagy, Martin Kovác
2023	—	`conf`	Design of Ultra-Low Power Comparator in 65 NM CMOS Technology with Rail-to-Rail Input Range. AFRICON Lukás Nagy, Michal Sovcik, Viera Stopjaková
2022	—	`conf`	High Power Supply Rejection LDO Regulator for Switching Applications. MIPRO Daniel Arbet, Martin Kovác, David Maljas, Lukás Nagy, Viera Stopjaková
2022	—	`conf`	Low-Power Rail-to-Rail Comparator in 130 nm CMOS Technology. RADIOELEKTRONIKA Lukás Nagy, Daniel Arbet, Martin Kovác, Miroslav Potocný, Michal Sovcik, Viera Stopjaková
2021	C	`conf`	EKV MOS Transistor Model For Ultra Low-Voltage Bulk-Driven IC Design. DDECS Lukás Nagy, Daniel Arbet, Martin Kovác, Miroslav Potocný, Michal Sovcik, Viera Stopjaková
2021	—	`conf`	EKV Model for Bulk-Driven Circuit Design Using gmb/ID Method. AFRICON Lukás Nagy, Daniel Arbet, Martin Kovác, Miroslav Potocný, Róbert Ondica, Viera Stopjaková
2021	—	`conf`	Fully On-Chip Low-Drop Regulator for Low-Power Applications. MIPRO Daniel Arbet, Miroslav Potocný, Martin Kovác, Lukás Nagy, Viera Stopjaková
2021	J	`jnl`	Low-Voltage DC-DC Converter for IoT and On-Chip Energy Harvester Applications. Sensors Miroslav Potocný, Martin Kovác, Daniel Arbet, Michal Sovcik, Lukás Nagy, Viera Stopjaková, Richard Ravasz
2021	J	`jnl`	Maximum Power Point Tracking Circuit for an Energy Harvester in 130 nm CMOS Technology. CoRR Adam Hudec, Lukás Nagy, Martin Kovác, Viera Stopjaková
2021	J	`jnl`	RED-based Scheduler on Chip for Mixed-Criticality Real-Time Systems. CoRR Lukás Kohútka, Lukás Nagy, Viera Stopjaková
2020	—	`ed.`	30th International Conference Radioelektronika, RADIOELEKTRONIKA 2020, Bratislava, Slovakia, April 15-16, 2020 RADIOELEKTRONIKA Lukás Nagy, Viera Stopjaková
2020	C	`conf`	Dynamic Properties Of Ultra Low-Voltage Rail-to-Rail Comparator Designed In 130 nm CMOS Technology. DDECS Lukás Nagy, Daniel Arbet, Martin Kovác, Miroslav Potocný, Michal Sovcik, Viera Stopjaková
2020	—	`conf`	Low-Leakage ESD Structures in 130nm CMOS Technology. RADIOELEKTRONIKA Lukás Nagy, Ales Chvála, Viera Stopjaková
2020	—	`conf`	Multi-Topology DC-DC Converter for Low-Voltage Energy Harvesting Systems. MIPRO Martin Kovác, Daniel Arbet, Lukás Nagy, Michal Sovcik, Viera Stopjaková
2020	—	`conf`	RED-based Scheduler on Chip for Mixed-Criticality Real-Time Systems. MECO Lukás Kohútka, Lukás Nagy, Viera Stopjaková
2019	J	`jnl`	A Novel On-Chip Task Scheduler for Mixed-Criticality Real-Time Systems. J. Circuits Syst. Comput. Lukás Kohútka, Lukás Nagy, Viera Stopjaková
2019	J	`jnl`	Device and Circuit Models of Monolithic InAlN/GaN NAND and NOR Logic Cells Comprising D- and E-Mode HEMTs. J. Circuits Syst. Comput. Ales Chvála, Lukás Nagy, Juraj Marek, Juraj Priesol, Daniel Donoval, Alexander Satka, Michal Blaho, Dagmar Gregusová, Ján Kuzmík
2019	C	`conf`	Investigation of Low-Voltage, Sub-threshold Charge Pump with Parasitics Aware Design Methodology. DDECS Martin Kovác, Daniel Arbet, Viera Stopjaková, Michal Sovcik, Lukás Nagy
2019	C	`conf`	Low Latency Hardware-Accelerated Dynamic Memory Manager for Hard Real-Time and Mixed-Criticality Systems. DDECS Lukás Kohútka, Lukás Nagy, Viera Stopjaková
2019	—	`conf`	Neural Network for Circuit Models of Monolithic InAlN/GaN NAND and NOR Logic Gates. DTIS Ales Chvála, Lukás Nagy, Juraj Marek, Juraj Priesol, Daniel Donoval, Alexander Satka
2019	—	`conf`	Performance Analysis Of Ultra Low-Voltage Rail-to-Rail Comparator In 130 nm CMOS Technology. AFRICON Lukás Nagy, Daniel Arbet, Martin Kovác, Miroslav Potocný, Michal Sovcik, Viera Stopjaková
2019	—	`conf`	Towards Energy-autonomous Integrated Systems Through Ultra-low Voltage Analog IC Design. MIXDES Viera Stopjaková, Martin Kovác, Daniel Arbet, Lukás Nagy
2019	C	`conf`	Ultra Low-Voltage Rail-to-Rail Comparator Design in 130 nm CMOS Technology. DDECS Lukás Nagy, Daniel Arbet, Martin Kovác, Miroslav Potocný, Viera Stopjaková
2018	C	`conf`	A Novel Hardware-Accelerated Priority Queue for Real-Time Systems. DSD Lukás Kohútka, Lukás Nagy, Viera Stopjaková
2018	C	`conf`	Design and Performance Analysis of Ultra-Low Voltage Rail-to-Rail Comparator in 130 nm CMOS Technology. DDECS Lukás Nagy, Daniel Arbet, Martin Kovác, Miroslav Potocný, Viera Stopjaková
2018	—	`conf`	Device and circuit models of InAlN/GaN D- and dual-gate E-mode HEMTs for design and characterisation of monolithic NAND logic cell. DTIS Ales Chvála, Lukás Nagy, Juraj Marek, Juraj Priesol, Daniel Donoval, Alexander Satka, Michal Blaho, Dagmar Gregusová, Ján Kuzmík
2018	C	`conf`	Two-Stage Bulk-Driven Variable Gain Amplifier for Low-Voltage Applications. DDECS Daniel Arbet, Martin Kovác, Lukás Nagy, Viera Stopjaková, Michal Sovcik
2017	J	`jnl`	130 nm CMOS Bulk-Driven Variable Gain Amplifier for Low-Voltage Applications. J. Circuits Syst. Comput. Daniel Arbet, Viera Stopjaková, Martin Kovác, Lukás Nagy, Matej Rakus, Michal Sovcik
2017	J	`jnl`	A Novel Method Towards Time-Efficient Fault Analysis of Analog and Mixed-Signal Circuits. J. Circuits Syst. Comput. Juraj Brenkus, Viera Stopjaková, Viera Cernanová, Daniel Arbet, Lukás Nagy, Vladimír Sedlák
2017	—	`conf`	Low-power bulk-driven rail-to-rail comparator in 130 nm CMOS technology. AFRICON Lukás Nagy, Daniel Arbet, Martin Kovác, Viera Stopjaková
2016	C	`conf`	Impedance calculation based method for AC fault analysis of mixed-signal circuits. DDECS Juraj Brenkus, Viera Stopjaková, Lukás Nagy, Daniel Arbet
2016	C	`conf`	Low-voltage bulk-driven variable gain amplifier in 130 nm CMOS technology. DDECS Daniel Arbet, Martin Kovác, Lukás Nagy, Viera Stopjaková, Juraj Brenkus
2016	—	`conf`	Variable-gain amplifier for ultra-low voltage applications in 130nm CMOS technology. MIPRO Daniel Arbet, Martin Kovác, Lukás Nagy, Viera Stopjaková, Michal Sovcik
2015	C	`conf`	Design of In AlN/GaN Heterostructure-Based Logic Cells. DDECS Lukás Nagy, Viera Stopjaková, Alexander Satka
2015	—	`conf`	Readout interface for capacitive MEMS microphone in CMOS technology. MIXDES Daniel Arbet, Gabriel Nagy, Martin Kovác, Viera Stopjaková, Lukás Nagy
2014	—	`conf`	3-D electrothermal device/circuit simulation of DC-DC converter module in multi-die IC. ESSDERC Ales Chvála, Daniel Donoval, Lukás Nagy, Juraj Marek, Patrik Pribytny, Marian Molnar
2014	J	`jnl`	Current Sensing Completion Detection in Single-Rail Asynchronous Systems. Comput. Informatics Lukás Nagy, Viera Stopjaková, Juraj Brenkus
2014	A	`conf`	Novel architecture of a digital neuron for FFNN employing special multiplication. ECAI Roman Záluský, Daniela Duracková, Viera Stopjaková, Lukás Nagy, Vladimír Sedlák
2013	J	`jnl`	Completion detection in dual-rail asynchronous systems by current-sensing. Microelectron. J. Lukás Nagy, Viera Stopjaková, Roman Záluský
2012	C	`conf`	Current sensing completion detection in dual-rail asynchronous systems. DDECS Lukás Nagy, Viera Stopjaková
2011	C	`conf`	Current sensing methodology for completion detection in self-timed systems. DDECS Lukás Nagy, Viera Stopjaková
2010	C	`conf`	Current Sensing Completion Detection in deep sub-micron technologies. DDECS Lukás Nagy, Viera Stopjaková