Lukasz Szustak

47 papers B 1Journal 28Unranked 18

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	Evaluating AMD EPYC CPU architectures on CFD applications. Future Gener. Comput. Syst. Marcin Lawenda, Lukasz Szustak, László Környei, Flavio Cesar Cunha Galeazzo, Pawel Bratek
2025	—	`conf`	Advances in Adapting Memory-Bound CFD Computations to RISC-V Multicore Architecture. ICCS (3) Tomasz Olas, Lukasz Szustak, Roman Wyrzykowski, Mateusz Olas, Marco Lapegna
2025	J	`jnl`	Efficient allocation of image recognition and LLM tasks on multi-GPU system. CoRR Marcin Lawenda, Krzesimir Samborski, Kyrylo Khloponin, Lukasz Szustak
2025	J	`jnl`	Evaluating the impact of the L3 cache size of AMD EPYC CPUs on the performance of CFD applications. CoRR Marcin Lawenda, Lukasz Szustak, László Környei, Flavio Cesar Cunha Galeazzo, Pawel Bratek
2025	—	`conf`	Optimizing the DFS-based Strategy for Efficient Execution of Counting Queries in Machine Learning Applications. ISD Pawel Bratek, Lukasz Szustak
2025	J	`jnl`	Prediction model of performance-energy trade-off for CFD codes on AMD-based cluster. Future Gener. Comput. Syst. Marcin Lawenda, Lukasz Szustak, László Környei
2025	J	`jnl`	Profiling and Optimization of Multicard GPU Machine Learning Jobs. Concurr. Comput. Pract. Exp. Marcin Lawenda, Kyrylo Khloponin, Krzesimir Samborski, Lukasz Szustak
2025	J	`jnl`	Profiling and optimization of multi-card GPU machine learning jobs. CoRR Marcin Lawenda, Kyrylo Khloponin, Krzesimir Samborski, Lukasz Szustak
2024	—	`conf`	Efficient Allocation of Image Recognition and LLM Tasks on Multi-GPU System. PPAM (3) Marcin Lawenda, Krzesimir Samborski, Kyrylo Khloponin, Lukasz Szustak
2024	J	`jnl`	Large-Scale Parallelization of Human Migration Simulation. IEEE Trans. Comput. Soc. Syst. Derek Groen, Nikela Papadopoulou, Petros Anastasiadis, Marcin Lawenda, Lukasz Szustak, Sergiy Gogolenko, Hamid Arabnejad, Alireza Jahani
2024	J	`jnl`	Special Issue on the pervasive nature of HPC (PN-HPC). Concurr. Comput. Pract. Exp. Marco Lapegna, Valeria Mele, Raffaele Montella, Lukasz Szustak
2023	—	`conf`	Parallel Auto-Scheduling of Counting Queries in Machine Learning Applications on HPC Systems. Euro-Par Workshops Pawel Bratek, Lukasz Szustak, Jaroslaw Zola
2023	J	`jnl`	Profiling and optimization of Python-based social sciences applications on HPC systems by means of task and data parallelism. Future Gener. Comput. Syst. Lukasz Szustak, Marcin Lawenda, Sebastian Arming, Gregor Bankhamer, Christoph Schweimer, Robert Elsässer
2023	J	`jnl`	Reducing energy consumption using heterogeneous voltage frequency scaling of data-parallel applications for multicore systems. J. Parallel Distributed Comput. Pawel Bratek, Lukasz Szustak, Roman Wyrzykowski, Tomasz Olas
2022	J	`jnl`	Performance exploration of various C/C++ compilers for AMD EPYC processors in numerical modeling of solidification. Adv. Eng. Softw. Kamil Halbiniak, Roman Wyrzykowski, Lukasz Szustak, Adam Kulawik, Norbert Meyer, Pawel Gepner
2021	J	`jnl`	About the granularity portability of block-based Krylov methods in heterogeneous computing environments. Concurr. Comput. Pract. Exp. Luisa Carracciuolo, Valeria Mele, Lukasz Szustak
2021	J	`jnl`	Architectural Adaptation and Performance-Energy Optimization for CFD Application on AMD EPYC Rome. IEEE Trans. Parallel Distributed Syst. Lukasz Szustak, Roman Wyrzykowski, Lukasz Kuczynski, Tomasz Olas
2021	J	`jnl`	Dynamic workload prediction and distribution in numerical modeling of solidification on multi-/manycore architectures. Concurr. Comput. Pract. Exp. Kamil Halbiniak, Tomasz Olas, Lukasz Szustak, Adam Kulawik, Marco Lapegna
2021	J	`jnl`	Exploration of OpenCL Heterogeneous Programming for Porting Solidification Modeling to CPU-GPU Platforms. Concurr. Comput. Pract. Exp. Kamil Halbiniak, Lukasz Szustak, Tomasz Olas, Roman Wyrzykowski, Pawel Gepner
2021	—	`conf`	Heterogeneous Voltage Frequency Scaling of Data-Parallel Applications for Energy Saving on Homogeneous Multicore Platforms. Euro-Par Workshops Pawel Bratek, Lukasz Szustak, Roman Wyrzykowski, Tomasz Olas, Tomasz Chmiel
2021	—	`conf`	Parallelization and Auto-scheduling of Data Access Queries in ML Workloads. Euro-Par Workshops Pawel Bratek, Lukasz Szustak, Jaroslaw Zola
2020	J	`jnl`	Correlation of Performance Optimizations and Energy Consumption for Stencil-Based Application on Intel Xeon Scalable Processors. IEEE Trans. Parallel Distributed Syst. Lukasz Szustak, Roman Wyrzykowski, Tomasz Olas, Valeria Mele
2020	J	`jnl`	Performance enhancement of a dynamic K-means algorithm through a parallel adaptive strategy on multicore CPUs. J. Parallel Distributed Comput. Giuliano Laccetti, Marco Lapegna, Valeria Mele, Diego Romano, Lukasz Szustak
2019	—	`conf`	Performance Optimizations for Parallel Modeling of Solidification with Dynamic Intensity of Computation. PPAM (1) Kamil Halbiniak, Lukasz Szustak, Adam Kulawik, Pawel Gepner
2019	J	`jnl`	Performance portable parallel programming of heterogeneous stencils across shared-memory platforms with modern Intel processors. Int. J. High Perform. Comput. Appl. Lukasz Szustak, Pawel Bratek
2019	—	`conf`	Toward Heterogeneous MPI+MPI Programming: Comparison of OpenMP and MPI Shared Memory Models. Euro-Par Workshops Lukasz Szustak, Roman Wyrzykowski, Kamil Halbiniak, Pawel Bratek
2019	J	`jnl`	Unleashing the performance of ccNUMA multiprocessor architectures in heterogeneous stencil computations. J. Supercomput. Lukasz Szustak, Kamil Halbiniak, Roman Wyrzykowski, Ondrej Jakl
2018	J	`jnl`	Assessment of offload-based programming environments for hybrid CPU-MIC platforms in numerical modeling of solidification. Simul. Model. Pract. Theory Kamil Halbiniak, Roman Wyrzykowski, Lukasz Szustak, Tomasz Olas
2018	—	`conf`	How Pre-multicore Methods and Algorithms Perform in Multicore Era. ISC Workshops Alexey L. Lastovetsky, Muhammad Fahad, Hamidreza Khaleghzadeh, Semyon Khokhriakov, Ravi Reddy, Arsalan Shahid, Lukasz Szustak, Roman Wyrzykowski
2018	J	`jnl`	Porting and optimization of solidification application for CPU-MIC hybrid platforms. Int. J. High Perform. Comput. Appl. Lukasz Szustak, Kamil Halbiniak, Lukasz Kuczynski, Joanna Wróbel, Adam Kulawik
2018	J	`jnl`	Strategy for data-flow synchronizations in stencil parallel computations on multi-/manycore systems. J. Supercomput. Lukasz Szustak
2017	B	`conf`	Islands-of-Cores Approach for Harnessing SMP/NUMA Architectures in Heterogeneous Stencil Computations. PaCT Lukasz Szustak, Roman Wyrzykowski, Ondrej Jakl
2017	J	`jnl`	Model-Based Optimization of EULAG Kernel on Intel Xeon Phi Through Load Imbalancing. IEEE Trans. Parallel Distributed Syst. Alexey L. Lastovetsky, Lukasz Szustak, Roman Wyrzykowski
2016	—	`conf`	Network-Aware Optimization of MPDATA on Homogeneous Multi-core Clusters with Heterogeneous Network. ICA3PP Workshops Tania Malik, Lukasz Szustak, Roman Wyrzykowski, Alexey L. Lastovetsky
2016	—	`conf`	Using hStreams Programming Library for Accelerating a Real-Life Application on Intel MIC. ICA3PP Workshops Lukasz Szustak, Kamil Halbiniak, Adam Kulawik, Roman Wyrzykowski, Piotr Uminski, Marcin Sasinowski
2015	J	`jnl`	Adaptation of MPDATA Heterogeneous Stencil Computation to Intel Xeon Phi Coprocessor. Sci. Program. Lukasz Szustak, Krzysztof Rojek, Tomasz Olas, Lukasz Kuczynski, Kamil Halbiniak, Pawel Gepner
2015	J	`jnl`	Adaptation of fluid model EULAG to graphics processing unit architecture. Concurr. Comput. Pract. Exp. Krzysztof Andrzej Rojek, Milosz Ciznicki, Bogdan Rosa, Piotr Kopta, Michal Kulczewski, Krzysztof Kurowski, Zbigniew Pawel Piotrowski, Lukasz Szustak, Damian Karol Wójcik, Roman Wyrzykowski
2015	J	`jnl`	Model-based optimization of MPDATA on Intel Xeon Phi through load imbalancing. CoRR Alexey L. Lastovetsky, Lukasz Szustak, Roman Wyrzykowski
2015	—	`conf`	Toward Parallel Modeling of Solidification Based on the Generalized Finite Difference Method Using Intel Xeon Phi. PPAM (1) Lukasz Szustak, Kamil Halbiniak, Adam Kulawik, Joanna Wróbel, Pawel Gepner
2014	J	`jnl`	Parallelization of 2D MPDATA EULAG algorithm on hybrid architectures with GPU accelerators. Parallel Comput. Roman Wyrzykowski, Lukasz Szustak, Krzysztof Rojek
2013	—	`conf`	Performance Analysis for Stencil-Based 3D MPDATA Algorithm on GPU Architecture. PPAM (1) Krzysztof Rojek, Lukasz Szustak, Roman Wyrzykowski
2013	—	`conf`	Towards Efficient Decomposition and Parallelization of MPDATA on Hybrid CPU-GPU Cluster. LSSC Roman Wyrzykowski, Lukasz Szustak, Krzysztof Rojek, Adam Tomas
2013	—	`conf`	Using Intel Xeon Phi Coprocessor to Accelerate Computations in MPDATA Algorithm. PPAM (1) Lukasz Szustak, Krzysztof Rojek, Pawel Gepner
2012	J	`jnl`	Model-driven adaptation of double-precision matrix multiplication to the Cell processor architecture. Parallel Comput. Roman Wyrzykowski, Krzysztof Rojek, Lukasz Szustak
2011	—	`conf`	Parallelization of EULAG Model on Multicore Architectures with GPU Accelerators. PPAM (2) Krzysztof Rojek, Lukasz Szustak
2011	—	`conf`	Using Blue Gene/P and GPUs to Accelerate Computations in the EULAG Model. LSSC Roman Wyrzykowski, Krzysztof Rojek, Lukasz Szustak
2009	—	`conf`	Adaptation of Double-Precision Matrix Multiplication to the Cell Broadband Engine Architecture. PPAM (1) Krzysztof Rojek, Lukasz Szustak