Luka Daoud - RankMe

19 papers A 2C 1Misc 1Journal 4Unranked 11

Year	Rank	Type	Title / Venue / Authors
2022	J	`jnl`	Efficient mitigation technique for Black Hole router attack in Network-on-Chip. Microprocess. Microsystems Luka Daoud, Nader Rafla
2022	—	`conf`	Energy-Efficient Black Hole Router Detection in Network-on-Chip. SOCC Luka Daoud, Nader Rafla
2020	J	`jnl`	A fully pipelined FPGA accelerator for scale invariant feature transform keypoint descriptor matching, . CoRR Luka Daoud, Muhammad Kamran Latif, H. S. Jacinto, Nader Rafla
2020	J	`jnl`	A fully pipelined FPGA accelerator for scale invariant feature transform keypoint descriptor matching. Microprocess. Microsystems Luka Daoud, Muhammad Kamran Latif, H. S. Jacinto, Nader Rafla
2020	J	`jnl`	A reconfigurable HexCell-based systolic array architecture for evolvable hardware on FPGA. Microprocess. Microsystems Fady Hussein, Luka Daoud, Nader Rafla
2019	—	`conf`	Analysis of Black Hole Router Attack in Network-on-Chip. MWSCAS Luka Daoud, Nader Rafla
2019	—	`conf`	Detection and prevention protocol for black hole attack in network-on-chip. NOCS Luka Daoud, Nader Rafla
2019	Misc	`conf`	Optimization of Advanced Encryption Standard (AES) Using Vivado High Level Synthesis (HLS). CATA Luka Daoud, Fady Hussein, Nader Rafla
2019	—	`conf`	Runtime Packet-Dropping Detection of Faulty Nodes in Network-on-Chip. SoCC Luka Daoud, Nader Rafla
2018	A	`conf`	HexCell: a Hexagonal Cell for Evolvable Systolic Arrays on FPGAs: (Abstract Only). FPGA Fady Hussein, Luka Daoud, Nader Rafla
2018	—	`conf`	Optimization of a Quantum-Secure Sponge-Based Hash Message Authentication Protocol. MWSCAS Muhammad Kamran Latif, H. S. Jacinto, Luka Daoud, Nader Rafla
2018	—	`conf`	Real-time Bitstream Decompression Scheme for FPGAs Reconfiguration. MWSCAS Luka Daoud, Fady Hussein, Nader Rafla
2018	—	`conf`	Routing Aware and Runtime Detection for Infected Network-on-Chip Routers. MWSCAS Luka Daoud, Nader Rafla
2018	A	`conf`	SIFT Keypoint Descriptor Matching Algorithm: A Fully Pipelined Accelerator on FPGA(Abstract Only). FPGA Luka Daoud, Muhammad Kamran Latif, Nader Rafla
2018	—	`conf`	Secure Network-on-Chip Architectures for MPSoC: Overview and Challenges. MWSCAS Luka Daoud
2017	—	`conf`	High level synthesis using vivado HLS for optimizations of SHA-3. MWSCAS H. S. Jacinto, Luka Daoud, Nader Rafla
2016	—	`conf`	Zynq-based SoC implementation of an induction machine control algorithm. MWSCAS Danyal Mohammadi, Luka Daoud, Nader Rafla, Said Ahmed-Zaid
2014	C	`conf`	A Survey on Design and Implementation of Floating Point Adder in FPGA. ICSEng Luka Daoud, Dawid Zydek, Henry Selvaraj
2013	—	`conf`	A Survey of High Level Synthesis Languages, Tools, and Compilers for Reconfigurable High Performance Computing. ICSS Luka Daoud, Dawid Zydek, Henry Selvaraj