Luis Villa

13 papers A 1C 2Journal 4Unranked 6
YearRankTypeTitle / Venue / Authors
2023 — conf
Sargantana: An Academic SoC RISC-V Processor in 22nm FDSOI Technology.
DCIS
Max Doblas, Gerard Candón, Xavier Carril, Marc Domínguez, Enric Erra, Alberto González, César Hernández, Víctor Jiménez, Vatistas Kostalampros, Rubén Langarita, Neiel Leyva, Guillem López-Paradís, Jonnatan Mendoza, Josep Oltra, Julián Pavón, Cristóbal Ramírez, Narcís Rodas, Enrico Reggiani, Mario Rodríguez, Carlos Rojas, Abraham Ruiz, Hugo Safadi, Víctor Soria, Alejandro Suanes, Iván Vargas, Fernando Arreza, Roger Figueras, Pau Fontova-Musté, Joan Marimon, Ricardo Martínez, Sergio Moreno, Jordi Sacristán, Oscar Alonso, Xavier Aragonès, Adrián Cristal, Ángel Diéguez, Manuel López, Diego Mateo, Francesc Moll, Miquel Moretó, Oscar Palomar, Marco A. Ramírez, Francisco Serra-Graells, Nehir Sönmez, Lluís Terés, Osman S. Unsal, Mateo Valero, Luis Villa
2022 — conf
DVINO: A RISC-V Vector Processor Implemented in 65nm Technology.
DCIS
Guillem Cabo, Gerard Candón, Xavier Carril, Max Doblas, Marc Domínguez, Alberto González, César Hernández, Víctor Jiménez, Vatistas Kostalampros, Rubén Langarita, Neiel Leyva, Guillem López-Paradís, Jonnatan Mendoza, Francesco Minervini, Julián Pavón, Cristóbal Ramírez, Narcís Rodas, Enrico Reggiani, Mario Rodríguez, Carlos Rojas, Abraham Ruiz, Víctor Soria, Alejandro Suanes, Iván Vargas, Roger Figueras, Pau Fontova, Joan Marimon, Víctor Montabes, Adrián Cristal, Carles Hernández, Ricardo Martínez, Miquel Moretó, Francesc Moll, Oscar Palomar, Marco A. Ramírez, Antonio Rubio, Jordi Sacristán, Francisco Serra-Graells, Nehir Sönmez, Lluís Terés, Osman S. Unsal, Mateo Valero, Luis Villa
2020 — conf
An Academic RISC-V Silicon Implementation Based on Open-Source Components.
DCIS
Jaume Abella, Calvin Bulla, Guillem Cabo, Francisco J. Cazorla, Adrián Cristal, Max Doblas, Roger Figueras, Alberto González, Carles Hernández, César Hernández, Víctor Jiménez, Leonidas Kosmidis, Vatistas Kostalabros, Rubén Langarita, Neiel Leyva, Guillem López-Paradís, Joan Marimon, Ricardo Martínez, Jonnatan Mendoza, Francesc Moll, Miquel Moretó, Julián Pavón, Cristóbal Ramírez, Marco Antonio Ramírez, Carlos Rojas Morales, Antonio Rubio, Abraham Ruiz, Nehir Sönmez, Víctor Soria, Lluís Terés, Osman S. Unsal, Mateo Valero, Iván Vargas Valdivieso, Luis Villa
2009 J jnl
Combinatorial Fuzzy Logic Controller Design.
Res. Comput. Sci.
Arturo Téllez-Velázquez, Herón Molina-Lozano, Luis Villa, Oscar Camacho-Nieto, Romeo P. Urbieta
2005 C conf
A New Pointer-based Instruction Queue Design and Its Power-Performance Evaluation.
ICCD
Marco Antonio Ramírez, Adrián Cristal, Mateo Valero, Alexander V. Veidenbaum, Luis Villa
2005 J jnl
Register file optimization for low power using the zero detect technique.
Res. Comput. Sci.
Luis Villa, Moisés A. Zárate, Oscar Camacho-Nieto, Osvaldo Espinosa-Sosa
2004 J jnl
A partitioned instruction queue to reduce instruction wakeup energy.
Int. J. High Perform. Comput. Netw.
Marco Antonio Ramírez, Adrián Cristal, Mateo Valero, Alexander V. Veidenbaum, Luis Villa
2004 J jnl
Instructions-Wake-Up mechanism: Power and Timing Evaluation.
Res. Comput. Sci.
Adrián Cristal, Alexander V. Veidenbaum, Luis Villa, Marco A. Ramírez, Mateo Valero
2003 — conf
A Simple Low-Energy Instruction Wakeup Mechanism.
ISHPC
Marco Antonio Ramírez, Adrián Cristal, Alexander V. Veidenbaum, Luis Villa, Mateo Valero
1998 A conf
A Performance Study of Out-of-order Vector Architectures and Short Registers.
International Conference on Supercomputing
Luis Villa, Roger Espasa, Mateo Valero
1998 C conf
Effective usage of vector registers in decoupled vector architectures.
PDP
Luis Villa, Roger Espasa, Mateo Valero
1998 — conf
Registers Size Influence on Vector Architectures.
VECPAR
Luis Villa, Roger Espasa, Mateo Valero
1997 — conf
Effective Usage of Vector Registers in Advanced Vector Architectures.
IEEE PACT
Luis Villa, Roger Espasa, Mateo Valero