Luis Hernández

84 papers C 27Journal 23Unranked 34

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	Compensation Techniques for Frequency and Gain Temperature Drift in Open-Loop VCO-ADCs. IEEE Trans. Circuits Syst. II Express Briefs Javier Granizo, Rubén Garvi, Victor Medina, Andrés Quintero, Andreas Wiesbauer, Luis Hernández
2025	C	`conf`	A State-Space Model for the Analysis of VCO-Based Filters using PFM. ISCAS Simon Ooghe, Luis Hernández, Johan Raman, Pieter Rombouts
2025	C	`conf`	Analysis of Clock Jitter in VCO-ADCs Under Presence of Mismatch and Blocking Signals. ISCAS Javier Granizo, Victor Medina, Luis Hernández, Rubén Garvi
2025	J	`jnl`	Analysis of Clock Jitter in VCO-ADCs Under Presence of Mismatch and Blocking Signals. IEEE Trans. Circuits Syst. II Express Briefs Javier Granizo, Rubén Garvi, Victor Medina, Luis Hernández
2025	C	`conf`	Explaining Sigma-Delta Modulators with Pulse Frequency Modulation. ISCAS Victor Medina, Pieter Rombouts, Luis Hernández
2025	J	`jnl`	LIF Neuron Based on a Charge-Powered Ring Oscillator in Weak Inversion Achieving 201 fJ/SOP. IEEE Solid State Circuits Lett. Javier Granizo, Rubén Garvi, Ricardo Carrero, Luis Hernández
2024	C	`conf`	A Scalable and PVT Invariant Spiking Neuron Using Asynchronous CMOS Logic. ISCAS Dante Loi, Javier Granizo, Luis Hernández
2024	J	`jnl`	A Second-Order Audio VCO-ADC with 103-dB-A Dynamic Range and Binary-Weighted Internal Architecture. CoRR Victor Medina, Rubén Garvi, Javier Granizo, Pedro Amaral, Luis Hernández
2024	J	`jnl`	Analysis of VCO-Based Continuous-Time ΣΔ ADCs Using a Subset of Phases as the Feedback Signal. IEEE Trans. Circuits Syst. II Express Briefs Victor Medina, Leidy Mabel Alvero-Gonzalez, Eric Gutierrez, Luis Hernández, Susana Patón
2023	C	`conf`	A CMOS LIF neuron based on a charge-powered oscillator with time-domain threshold logic. ISCAS Javier Granizo, Rubén Garvi, Diego Garcia, Luis Hernández
2023	J	`jnl`	A Different View of Sigma-Delta Modulators Under the Lens of Pulse Frequency Modulation. CoRR Victor Medina, Pieter Rombouts, Luis Hernández
2023	J	`jnl`	A Gray-Encoded Ring Oscillator for Efficient Frequency-to-Digital Conversion in VCO-Based ADCs. IEEE Trans. Circuits Syst. II Express Briefs Victor Medina, Rubén Garvi, Eric Gutierrez, Susana Patón, Luis Hernández
2023	J	`jnl`	A VCO-ADC Linearized by a Capacitive Frequency-to-Current Converter. IEEE Trans. Circuits Syst. II Express Briefs Rubén Garvi, Javier Granizo, Eric Gutierrez, Victor Medina, Andreas Wiesbauer, Luis Hernández
2023	J	`jnl`	A VCO-Based ADC With Inherent Mixing Capability and Local Oscillator Suppression in 55-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs Victor Medina, Rubén Garvi, Eric Gutierrez, Luis Hernández
2023	C	`conf`	Analysis of in-band Spurious Tones of VCO-based Analog Filters and Mitigation Techniques. ISCAS Victor Medina, Dante Loi, Pieter Rombouts, Luis Hernández
2023	—	`conf`	Validation of a CMOS SNN network based on a time-domain threshold neuron circuit achieving 114.90 pJ/inference on MNIST. AICAS Diego Garcia, Javier Granizo, Luis Hernández
2022	—	`conf`	A 55nm CMOS Linearized Oscillator for Audio VCO-ADCs achieving 78dBA of SNDR with $153\mu \mathrm{W}$. ICECS 2022 Rubén Garvi, Javier Granizo, Angel Salvador, Luis Hernández
2022	C	`conf`	A Phase-Encoded Voice Features Extraction Circuit Using Digital Mixers and Analog Filters based on Ring Oscillators. ISCAS Rubén Garvi, Eric Gutierrez, Victor Medina, Luis Hernández
2022	C	`conf`	A maximally-digital VCO-ADC with inherent mixing input capability. ISCAS Victor Medina, Rubén Garvi, Eric Gutierrez, Luis Hernández
2022	C	`conf`	Optimal reconfiguration instant in ΣΔ Modulators. ISCAS Pablo Vera, Dietmar Straeussnigg, Victor Medina, Luis Hernández, Susana Patón
2021	J	`jnl`	A 73dB-A Audio VCO-ADC Based on a Maximum Length Sequence Generator in 130nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs Carlos Perez, Andrés Quintero, Pedro Amaral, Andreas Wiesbauer, Luis Hernández
2020	C	`conf`	A Model of Continuous-Time Sigma Delta Modulation Based on Pulse Frequency Encoding. ISCAS Victor Medina, Susana Patón, Eric Gutierrez, Luis Hernández
2020	C	`conf`	Clock Jitter Analysis of Continuous-Time ΣΔ Modulators Based on a Relative Time-Base Projection. ISCAS Fernando Cardes, Victor Medina, Susana Patón, Luis Hernández
2020	—	`conf`	Low Power Phase-Encoded MAC Accelerator for Smart Sensors with VCO-based ADCs. MWSCAS Eric Gutierrez, Carlos Perez, Susana Patón, Luis Hernández
2020	C	`conf`	VCO-ADC Linearization by Switched Capacitor Frequency-to-Current Conversion. ISCAS Rubén Garvi, Leidy Mabel Alvero-Gonzalez, Carlos Perez, Eric Gutierrez, Luis Hernández
2019	J	`jnl`	A Pulse Frequency Modulation VCO-ADC in 40 nm. IEEE Trans. Circuits Syst. II Express Briefs Eric Gutierrez, Carlos Perez, Luis Hernández, Fernando Cardes, Violeta Petrescu, Sergio Walter, Ulrich Gaier
2019	J	`jnl`	A VCO-Based CMOS Readout Circuit for Capacitive MEMS Microphones. Sensors Andrés Quintero, Fernando Cardes, Carlos Perez, Cesare Buffa, Andreas Wiesbauer, Luis Hernández
2019	J	`jnl`	Clock Jitter Analysis of Continuous-Time ΣΔ Modulators Based on a Relative Time-Base Projection. IEEE Trans. Circuits Syst. I Regul. Pap. Fernando Cardes, Victor Medina, Susana Patón, Luis Hernández
2019	—	`conf`	Continuous Time Sigma-Delta Modulator with VCO-based integrators and optimized NTF zeros. ICECS Victor Medina, Leidy Mabel Alvero-Gonzalez, Eric Gutierrez, Susana Patón, Luis Hernández
2019	—	`conf`	Resolution Enhancement of VCO-based ADCs by Passive Interpolation and Phase Injection. DCIS Leidy Mabel Alvero-Gonzalez, Luis Hernández, Eric Gutierrez
2019	C	`conf`	VCO-ADCs with a Quadrature Band-Pass Noise-Transfer-Function. ISCAS Eric Gutierrez, Leidy Mabel Alvero-Gonzalez, Luis Hernández, Pieter Rombouts
2019	—	`conf`	VCO-based Feature Extraction Architecture for Low Power Speech Recognition Applications. MWSCAS Eric Gutierrez, Carlos Perez, Fernando Hernandez, Luis Hernández
2018	J	`jnl`	0.04-mm IEEE J. Solid State Circuits Fernando Cardes, Eric Gutierrez, Andrés Quintero, Cesare Buffa, Andreas Wiesbauer, Luis Hernández
2018	—	`conf`	A Highly Linear Ring Oscillator for VCO-based ADCs in 65-nm CMOS. ICECS Leidy Mabel Alvero-Gonzalez, Eric Gutierrez, Luis Hernández
2018	J	`jnl`	A Pulse Frequency Modulation Interpretation of VCOs Enabling VCO-ADC Architectures With Extended Noise Shaping. IEEE Trans. Circuits Syst. I Regul. Pap. Eric Gutierrez, Luis Hernández, Fernando Cardes, Pieter Rombouts
2018	—	`conf`	Optimal NTF zero placement in MASH VCO-ADCs with higher order noise shaping. ICECS Eric Gutierrez, Luis Hernández, Susana Patón, Pieter Rombouts
2018	J	`jnl`	SNDR Limits of Oscillator-Based Sensor Readout Circuits. Sensors Fernando Cardes, Andrés Quintero, Eric Gutierrez, Cesare Buffa, Andreas Wiesbauer, Luis Hernández
2018	C	`conf`	VCO-ADC Resolution Enhancement Using Maximum Length Sequences. ISCAS Luis Hernández, Enrique Prefasi, Susana Patón, Eric Gutierrez
2018	—	`conf`	Why and How VCO-based ADCs can improve instrumentation applications. ICECS Eric Gutierrez, Pieter Rombouts, Luis Hernández
2017	—	`conf`	Noise-shaping time-interleaved ADC based on a single ring oscillator and a sampling array. MWSCAS Andrés Quintero, Carlos Perez, Eric Gutierrez, Luis Hernández, Susana Patón
2016	C	`conf`	Frequency-encoded integrators applied to filtering and sigma-delta modulation. ISCAS Luis Hernández, Eric Gutierrez, Fernando Cardes
2015	C	`conf`	A MEMS microphone interface based on a CMOS LC oscillator and a digital sigma-delta modulator. ISCAS Fernando Cardes, Ruzica Jevtic, Luis Hernández, Andreas Wiesbauer, Dietmar Sträußnigg, Richard Gaggl
2015	—	`conf`	A noise coupled ΣΔ architecture using a Non Uniform Quantizer. NORCAS Juan A. Torreño, Susana Patón, Laura Conesa-Peraleja, Luis Hernández, Dietmar Straeussnigg
2015	J	`jnl`	Analytical Evaluation of VCO-ADC Quantization Noise Spectrum Using Pulse Frequency Modulation. IEEE Signal Process. Lett. Luis Hernández, Eric Gutierrez
2015	C	`conf`	Spectral analysis of multibit VCO-ADCs and PFM-ADCs with sinusoidal inputs. ISCAS Eric Gutierrez, Luis Hernández
2014	—	`conf`	A 0.03mm ICECS Enrique Prefasi, Eric Gutierrez, Luis Hernández, Susana Patón, Sergio Walter, Ulrich Gaier
2014	—	`conf`	A digitally corrected ADC using a passive pulse frequency modulator. ICECS Eric Gutierrez, Luis Hernández, Ulrich Gaier, Sergio Walter, Liang Zou
2014	—	`conf`	A low power and low distortion VCO based ADC using a pulse frequency modulator. MWSCAS Eric Gutierrez, Luis Hernández, Ulrich Gaier, Sergio Walter, Liang Zou
2014	—	`conf`	A time-encoding CMOS capacitive sensor readout circuit with flicker noise reduction. MWSCAS Fernando Cardes, Luis Hernández, Javier Escobar, Andreas Wiesbauer, Dietmar Straeussnigg, Richard Gaggl
2013	C	`conf`	A distortion corrected passive RC noise shaping ADC for biomedical applications. ISCAS Luis Hernández, Enrique Prefasi, Susana Patón
2013	C	`conf`	A multi-stage and time-based continuous time ΣΔ Architecture using a Gated Ring Oscillator. ISCAS Juan A. Torreño, Susana Patón, Luis Hernández, Enrique Prefasi, M. Presicce, G. Paoli
2012	—	`conf`	Analysis of VCO based noise shaping ADCs linearized by PWM modulation. ICECS Luis Hernández, Enrique Prefasi, Susana Patón, Pieter Rombouts
2011	—	`conf`	1.4V 13μW 83dB DR CT-ΣΔ modulator with Dual-Slope quantizer and PWM DAC for biopotential signal acquisition. ESSCIRC Francesco Cannillo, Enrique Prefasi, Luis Hernández, Ernesto Pun, Refet Firat Yazicioglu, Chris Van Hoof
2011	J	`jnl`	A 7 mW 20 MHz BW Time-Encoding Oversampling Converter Implemented in a 0.08 mm IEEE J. Solid State Circuits Enrique Prefasi, Susana Patón, Luis Hernández
2010	—	`conf`	A 0.08 mm2, 7mW Time-Encoding Oversampling Converter with 10 bits and 20MHz BW in 65nm CMOS. ESSCIRC Enrique Prefasi, Susana Patón, Luis Hernández, Richard Gaggl, Andreas Wiesbauer, Jörg Hauptmann
2010	C	`conf`	A time encoded decimation filter for noise shaped power DACs. ISCAS Luis Hernández, Jorge Fernández, Enrique Prefasi, Susana Patón
2010	C	`conf`	Continuous Time Cascade Sigma Delta Modulator without digital cancellation filters. ISCAS Susana Patón, Juan A. Torreño, Enrique Prefasi, Luis Hernández
2010	C	`conf`	Exploiting time resolution in nanometre CMOS data converters. ISCAS Luis Hernández, Andreas Wiesbauer
2009	J	`jnl`	A 0.1 mm IEEE J. Solid State Circuits Enrique Prefasi, Luis Hernández, Susana Patón, Andreas Wiesbauer, Richard Gaggl, Ernesto Pun
2009	J	`jnl`	A 1.2-MHz 10-bit Continuous-Time Sigma-Delta ADC Using a Time Encoding Quantizer. IEEE Trans. Circuits Syst. II Express Briefs Luis Hernández, Enrique Prefasi, Ernesto Pun, Susana Patón
2009	—	`conf`	Second-order multi-bit ΣΔ ADC using a Pulse-Width Modulated DAC and an integrating quantizer. ICECS Enrique Prefasi, Ernesto Pun, Luis Hernández, Susana Patón
2008	—	`conf`	A one-path quadrature bandpass ΣΔ modulator based on distributed resonators at 25 MHz IF. ICECS Enrique Prefasi, Stijn Reekmans, Luis Hernández
2008	C	`conf`	A subsampling bandpass SigmaDelta modulator with lumped and distributed resonators. ISCAS Luis Hernández, Enrique Prefasi
2008	—	`conf`	An A/D converter based on pulse width modulation and the walsh-hadamard transform. ICECS Luis Hernández, Susana Patón, Enrique Prefasi
2008	J	`jnl`	Analog-to-Digital Conversion Using Noise Shaping and Time Encoding. IEEE Trans. Circuits Syst. I Regul. Pap. Luis Hernández, Enrique Prefasi
2008	—	`conf`	Resolution enhancement of sigma-delta modulators using a tracking digital filter. ICECS Luis Hernández, Susana Patón
2007	J	`jnl`	A Subsampling Quadrature Σ∆ Modulator Based on Distributed Resonators for Use in Radio Receiver. IEEE Trans. Circuits Syst. II Express Briefs Stijn Reekmans, Luis Hernández, Enrique Prefasi
2006	—	`conf`	A 2-2 Discrete Time Cascaded ΣΔ Modulator With NTF Zero Using Interstage Feedback. ICECS Manuel Sanchez-Renedo, Susana Patón, Luis Hernández
2006	C	`conf`	A continuous-time band-pass Sigma Delta modulator implemented in 0.35µm BiCMOS using transmission lines. ISCAS Luis Hernández, Enrique Prefasi, Pieter Rombouts
2006	—	`conf`	Analog to digital conversion using a Pulse Width Modulator and an irregular sampling decoder. ICECS Luis Hernández, Enrique Prefasi
2006	C	`conf`	Clock jitter compensation for current steering DACs. ISCAS Andreas Wiesbauer, Dietmar Sträußnigg, Richard Gaggl, Martin Clara, Luis Hernández, Daniel Gruber
2006	—	`conf`	Design of Cascaded Continuous-Time Sigma-Delta Modulators. ICECS Susana Patón, Manuel Sanchez-Renedo, Luis Hernández, Enrique Prefasi, Andreas Wiesbauer, Antonio Di Giandomenico, David San Segundo
2006	C	`conf`	Spectral shaping of clock jitter errors for continuous time sigma-delta modulators. ISCAS Luis Hernández, Susana Patón, Andreas Wiesbauer
2005	—	`conf`	Synthesis of sigma delta modulators employing continuous time delays. ISCAS (4) Luis Hernández, Enrique Prefasi, Susana Patón, Pieter Rombouts
2004	J	`jnl`	A 70-mW 300-MHz CMOS continuous-time ΣΔ ADC with 15-MHz bandwidth and 11 bits of resolution. IEEE J. Solid State Circuits Susana Patón, Antonio Di Giandomenico, Luis Hernández, Andreas Wiesbauer, Thomas Pötscher, Martin Clara
2004	—	`conf`	A jitter insensitive continuous-time ΣΔ modulator using transmission lines. ICECS Luis Hernández, Pieter Rombouts, Enrique Prefasi, Susana Patón, Mario Garcia, Celia López
2004	—	`conf`	Linearity enhancement techniques in low OSR, high clock rate multi-bit continuous-time sigma-delta modulators. CICC Susana Patón, Thomas Pötscher, Antonio Di Giandomenico, Klaus Kolhaupt, Luis Hernández, Andreas Wiesbauer, Martin Clara, Ramon Frutos
2004	—	`conf`	Modelling and optimization of low pass continuous-time sigma delta modulators for clock jitter noise reduction. ISCAS (1) Luis Hernández, Andreas Wiesbauer, Susana Patón, Antonio Di Giandomenico
2003	—	`conf`	A 15 MHz bandwidth sigma-delta ADC with 11 bits of resolution in 0.13μm CMOS. ESSCIRC Antonio Di Giandomenico, Susana Patón, Andreas Wiesbauer, Luis Hernández, Thomas Pötscher, Lukas Dörrer
2003	—	`conf`	Continuous time sigma-delta modulators with transmission line resonators and improved jitter and excess loop delay performance. ISCAS (1) Luis Hernández, Susana Patón
2002	—	`conf`	A superregenerative receiver for phase and frequency modulated carriers. ISCAS (3) Luis Hernández, Susana Patón
2000	C	`conf`	Continuous-time noise-shaping modulators with delay elements. ISCAS Luis Hernández
1999	—	`conf`	A continuous-time noise-shaping modulator for logarithmic A/D conversion. ISCAS (2) Luis Hernández, Susana Patón
1998	—	`conf`	Programmable sine wave generator employing a mismatch-shaping DAC. ICECS Luis Hernández, Alejandro Quesada