Luca Giancane

15 papers A 1C 4Journal 5Unranked 5
YearRankTypeTitle / Venue / Authors
2023 — conf
Adaptive Pre-Processing for Neural Network Hardware Deployment.
MLSP
Dario Del Gaizo, Francesco De Palo, Fabio Cipriani, Luca Giancane
2012 J jnl
A Flip-Flop for the DPA Resistant Three-Phase Dual-Rail Pre-Charge Logic Family.
IEEE Trans. Very Large Scale Integr. Syst.
Marco Bucci, Luca Giancane, Raimondo Luzzi, Alessandro Trifiletti
2011 J jnl
Delay-Based Dual-Rail Precharge Logic.
IEEE Trans. Very Large Scale Integr. Syst.
Marco Bucci, Luca Giancane, Raimondo Luzzi, Giuseppe Scotti, Alessandro Trifiletti
2011 C conf
Leakage Power Analysis attacks: Effectiveness on DPA resistant logic styles under process variations.
ISCAS
Milena Djukanovic, Luca Giancane, Giuseppe Scotti, Alessandro Trifiletti, Massimo Alioto
2010 J jnl
Leakage Power Analysis Attacks: A Novel Class of Attacks to Nanometer Cryptographic Circuits.
IEEE Trans. Circuits Syst. I Regul. Pap.
Massimo Alioto, Luca Giancane, Giuseppe Scotti, Alessandro Trifiletti
2009 — conf
Delay-based dual-rail pre-charge logic.
ICECS
Marco Bucci, Luca Giancane, Raimondo Luzzi, Giuseppe Scotti, Alessandro Trifiletti
2009 — conf
Leakage Power Analysis attacks: Theoretical analysis and impact of variations.
ICECS
Massimo Alioto, Luca Giancane, Giuseppe Scotti, Alessandro Trifiletti
2009 C conf
Power Analysis of a Chaos-based Random Number Generator for Cryptographic Security.
ISCAS
Fabio Pareschi, Giuseppe Scotti, Luca Giancane, Riccardo Rovatti, Gianluca Setti, Alessandro Trifiletti
2008 — conf
A new dynamic differential logic style as a countermeasure to power analysis attacks.
ICECS
Luca Giancane, Piero Marietti, Mauro Olivieri, Giuseppe Scotti, Alessandro Trifiletti
2008 J jnl
Enhancing power analysis attacks against cryptographic devices.
IET Circuits Devices Syst.
Marco Bucci, Luca Giancane, Raimondo Luzzi, M. Marino, Giuseppe Scotti, Alessandro Trifiletti
2007 J jnl
A Dynamic and Differential CMOS Lookup Table with Data-Independent Power Consumption for Cryptographic Applications on Chip Cards.
IEEE Trans. Dependable Secur. Comput.
Marco Bucci, Luca Giancane, Raimondo Luzzi, Alessandro Trifiletti
2007 — conf
A Statistical Model of Logic Gates for Monte Carlo Simulation Including On-Chip Variations.
PATMOS
Francesco Centurelli, Luca Giancane, Mauro Olivieri, Giuseppe Scotti, Alessandro Trifiletti
2006 C conf
A novel concept for stateless random bit generators in cryptographic applications.
ISCAS
Marco Bucci, Luca Giancane, Raimondo Luzzi, Mario Varanonuovo, Alessandro Trifiletti
2006 C conf
Enhancing power analysis attacks against cryptographic devices.
ISCAS
Marco Bucci, Luca Giancane, Raimondo Luzzi, Giuseppe Scotti, Alessandro Trifiletti
2006 A conf
Three-Phase Dual-Rail Pre-charge Logic.
CHES
Marco Bucci, Luca Giancane, Raimondo Luzzi, Alessandro Trifiletti