Luca Gaetano Amarù

52 papers A* 5A 14C 3Journal 10Unranked 19

Year	Rank	Type	Title / Venue / Authors
2021	A*	`conf`	LUT-Based Optimization For ASIC Design Flow. DAC Luca Gaetano Amarù, Vinicius N. Possani, Eleonora Testa, Felipe S. Marranghello, Christopher Casares, Jiong Luo, Patrick Vuillod, Alan Mishchenko, Giovanni De Micheli
2019	J	`jnl`	Logic Synthesis for Established and Emerging Computing. Proc. IEEE Eleonora Testa, Mathias Soeken, Luca Gaetano Amarù, Giovanni De Micheli
2019	J	`jnl`	Mapping Monotone Boolean Functions into Majority. IEEE Trans. Computers Eleonora Testa, Mathias Soeken, Luca Gaetano Amarù, Winston Haaswijk, Giovanni De Micheli
2018	A	`conf`	Improvements to boolean resynthesis. DATE Luca Gaetano Amarù, Mathias Soeken, Patrick Vuillod, Jiong Luo, Alan Mishchenko, Janet Olson, Robert K. Brayton, Giovanni De Micheli
2018	—	`conf`	Integrated ESOP Refactoring for Industrial Designs. ICECS Winston Haaswijk, Luca Gaetano Amarù, Patrick Vuillod, Jiong Luo, Mathias Soeken, Giovanni De Micheli
2018	A	`conf`	Practical exact synthesis. DATE Mathias Soeken, Winston Haaswijk, Eleonora Testa, Alan Mishchenko, Luca Gaetano Amarù, Robert K. Brayton, Giovanni De Micheli
2017	—	`conf`	A novel basis for logic rewriting. ASP-DAC Winston Haaswijk, Mathias Soeken, Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2017	A	`conf`	Enabling exact delay synthesis. ICCAD Luca Gaetano Amarù, Mathias Soeken, Patrick Vuillod, Jiong Luo, Alan Mishchenko, Pierre-Emmanuel Gaillardon, Janet Olson, Robert K. Brayton, Giovanni De Micheli
2017	J	`jnl`	Exact Synthesis of Majority-Inverter Graphs and Its Applications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Mathias Soeken, Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2017	—	`conf`	Improving Circuit Mapping Performance Through MIG-based Synthesis for Carry Chains. ACM Great Lakes Symposium on VLSI Zhufei Chu, Xifan Tang, Mathias Soeken, Ana Petkovska, Grace Zgheib, Luca Gaetano Amarù, Yinshui Xia, Paolo Ienne, Giovanni De Micheli, Pierre-Emmanuel Gaillardon
2017	A	`conf`	Logic optimization and synthesis: Trends and directions in industry. DATE Luca Gaetano Amarù, Patrick Vuillod, Jiong Luo, Janet Olson
2017	—	`conf`	Multi-level logic benchmarks: An exactness study. ASP-DAC Luca Gaetano Amarù, Mathias Soeken, Winston Haaswijk, Eleonora Testa, Patrick Vuillod, Jiong Luo, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2017	A	`conf`	Wave pipelining for majority-based beyond-CMOS technologies. DATE Odysseas Zografos, A. De Meester, Eleonora Testa, Mathias Soeken, Pierre-Emmanuel Gaillardon, Giovanni De Micheli, Luca Gaetano Amarù, Praveen Raghavan, Francky Catthoor, Rudy Lauwereins
2016	J	`jnl`	A Sound and Complete Axiomatization of Majority-n Logic. IEEE Trans. Computers Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Anupam Chattopadhyay, Giovanni De Micheli
2016	A*	`conf`	An MIG-based compiler for programmable logic-in-memory architectures. DAC Mathias Soeken, Saeideh Shirinzadeh, Pierre-Emmanuel Gaillardon, Luca Gaetano Amarù, Rolf Drechsler, Giovanni De Micheli
2016	C	`conf`	Digital, analog and RF design opportunities of three-independent-gate transistors. ISCAS Pierre-Emmanuel Gaillardon, Mehdi Hasan, Anirban Saha, Luca Gaetano Amarù, Ross Walker, Berardi Sensale Rodriguez
2016	A	`conf`	Exploiting inherent characteristics of reversible circuits for faster combinational equivalence checking. DATE Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Robert Wille, Giovanni De Micheli
2016	—	`conf`	Inversion optimization in Majority-Inverter Graphs. NANOARCH Eleonora Testa, Mathias Soeken, Odysseas Zografos, Luca Gaetano Amarù, Praveen Raghavan, Rudy Lauwereins, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2016	J	`jnl`	Majority-Inverter Graph: A New Paradigm for Logic Optimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2016	—	`conf`	Majority-based synthesis for nanotechnologies. ASP-DAC Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2016	—	`conf`	Notes on Majority Boolean Algebra. ISMVL Anupam Chattopadhyay, Luca Gaetano Amarù, Mathias Soeken, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2016	A	`conf`	Optimizing Majority-Inverter Graphs with functional hashing. DATE Mathias Soeken, Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2016	A	`conf`	The Programmable Logic-in-Memory (PLiM) computer. DATE Pierre-Emmanuel Gaillardon, Luca Gaetano Amarù, Anne Siemon, Eike Linn, Rainer Waser, Anupam Chattopadhyay, Giovanni De Micheli
2016	—	`conf`	Three-Independent-Gate Transistors: Opportunities in digital, analog and RF applications. LATS Pierre-Emmanuel Gaillardon, Romain Magni, Luca Gaetano Amarù, Mehdi Hasan, Ross Walker, Berardi Sensale Rodriguez, Jean-Frédéric Christmann, Edith Beigné
2015	J	`jnl`	A Sound and Complete Axiomatization of Majority-n Logic. CoRR Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Anupam Chattopadhyay, Giovanni De Micheli
2015	—	`conf`	A fast pruning technique for low-power inexact Circuit design. LASCAS Johan Broc, Pierre-Emmanuel Gaillardon, Luca Gaetano Amarù, Jaume Joven Murillo, Krishna V. Palem, Giovanni De Micheli
2015	—	`conf`	Exploiting Circuit Duality to Speed up SAT. ISVLSI Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Alan Mishchenko, Maciej J. Ciesielski, Giovanni De Micheli
2015	—	`conf`	Exploiting the Expressive Power of Graphene Reconfigurable Gates via Post-Synthesis Optimization. ACM Great Lakes Symposium on VLSI Sandeep Miryala, Valerio Tenace, Andrea Calimera, Enrico Macii, Massimo Poncino, Luca Gaetano Amarù, Giovanni De Micheli, Pierre-Emmanuel Gaillardon
2015	—	`conf`	Multiple Independent Gate FETs: How many gates do we need? ASP-DAC Luca Gaetano Amarù, Gage Hills, Pierre-Emmanuel Gaillardon, Subhasish Mitra, Giovanni De Micheli
2015	—	`conf`	NEM relay design with biconditional binary decision diagrams. NANOARCH Winston Haaswijk, Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2015	—	`—`	New Data Structures and Algorithms for Logic Synthesis and Verification. Luca Gaetano Amarù
2015	J	`jnl`	New Logic Synthesis as Nanotechnology Enabler. Proc. IEEE Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Subhasish Mitra, Giovanni De Micheli
2015	—	`conf`	Reversible Logic Synthesis via Biconditional Binary Decision Diagrams. ISMVL Anupam Chattopadhyay, Alessandro Littarru, Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2015	A	`conf`	Towards More Efficient Logic Blocks By Exploiting Biconditional Expansion (Abstract Only). FPGA Pierre-Emmanuel Gaillardon, Gain Kim, Xifan Tang, Luca Gaetano Amarù, Giovanni De Micheli
2014	A	`conf`	A new basic logic structure for data-path computation (abstract only). FPGA Pierre-Emmanuel Gaillardon, Luca Gaetano Amarù, Giovanni De Micheli
2014	A	`conf`	Advanced system on a chip design based on controllable-polarity FETs. DATE Pierre-Emmanuel Gaillardon, Luca Gaetano Amarù, Jian Zhang, Giovanni De Micheli
2014	A	`conf`	An efficient manipulation package for Biconditional Binary Decision Diagrams. DATE Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2014	J	`jnl`	Biconditional Binary Decision Diagrams: A Novel Canonical Logic Representation Form. IEEE J. Emerg. Sel. Topics Circuits Syst. Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2014	—	`conf`	Data compression via logic synthesis. ASP-DAC Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Andreas Burg, Giovanni De Micheli
2014	C	`conf`	Majority Logic Synthesis for Spin Wave Technology. DSD Odysseas Zografos, Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Praveen Raghavan, Giovanni De Micheli
2014	A*	`conf`	Majority-Inverter Graph: A Novel Data-Structure and Algorithms for Efficient Logic Optimization. DAC Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2014	—	`conf`	System-level assessment and area evaluation of Spin Wave logic circuits. NANOARCH Odysseas Zografos, Praveen Raghavan, Luca Gaetano Amarù, Bart Soree, Rudy Lauwereins, Iuliana P. Radu, Diederik Verkest, Aaron Thean
2014	—	`conf`	Unlocking Controllable-Polarity Transistors Opportunities by Exclusive-OR and Majority Logic Synthesis. ISVLSI Pierre-Emmanuel Gaillardon, Luca Gaetano Amarù, Giovanni De Micheli
2013	A*	`conf`	BDS-MAJ: a BDD-based logic synthesis tool exploiting majority logic decomposition. DAC Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2013	A	`conf`	Biconditional BDD: a novel canonical BDD for logic synthesis targeting XOR-rich circuits. DATE Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2013	—	`conf`	MIXSyn: An efficient logic synthesis methodology for mixed XOR-AND/OR dominated circuits. ASP-DAC Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2013	J	`jnl`	Power-Gated Differential Logic Style Based on Double-Gate Controllable-Polarity Transistors. IEEE Trans. Circuits Syst. II Express Briefs Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Jian Zhang, Giovanni De Micheli
2013	C	`conf`	Self-checking ripple-carry adder with Ambipolar Silicon NanoWire FET. ISCAS Ogun Turkyilmaz, Fabien Clermidy, Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2013	A*	`conf`	Towards structured ASICs using polarity-tunable Si nanowire transistors. DAC Pierre-Emmanuel Gaillardon, Michele De Marchi, Luca Gaetano Amarù, Shashikanth Bobba, Davide Sacchetto, Yusuf Leblebici, Giovanni De Micheli
2013	A	`conf`	Vertically-stacked double-gate nanowire FETs with controllable polarity: from devices to regular ASICs. DATE Pierre-Emmanuel Gaillardon, Luca Gaetano Amarù, Shashikanth Bobba, Michele De Marchi, Davide Sacchetto, Yusuf Leblebici, Giovanni De Micheli
2012	J	`jnl`	High Speed Architectures for Finding the First two Maximum/Minimum Values. IEEE Trans. Very Large Scale Integr. Syst. Luca Gaetano Amarù, Maurizio Martina, Guido Masera
2011	—	`conf`	Nanofabric power analysis: Biosequence alignment case study. NANOARCH Stefano Frache, Luca Gaetano Amarù, Mariagrazia Graziano, Maurizio Zamboni