Lu Zhang

19 papers A* 1A 2C 1Journal 14Unranked 1
YearRankTypeTitle / Venue / Authors
2024 J jnl
RE-Specter: Examining the Architectural Features of Configurable CNN With Power Side-Channel.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Lu Zhang, Dejun Mu, Jingyu Wang, Ruoyang Liu, Yifan He, Yaolei Li, Yu Tai, Shengbing Zhang, Xiaoya Fan, Huazhong Yang, Yongpan Liu
2024 J jnl
ULSeq-TA: Ultra-Long Sequence Attention Fusion Transformer Accelerator Supporting Grouped Sparse Softmax and Dual-Path Sparse LayerNorm.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Jingyu Wang, Lu Zhang, Xueqing Li, Huazhong Yang, Yongpan Liu
2023 J jnl
A Double-Switch Single-Transformer Integrated Equalizer for the Recycled Power Battery String of Automatic Guided Vehicles.
IEEE Trans. Ind. Electron.
Bin Xu, Zhaotian Yan, Liang Xiong, Lu Zhang, Wei Zhou, Ruikun Mai, Zhengyou He, Lizhou Liu
2023 J jnl
A Single-Magnetic Bidirectional Integrated Equalizer Using Multi-Winding Transformer and Voltage Multiplier for Hybrid Energy Storage System.
IEEE Trans. Veh. Technol.
Lizhou Liu, Zhaotian Yan, Bin Xu, Pengcheng Zhang, Changsong Cai, Huazhong Yang, Lu Zhang, Shunli Wang
2023 J jnl
A Weight-Reload-Eliminated Compute-in-Memory Accelerator for 60 fps 4K Super-Resolution.
IEEE Trans. Circuits Syst. II Express Briefs
Yaolei Li, Jinshan Yue, Jingyu Wang, Chen Tang, Yifan He, Wenbin Jia, Kaiwei Zou, Lu Zhang, Huazhong Yang, Yongpan Liu
2023 J jnl
An RRAM-Based Digital Computing-in-Memory Macro With Dynamic Voltage Sense Amplifier and Sparse-Aware Approximate Adder Tree.
IEEE Trans. Circuits Syst. II Express Briefs
Yifan He, Jinshan Yue, Xiaoyu Feng, Yuxuan Huang, Hongyang Jia, Jingyu Wang, Lu Zhang, Wenyu Sun, Huazhong Yang, Yongpan Liu
2023 J jnl
Modularized Equalization Architecture With Transformer-Based Integrating Voltage Equalizer for the Series-Connected Battery Pack in Electric Bicycles.
IEEE Trans. Ind. Electron.
Bin Xu, Lizhou Liu, Zhaotian Yan, Zhuqing Yuan, Lu Zhang, Wei Zhou, Ruikun Mai, Zhengyou He, Yongpan Liu, Huazhong Yang
2023 J jnl
Pareto Frequency-Aware Power Side-Channel Countermeasure Exploration on CNN Systolic Array.
IEEE Trans. Circuits Syst. II Express Briefs
Lu Zhang, Dejun Mu, Yuxuan Huang, Jingyu Wang, Yifan He, Yaolei Li, Lizhou Liu, Kaiwei Zou, Huazhong Yang, Yongpan Liu
2022 J jnl
Bit-Aware Fault-Tolerant Hybrid Retraining and Remapping Schemes for RRAM-Based Computing-in-Memory Systems.
IEEE Trans. Circuits Syst. II Express Briefs
Yuxuan Huang, Yifan He, Jingyu Wang, Jinshan Yue, Lu Zhang, Kaiwei Zou, Huazhong Yang, Yongpan Liu
2022 C conf
C-RRAM: A Fully Input Parallel Charge-Domain RRAM-based Computing-in-Memory Design with High Tolerance for RRAM Variations.
ISCAS
Yifan He, Yuxuan Huang, Jinshan Yue, Wenyu Sun, Lu Zhang, Yongpan Liu
2021 — conf
High Area/Energy Efficiency RRAM CNN Accelerator with Pattern-Pruning-Based Weight Mapping Scheme.
NVMSA
Songming Yu, Lu Zhang, Jingyu Wang, Jinshan Yue, Zhuqing Yuan, Xueqing Li, Huazhong Yang, Yongpan Liu
2021 A* conf
PETRI: Reducing Bandwidth Requirement in Smart Surveillance by Edge-Cloud Collaborative Adaptive Frame Clustering and Pipelined Bidirectional Tracking.
DAC
Ruoyang Liu, Lu Zhang, Jingyu Wang, Huazhong Yang, Yongpan Liu
2020 J jnl
A Unified Model for Gate Level Propagation Analysis.
CoRR
Jeremy Blackstone, Wei Hu, Alric Althoff, Armaiti Ardeshiricham, Lu Zhang, Ryan Kastner
2020 J jnl
High Area/Energy Efficiency RRAM CNN Accelerator with Kernel-Reordering Weight Mapping Scheme Based on Pattern Pruning.
CoRR
Songming Yu, Yongpan Liu, Lu Zhang, Jingyu Wang, Jinshan Yue, Zhuqing Yuan, Xueqing Li, Huazhong Yang
2020 J jnl
Machine-Learning-Based Side-Channel Leakage Detection in Electronic System-Level Synthesis.
IEEE Netw.
Lu Zhang, Dejun Mu, Wei Hu, Yu Tai
2020 J jnl
Memory-Based High-Level Synthesis Optimizations Security Exploration on the Power Side-Channel.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Lu Zhang, Dejun Mu, Wei Hu, Yu Tai, Jeremy Blackstone, Ryan Kastner
2018 A conf
Examining the consequences of high-level synthesis optimizations on power side-channel.
DATE
Lu Zhang, Wei Hu, Armaiti Ardeshiricham, Yu Tai, Jeremy Blackstone, Dejun Mu, Ryan Kastner
2018 J jnl
Towards Quantified Data Analysis of Information Flow Tracking for Secure System Design.
IEEE Access
Yu Tai, Wei Hu, Dejun Mu, Baolei Mao, Lu Zhang
2017 A conf
Why you should care about don't cares: Exploiting internal don't care conditions for hardware Trojans.
ICCAD
Wei Hu, Lu Zhang, Armaiti Ardeshiricham, Jeremy Blackstone, Bochuan Hou, Yu Tai, Ryan Kastner