Lu Lu - RankMe

21 papers C 7Journal 10Unranked 4

Year	Rank	Type	Title / Venue / Authors
2024	J	`jnl`	A 1-Mb RRAM Macro With 9.8 ns Read Access Time Utilizing Dynamic Reference Voltage for Reliable Sensing Operation. IEEE Trans. Circuits Syst. II Express Briefs Junjie Mu, Lu Lu, Ju Eon Kim, Byung-Kwon An, Vishal Sharma, Arya Jagath Lekshmi, Putu Andhita Dananjaya, Weng Hong Lai, Wen Siang Lew, Tony Tae-Hyoung Kim
2023	C	`conf`	282-to-607 TOPS/W, 7T-SRAM Based CiM with Reconfigurable Column SAR ADC for Neural Network Processing. ISCAS Qibang Zang, Wang Ling Goh, Lu Lu, Chengshuo Yu, Junjie Mu, Tony Tae-Hyoung Kim, Bongjin Kim, Dongrui Li, Anh Tuan Do
2023	C	`conf`	A 129.83 TOPS/W Area Efficient Digital SOT/STT MRAM-Based Computing-In-Memory for Advanced Edge AI Chips. ISCAS Lu Lu, Aarthy Mani, Anh Tuan Do
2023	J	`jnl`	A 47 TOPS/W 10T SRAM-Based Multi-Bit Signed CIM With Self-Adaptive Bias Voltage Generator for Edge Computing Applications. IEEE Trans. Circuits Syst. II Express Briefs Lu Lu, Anh-Tuan Do
2023	J	`jnl`	BP-SCIM: A Reconfigurable 8T SRAM Macro for Bit-Parallel Searching and Computing In-Memory. IEEE Trans. Circuits Syst. I Regul. Pap. Yuzong Chen, Junjie Mu, Hyunjoon Kim, Lu Lu, Tony Tae-Hyoung Kim
2022	J	`jnl`	A 6T SRAM Based Two-Dimensional Configurable Challenge-Response PUF for Portable Devices. IEEE Trans. Circuits Syst. I Regul. Pap. Lu Lu, Taegeun Yoo, Tony Tae-Hyoung Kim
2022	J	`jnl`	A High Reliable SRAM-Based PUF With Enhanced Challenge-Response Space. IEEE Trans. Circuits Syst. II Express Briefs Lu Lu, Tony Tae-Hyoung Kim
2022	J	`jnl`	A Reconfigurable 16Kb AND8T SRAM Macro With Improved Linearity for Multibit Compute-In Memory of Artificial Intelligence Edge Devices. IEEE J. Emerg. Sel. Topics Circuits Syst. Vishal Sharma, Ju Eon Kim, Hyunjoon Kim, Lu Lu, Tony Tae-Hyoung Kim
2022	C	`conf`	A Reconfigurable 8T SRAM Macro for Bit-Parallel Searching and Computing In-Memory. ISCAS Yuzong Chen, Junjie Mu, Hyunjoon Kim, Lu Lu, Tony Tae-Hyoung Kim
2022	—	`conf`	Temperature Compensation on SRAM-Based Computation in Memory Array. ISOCC Qibang Zang, Wang Ling Goh, Fei Li, Lu Lu, Anh Tuan Do
2021	C	`conf`	A Configurable Randomness Enhanced RRAM PUF with Biased Current Sensing Scheme. ISCAS Lu Lu, Yuzong Chen, Tony Tae-Hyoung Kim
2021	C	`conf`	A Multi-Functional 4T2R ReRAM Macro Enabling 2-Dimensional Access and Computing In-Memory. ISCAS Yuzong Chen, Lu Lu, Yuncheng Lu, Tony Tae-Hyoung Kim
2021	—	`conf`	A Programmable 6T SRAM-Based PUF with Dynamic Stability Data Masking. A-SSCC Lu Lu, Tony Tae-Hyoung Kim
2021	J	`jnl`	A Reconfigurable 4T2R ReRAM Computing In-Memory Macro for Efficient Edge Applications. IEEE Open J. Circuits Syst. Yuzong Chen, Lu Lu, Bongjin Kim, Tony Tae-Hyoung Kim
2020	J	`jnl`	A 0.506-pJ 16-kb 8T SRAM With Vertical Read Wordlines and Selective Dual Split Power Lines. IEEE Trans. Very Large Scale Integr. Syst. Lu Lu, Taegeun Yoo, Van Loi Le, Tony Tae-Hyoung Kim
2020	—	`conf`	ReRAM Device and Circuit Co-Design Challenges in Nano-scale CMOS Technology. APCCAS Lu Lu, Ju Eon Kim, Vishal Sharma, Tony Tae-Hyoung Kim
2020	J	`jnl`	Reconfigurable 2T2R ReRAM Architecture for Versatile Data Storage and Computing In-Memory. IEEE Trans. Very Large Scale Integr. Syst. Yuzong Chen, Lu Lu, Bongjin Kim, Tony Tae-Hyoung Kim
2020	C	`conf`	Reconfigurable 2T2R ReRAM with Split Word-Lines for TCAM Operation and In-Memory Computing. ISCAS Yuzong Chen, Lu Lu, Bongjin Kim, Tony Tae-Hyoung Kim
2019	C	`conf`	A Sequence-Dependent Configurable PUF Based on 6T SRAM for Enhanced Challenge Response Space. ISCAS Lu Lu, Tony Tae-Hyoung Kim
2019	J	`jnl`	Improving uniformity and reliability of SRAM PUFs utilizing device aging phenomenon for unique identifier generation. Microelectron. J. Achiranshu Garg, Zhao Chuan Lee, Lu Lu, Tony Tae-Hyoung Kim
2018	—	`conf`	An Ultra-low Power 8T SRAM with Vertical Read Word Line and Data Aware Write Assist. A-SSCC Lu Lu, Taegeun Yoo, Van Loi Le, Tony Tae-Hyoung Kim