Loïc Lagadec - RankMe

85 papers A 3B 5C 8Journal 24Unranked 41

Year	Rank	Type	Title / Venue / Authors
2025	—	`conf`	A Research Agenda for the Living SysML V2 Blueprint: Toward Executable, Verifiable, and Navigable System Models. SBMF Ciprian Teodorov, Lucas Lima, Sidney C. Nogueira, Sylvain Guérin, Loïc Lagadec
2025	J	`jnl`	A survey on versatile embedded Machine Learning hardware acceleration. J. Syst. Archit. Pierre Garreau, Pascal Cotret, Julien Francq, Jean-Christophe Cexus, Loïc Lagadec
2025	J	`jnl`	Efficient Adaptive Multi-Level Privilege Partitioning With RTrustSoC. IEEE Trans. Circuits Syst. I Regul. Pap. Raphaële Milan, Lilian Bossuet, Loïc Lagadec, Carlos Andres Lara-Nino, Brice Colombier, Théotime Bollengier
2025	C	`conf`	Hierarchical System of Digital Twins: A Holistic Architecture for Swarm System Analysis. MODELSWARD Mouhamadou F. Ball, Jannik Laval, Loïc Lagadec
2025	J	`jnl`	War on JITs: Software-Based Attacks and Hybrid Defenses for JIT Compilers - A Comprehensive Survey. ACM Comput. Surv. Quentin Ducasse, Pascal Cotret, Loïc Lagadec
2024	J	`jnl`	Environmental Constraints for Intelligent Internet of Deep-Sea/Underwater Things Relying on Enterprise Architecture Approach. Sensors Charbel Geryes Aoun, Noura Mansour, Fadi Dornaika, Loïc Lagadec
2024	—	`conf`	SoSAF: A Pharo-Based Framework for Enhancing System of Systems Dependencies Analysis. IWST Mouhamadou F. Ball, Patrick Auger, Jannik Laval, Loïc Lagadec
2023	J	`jnl`	A Dominating Tree Based Leader Election Algorithm for Smart Cities IoT Infrastructure. Mob. Networks Appl. Nabil Kadjouh, Ahcène Bounceur, Madani Bezoui, Mohamed Essaid Khanouche, Reinhardt Euler, Mohammad Hammoudeh, Loïc Lagadec, Sohail Jabbar, Fadi M. Al-Turjman
2023	—	`conf`	Debugging Paxos in the UML Multiverse. MoDELS (Companion) Matthias Pasquier, Ciprian Teodorov, Frédéric Jouault, Matthias Brun, Loïc Lagadec
2023	—	`conf`	Gigue: A JIT Code Binary Generator for Hardware Testing. VMIL@SPLASH Quentin Ducasse, Pascal Cotret, Loïc Lagadec
2023	—	`conf`	JIT Compiler Security through Low-Cost RISC-V Extension. IPDPS Workshops Quentin Ducasse, Pascal Cotret, Loïc Lagadec
2023	—	`ed.`	Proceedings of the International Workshop on Smalltalk Technologies 2022 co-located with the 28th European Smalltalk User Group Conference (ESUG 2022), Novi Sad, Serbia, August 24th-26th, 2022. IWST Loïc Lagadec, Vincent Aranega
2023	C	`conf`	Secured-by-design systems-on-chip: a MBSE Approach. RSP Raphaële Milan, Loïc Lagadec, Théotime Bollengier, Lilian Bossuet, Ciprian Teodorov
2023	B	`conf`	Temporal Breakpoints for Multiverse Debugging. SLE Matthias Pasquier, Ciprian Teodorov, Frédéric Jouault, Matthias Brun, Luka Le Roux, Loïc Lagadec
2023	—	`conf`	Toward a CAD Tool for SYCL programming. IWOCL Erwan Fabiani, Loïc Lagadec, Alexandre Skrzyniarz, Chiara Relevat, Erell Cottour, Paul Allaire
2023	—	`conf`	TrustSoC: Light and Efficient Heterogeneous SoC Architecture, Secure-by-design. AsianHOST Raphaële Milan, Lilian Bossuet, Loïc Lagadec, Carlos Andres Lara-Nino, Brice Colombier
2022	A	`conf`	Dolmen: FPGA Swarm for Safety and Liveness Verification. DATE Emilien Fournier, Ciprian Teodorov, Loïc Lagadec
2022	J	`jnl`	Finding the polygon hull of a network without conditions on the starting vertex. Trans. Emerg. Telecommun. Technol. Ahcène Bounceur, Madani Bezoui, Mohammad Hammoudeh, Loïc Lagadec, Reinhardt Euler
2022	C	`conf`	Porting a JIT Compiler to RISC-V: Challenges and Opportunities. MPLR Quentin Ducasse, Guillermo Polito, Pablo Tesone, Pascal Cotret, Loïc Lagadec
2022	A	`conf`	Practical multiverse debugging through user-defined reductions: application to UML models. MoDELS Matthias Pasquier, Ciprian Teodorov, Frédéric Jouault, Matthias Brun, Luka Le Roux, Loïc Lagadec
2021	J	`jnl`	Benchmarking Quantized Neural Networks on FPGAs with FINN. CoRR Quentin Ducasse, Pascal Cotret, Loïc Lagadec, Robert Stewart
2021	B	`conf`	Carnac: Algorithm Variability for Fast Swarm Verification on FPGA. FPL Emilien Fournier, Ciprian Teodorov, Loïc Lagadec
2021	C	`conf`	Prototyping FPGA through overlays. RSP Théotime Bollengier, Loïc Lagadec, Ciprian Teodorov
2020	J	`jnl`	Advances in Smalltalk technologies. Sci. Comput. Program. Loïc Lagadec, Anne Etien, Jannik Laval
2020	J	`jnl`	Automated exploration of homomorphic encryption scheme input parameters. J. Inf. Secur. Appl. Cyrielle Feron, Loïc Lagadec, Vianney Lapôtre
2020	C	`conf`	Menhir: Generic High-Speed FPGA Model-Checker. DSD Emilien Fournier, Ciprian Teodorov, Loïc Lagadec
2019	—	`conf`	A New Leader Election Algorithm based on the WBS Algorithm Dedicated to Smart-cities. ICFNDS Nabil Kadjouh, Ahcène Bounceur, Abdelkamel Tari, Loïc Lagadec, Reinhardt Euler, Madani Bezoui
2019	—	`conf`	Designing a combined personal communicator and data entry terminal for disaster relief & remote operations. GHTC Paul Gardner-Stephen, Angus Wallace, Lucas Moss, Loïc Lagadec, Matthew Lloyd
2019	—	`conf`	Temperature-based models of batteries for the simulation of Wireless Sensor Networks. ICFNDS Nabil Kadjouh, Ahcène Bounceur, Abdelkamel Tari, Reinhardt Euler, Loïc Lagadec, Abdelkader Laouid
2018	—	`conf`	An Integrated Toolchain for Overlay-centric System-on-chip. ReCoSoC Jean-Christophe Le Lann, Théotime Bollengier, Mohamad Najem, Loïc Lagadec
2018	—	`conf`	CupCarbon-Lab: An IoT emulator. CCNC Ahcène Bounceur, Olivier Marc, Massinissa Lounis, Julien Soler, Laurent Clavier, Pierre Combeau, Rodolphe Vauzelle, Loïc Lagadec, Reinhardt Euler, Madani Bezoui, Pietro Manzoni
2018	—	`conf`	Detecting gaps and voids in WSNs and IoT networks: the angle-based method. ICFNDS Madani Bezoui, Ahcène Bounceur, Loïc Lagadec, Reinhardt Euler, Mohammad Hammoudeh, Abdelkader Laouid, Abdelkamel Tari
2018	—	`conf`	Detecting gaps and voids in WSNs and IoT networks: the minimum x-coordinate based method. ICFNDS Ahcène Bounceur, Madani Bezoui, Loïc Lagadec, Reinhardt Euler, Abdelkader Laouid, Mahamadou Traore, Mounir Lallali
2018	—	`conf`	DoTRo: A New Dominating Tree Routing Algorithm for Efficient and Fault-Tolerant Leader Election in WSNs and IoT Networks. MSPN Ahcène Bounceur, Madani Bezoui, Loïc Lagadec, Reinhardt Euler, Abdelkader Laouid, Mohammad Hammoudeh
2018	—	`conf`	Fast Evaluation of Homomorphic Encryption Schemes Based on Ring-LWE. NTMS Cyrielle Feron, Vianney Lapotre, Loïc Lagadec
2017	J	`jnl`	A Unified Design Flow to Automatically Generate On-Chip Monitors During High-Level Synthesis of Hardware Accelerators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Mohamed Ben Hammouda, Philippe Coussy, Loïc Lagadec
2017	—	`conf`	Asserting causal properties in High Level Synthesis. IVSW Erwan Fabiani, Loïc Lagadec, Mohamed Ben Hammouda, Ciprian Teodorov
2017	J	`jnl`	Extended overlay architectures for heterogeneous FPGA cluster management. J. Syst. Archit. Mohamad Najem, Théotime Bollengier, Jean-Christophe Le Lann, Loïc Lagadec
2017	C	`conf`	PAnTHErS: A Prototyping and Analysis Tool for Homomorphic Encryption Schemes. SECRYPT Cyrielle Feron, Vianney Lapotre, Loïc Lagadec
2017	—	`conf`	Soft Timing Closure for Soft Programmable Logic Cores: The ARGen Approach. ARC Théotime Bollengier, Loïc Lagadec, Mohamad Najem, Jean-Christophe Le Lann, Pierre Guilloux
2016	—	`conf`	Demo: Overlay architectures for heterogeneous FPGA cluster management. DASIP Théotime Bollengier, Mohamad Najem, Jean-Christophe Le Lann, Loïc Lagadec
2016	J	`jnl`	TBES: Template-Based Exploration and Synthesis of Heterogeneous Multiprocessor Architectures on FPGA. ACM Trans. Embed. Comput. Syst. Youenn Corre, Jean-Philippe Diguet, Dominique Heller, Dominique Blouin, Loïc Lagadec
2015	—	`conf`	A Meta Model Supporting Both Hardware and Smalltalk-Based Execution of Fpga Circuits. IWST Le Xuan Sang, Loïc Lagadec, Luc Fabresse, Jannik Laval, Noury Bouraqadi
2015	—	`conf`	A role language to interpret multi-formalism System of systems models. SysCon Jean-Philippe Schneider, Joël Champeau, Ciprian Teodorov, Eric Senn, Loïc Lagadec
2015	C	`conf`	Role Framework to Support Collaborative Virtual Prototyping of System of Systems. WETICE Jean-Philippe Schneider, Joël Champeau, Loïc Lagadec, Eric Senn
2014	—	`conf`	A design approach to automatically generate on-chip monitors during high-level synthesis of hardware accelerator. ACM Great Lakes Symposium on VLSI Mohamed Ben Hammouda, Philippe Coussy, Loïc Lagadec
2014	C	`conf`	A design approach to automatically synthesize ANSI-C assertions during High-Level Synthesis of hardware accelerators. ISCAS Mohamed Ben Hammouda, Philippe Coussy, Loïc Lagadec
2014	—	`conf`	A prototyping platform for virtual reconfigurable units. ReCoSoC Loïc Lagadec, Jean-Christophe Le Lann, Théotime Bollengier
2014	—	`conf`	Flexible Model-Based Simulation as a System's Design Driver. CSDM (Posters) Jean-Philippe Schneider, Eric Senn, Joël Champeau, Loïc Lagadec
2014	J	`jnl`	International workshop on smalltalk technologies 2011 special issue. Softw. Pract. Exp. Alain Plantec, Loïc Lagadec
2014	J	`jnl`	Model-driven physical-design automation for FPGAs: fast prototyping and legacy reuse. Softw. Pract. Exp. Ciprian Teodorov, Loïc Lagadec
2014	J	`jnl`	Model-driven toolset for embedded reconfigurable cores: Flexible prototyping and software-like debugging. Sci. Comput. Program. Loïc Lagadec, Ciprian Teodorov, Jean-Christophe Le Lann, Damien Picard, Erwan Fabiani
2014	J	`jnl`	Preface to the special issue on advances in Smalltalk based systems. Sci. Comput. Program. Loïc Lagadec, Alain Plantec
2014	—	`conf`	Virtual prototyping of R2D NASIC based FPGA. NANOARCH Ciprian Teodorov, Loïc Lagadec
2013	B	`conf`	A Model-Driven Approach to Enhance Tool Interoperability Using the Theory of Models of Computation. SLE Papa Issa Diallo, Joël Champeau, Loïc Lagadec
2013	—	`conf`	Fast Template-Based Heterogeneous MPSoC Synthesis on FPGA. ARC Youenn Corre, Jean-Philippe Diguet, Loïc Lagadec, Dominique Heller, Dominique Blouin
2013	J	`jnl`	Introduction. Tech. Sci. Informatiques Loïc Lagadec, Sébastien Pillement, Arnaud Tisserand
2012	—	`conf`	A framework for high-level synthesis of heterogeneous MP-SoC. ACM Great Lakes Symposium on VLSI Youenn Corre, Jean-Philippe Diguet, Dominique Heller, Loïc Lagadec
2012	J	`jnl`	Behavioral Systel Level Power Consumption Modeling of Mobile Video Streaming applications CoRR Yahia Benmoussa, Jalil Boukhobza, Yassine Hadjadj-Aoul, Loïc Lagadec, Djamel Benazzouz
2012	—	`conf`	HLS-based fast design space exploration of ad hoc hardware accelerators: A key tool for MPSoC synthesis on FPGA. DASIP Youenn Corre, Van-Trinh Hoang, Jean-Philippe Diguet, Dominique Heller, Loïc Lagadec
2012	—	`ed.`	Proceedings of the International Workshop on Smalltalk Technologies, IWST 2012, Gent, Belgium, August 28, 2012 IWST Loïc Lagadec, Alain Plantec
2011	J	`jnl`	Experiment Centric Teaching for Reconfigurable Processors. Int. J. Reconfigurable Comput. Loïc Lagadec, Damien Picard, Youenn Corre, Pierre-Yves Lucas
2011	—	`conf`	FPGA SDK for nanoscale architectures. ReCoSoC Ciprian Teodorov, Loïc Lagadec
2011	—	`conf`	FPGA physical-design automation using Model-Driven Engineering. ReCoSoC Ciprian Teodorov, Damien Picard, Loïc Lagadec
2011	—	`conf`	Fast prototyping environment for embedded reconfigurable units. ReCoSoC Damien Picard, Loïc Lagadec
2011	—	`conf`	MDE-based FPGA physical design: fast model-driven prototyping with Smalltalk. IWST Ciprian Teodorov, Loïc Lagadec
2011	—	`ed.`	Proceedings of the International Workshop on Smalltalk Technologies, IWST 2011, Edinburgh, United Kingdom, August 23, 2011 IWST Loïc Lagadec, Alain Plantec
2011	—	`conf`	Regular 2D NASIC-based architecture and design space exploration. NANOARCH Ciprian Teodorov, Pritish Narayanan, Loïc Lagadec, Catherine Dezan
2011	J	`jnl`	Selected Papers from the International Workshop on Reconfigurable Communication-Centric Systems on Chips (ReCoSoC' 2010). Int. J. Reconfigurable Comput. Michael Hübner, Jürgen Becker, Loïc Lagadec, Gilles Sassatelli
2010	—	`ed.`	Proceedings of the 5th International Workshop on Reconfigurable Communication-centric Systems on Chip, ReCoSoC 2010, Karlsruhe, Germany, May 17-19, 2010 ReCoSoC Michael Hübner, Loïc Lagadec, Oliver Sander, Jürgen Becker
2010	—	`conf`	Session Teaching Reconfigurable Processor: the Biniou Approach. ReCoSoC Loïc Lagadec, Damien Picard, Pierre-Yves Lucas
2010	—	`conf`	Smalltalk debug lives in the matrix. IWST Loïc Lagadec, Damien Picard
2010	—	`conf`	Virtual SoPC rad-hardening for satellite applications. ReCoSoC Ludovic Barrandon, Thierry Capitaine, Loïc Lagadec, Nathalie Julien, Christophe Moy, Thierry Monédière
2009	J	`jnl`	Multilevel Simulation of Heterogeneous Reconfigurable Platforms. Int. J. Reconfigurable Comput. Damien Picard, Loïc Lagadec
2009	A	`conf`	Software-like debugging methodology for reconfigurable platforms. IPDPS Loïc Lagadec, Damien Picard
2009	J	`jnl`	Toolset for nano-reconfigurable computing. Microelectron. J. Loïc Lagadec, Bernard Pottier, Damien Picard
2009	J	`jnl`	Towards a framework for designing applications onto hybrid nano/CMOS fabrics. Microelectron. J. Catherine Dezan, Ciprian Teodorov, Loïc Lagadec, Michael Leuchtenburg, Teng Wang, Pritish Narayanan, Csaba Andras Moritz
2006	J	`jnl`	Synthèse portable pour micro-architectures à grain fin. Application aux turbo décodeurs et nanofabriques. Tech. Sci. Informatiques Catherine Dezan, Erwan Fabiani, Christophe Gouyen, Loïc Lagadec, Bernard Pottier, Caaliph Andriamisaina, Alix Poungou
2006	—	`conf`	The Case Study of Block Turbo Decoders on a Framework for Portable Synthesis on FPGA. HICSS Catherine Dezan, Christophe Jégo, Bernard Pottier, Christophe Gouyen, Loïc Lagadec
2005	—	`conf`	Compiler level integration of a portable CAD framework for reconfigurable circuits. ReCoSoC Christophe Gouyen, Loïc Lagadec, Bernard Pottier, A. André, E. Lepicier, François Dupont
2004	—	`conf`	Compiler and System Techniques for soc Distributed Reconfigurable Accelerators. SAMOS Joel Cambonie, Sylvain Guérin, Ronan Keryell, Loïc Lagadec, Bernard Pottier, Olivier Sentieys, Bernt Weber, Samar Yazdani
2002	—	`conf`	A LUT based Approach for High Level Synthesis on FPGAs. IWLS Loïc Lagadec, Bernard Pottier, Oscar Villellas, Erwan Fabiani, Catherine Dezan
2001	B	`conf`	Placing, Routing, and Editing Virtual FPGAs. FPL Loïc Lagadec, Dominique Lavenier, Erwan Fabiani, Bernard Pottier
1999	—	`conf`	Object Oriented Approach for Modeling Digital Circuits. MSE Catherine Dezan, Loïc Lagadec, Bernard Pottier
1998	B	`conf`	A 6200 Model and Editor Based on Object Technology. FPL Loïc Lagadec, Bernard Pottier