Louise Trevillyan

20 papers A* 3A 4Journal 10Unranked 2
YearRankTypeTitle / Venue / Authors
2013 A conf
Depth controlled symmetric function fanin tree restructure.
ICCAD
Hua Xiang, Lakshmi N. Reddy, Louise Trevillyan, Ruchir Puri
2011 J jnl
Shedding Physical Synthesis Area Bloat.
VLSI Design
Nancy Ying Zhou, Charles J. Alpert, Zhuo Li, Cliff N. Sze, Louise Trevillyan
2010 — conf
Logical and physical restructuring of fan-in trees.
ISPD
Hua Xiang, Haoxing Ren, Louise Trevillyan, Lakshmi N. Reddy, Ruchir Puri, Minsik Cho
2008 — ch.
Placement-Driven Synthesis Design Closure Tool.
Handbook of Algorithms for Physical Design Automation
Charles J. Alpert, Nathaniel Hieter, Arjen Mets, Ruchir Puri, Lakshmi N. Reddy, Haoxing Ren, Louise Trevillyan
2004 J jnl
An Integrated Environment for Technology Closure of Deep-Submicron IC Designs.
IEEE Des. Test Comput.
Louise Trevillyan, David S. Kung, Ruchir Puri, Lakshmi N. Reddy, Michael A. Kazda
2000 J jnl
EDA in IBM: past, present, and future.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
John A. Darringer, Evan E. Davidson, David J. Hathaway, Bernd Koenemann, Mark A. Lavin, Joseph K. Morrell, Khalid Rahmat, Wolfgang Roesner, Erich C. Schanzenbach, Gustavo E. Téllez, Louise Trevillyan
2000 J jnl
LSS: A system for production logic synthesis.
IBM J. Res. Dev.
John A. Darringer, Daniel Brand, John V. Gerbi, William H. Joyner Jr., Louise Trevillyan
1997 J jnl
Control-flow versus data-flow-based scheduling: combining both approaches in an adaptive scheduling system.
IEEE Trans. Very Large Scale Integr. Syst.
Reinaldo A. Bergamaschi, Salil Raje, Indira Nair, Louise Trevillyan
1996 A* conf
Representative Traces for Processor Models with Infinite Cache.
HPCA
Vijay S. Iyengar, Louise Trevillyan, Pradip Bose
1992 A ed.
1992 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1992, Santa Clara, CA, USA, November 8-12, 1992. Digest of Technical Papers
ICCAD
Louise Trevillyan, Michael R. Lightner
1991 J jnl
Global flow optimization in automatic logic design.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
C. Leonard Berman, Louise Trevillyan
1989 A conf
Functional comparison of logic designs for VLSI circuits.
ICCAD
C. Leonard Berman, Louise Trevillyan
1988 A conf
Improved logic optimization using global flow analysis.
ICCAD
C. Leonard Berman, Louise Trevillyan
1987 A* conf
An Overview of Logic Synthesis Systems.
DAC
Louise Trevillyan
1986 J jnl
Global Flow Analysis in Automatic Logic Design.
IEEE Trans. Computers
Louise Trevillyan, William H. Joyner Jr., C. Leonard Berman
1986 A* conf
Technology adaption in logic synthesis.
DAC
William H. Joyner Jr., Louise Trevillyan, Daniel Brand, Theresa A. Nix, Steven C. Gundersen
1985 — conf
Production logic synthesis.
ACM Conference on Computer Science
John A. Darringer, Daniel Brand, William H. Joyner Jr., Louise Trevillyan, John V. Gerbi
1984 J jnl
LSS: A System for Production Logic Synthesis.
IBM J. Res. Dev.
John A. Darringer, Daniel Brand, John V. Gerbi, William H. Joyner Jr., Louise Trevillyan
1981 J jnl
Logic Synthesis Through Local Transformations.
IBM J. Res. Dev.
John A. Darringer, William H. Joyner Jr., C. Leonard Berman, Louise Trevillyan
1980 J jnl
The Experimental Compiling System.
IBM J. Res. Dev.
Frances E. Allen, J. Lawrence Carter, Janet Fabri, Jeanne Ferrante, William H. Harrison, Paul G. Loewner, Louise Trevillyan