Louis Scheffer

33 papers A* 8A 1C 1Journal 6Unranked 13

Year	Rank	Type	Title / Venue / Authors
2025	J	`jnl`	Autoproof: Automated Segmentation Proofreading for Connectomics. CoRR Gary B. Huang, William M. Katz, Stuart E. Berg, Louis Scheffer
2014	—	`conf`	Lessons from the neurons themselves. ASP-DAC Louis Scheffer
2014	J	`jnl`	Small Sample Learning of Superpixel Classifiers for EM Segmentation- Extended Version. CoRR Toufiq Parag, Stephen Plaza, Louis Scheffer
2014	—	`conf`	Small Sample Learning of Superpixel Classifiers for EM Segmentation. MICCAI (1) Toufiq Parag, Stephen M. Plaza, Louis Scheffer
2012	A*	`conf`	Design tools for artificial nervous systems. DAC Louis Scheffer
2010	A	`ed.`	2010 International Conference on Computer-Aided Design, ICCAD 2010, San Jose, CA, USA, November 7-11, 2010 ICCAD Louis Scheffer, Joel R. Phillips, Alan J. Hu
2010	—	`conf`	Physical design of biological systems. ISPD Louis Scheffer
2010	—	`conf`	SLIP: 10 years ago and 10 years from now. SLIP Patrick Groeneveld, Louis Scheffer, Dirk Stroobandt
2008	J	`jnl`	Statistical Timing Analysis: From Basic Principles to State of the Art. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. David T. Blaauw, Kaviraj Chopra, Ashish Srivastava, Louis Scheffer
2007	—	`conf`	A DFM aware, space based router. ISPD David Cross, Eric Nequist, Louis Scheffer
2007	A*	`conf`	CAD Implications of New Interconnect Technologies. DAC Louis Scheffer
2007	—	`conf`	Rules vs tools: what's the right way to address IC manufacturing complexity? ISPD Louis Scheffer, Lars Liebmann, Riko Rakojcic, David White
2007	J	`jnl`	Special issue on System-Level Interconnect Prediction. Integr. Igor L. Markov, Louis Scheffer, Dirk Stroobandt
2006	—	`conf`	An overview of on-chip interconnect variation. SLIP Louis Scheffer
2006	—	`ed.`	Proceedings of the 2006 International Symposium on Physical Design, ISPD 2006, San Jose, California, USA, April 9-12, 2006 ISPD Louis Scheffer
2005	—	`ed.`	Proceedings of the 2005 International Symposium on Physical Design, ISPD 2005, San Francisco, California, USA, April 3-6, 2005 ISPD Patrick Groeneveld, Louis Scheffer
2004	A*	`conf`	Is statistical timing statistically significant? DAC Richard Goldman, Kurt Keutzer, Clive Bittlestone, Ahsan Bootehsaz, Shekhar Y. Borkar, E. Chen, Louis Scheffer, Chandramouli Visweswariah
2004	—	`conf`	Physical CAD changes to incorporate design for lithography and manufacturability. ASP-DAC Louis Scheffer
2004	—	`ed.`	The Sixth International Workshop on System-Level Interconnect Prediction (SLIP 2004), Paris, France, February 14-15, 2004, Proceedings SLIP Louis Scheffer, Igor L. Markov
2004	—	`conf`	The great interconnect buffering debate: are you a chicken or an ostrich? ISPD Desmond Kirkpatrick, Peter J. Osler, Louis Scheffer, Prashant Saxena, Dennis Sylvester
2003	A*	`conf`	Nanometer design: place your bets. DAC Andrew B. Kahng, Shekhar Borkar, John M. Cohn, Antun Domic, Patrick Groeneveld, Louis Scheffer, Jean-Pierre Schoellkopf
2003	—	`conf`	Signal Integrity and Power Supply Network Analysis of Deep SubMicron Chips. PATMOS Louis Scheffer
2003	J	`jnl`	Some conditions under which hierarchical verification is O(N). IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Louis Scheffer
2003	—	`ed.`	The 5th International Workshop on System-Level Interconnect Prediction (SLIP 2003), Monterey, CA, USA, April 5-6, 2003, Proceedings SLIP Dennis Sylvester, Dirk Stroobandt, Louis Scheffer, Payman Zarkesh-Ha
2002	—	`conf`	Explicit computation of performance as a function of process variation. Timing Issues in the Specification and Synthesis of Digital Systems Louis Scheffer
2002	C	`conf`	Methodologies and Tools for Pipelined On-Chip Interconnect. ICCD Louis Scheffer
2001	A*	`conf`	Panel: Is Nanometer Design Under Control? DAC Andrew B. Kahng, Bing J. Sheu, Nancy Nettleton, John M. Cohn, Shekhar Borkar, Louis Scheffer, Ed Cheng, Sang Wang
2001	J	`jnl`	Timing- and crosstalk-driven area routing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Hsiao-Ping Tseng, Louis Scheffer, Carl Sechen
2000	A*	`conf`	Design closure (panel session): hope or hype? DAC Raul Camposano, Jacob Greidinger, Patrick Groeneveld, Michael Jackson, Lawrence T. Pileggi, Louis Scheffer
2000	—	`conf`	Why interconnect prediction doesn't work. SLIP Louis Scheffer, Eric Nequist
1998	A*	`conf`	Timing and Crosstalk Driven Area Routing. DAC Hsiao-Ping Tseng, Louis Scheffer, Carl Sechen
1997	—	`conf`	A roadmap of CAD tool changes for sub-micron interconnect problems. ISPD Louis Scheffer
1985	A*	`conf`	Hierarchical analysis of IC artwork with user defined abstraction rules. DAC Louis Scheffer, Ronny Soetarman