Loganathan Lingappan

24 papers A 3B 1C 1Misc 6Journal 7Unranked 6
YearRankTypeTitle / Venue / Authors
2025 — conf
Improved Silent Data Error Detection Through Test Optimization Using Reinforcement Learning.
IRPS
Manu Shamsa, John D. Martin, Mariano Phielipp, Thiago Macieira, Loganathan Lingappan, Brad Kelly, David P. Lerner, Michael Tucknott, Ethan Hansen
2018 — conf
An online framework for diagnosis of multiple defects in scan chains.
ISQED
Sarmad Tanwir, Michael S. Hsiao, Loganathan Lingappan
2018 A conf
Online Scan Diagnosis : A Novel Approach to Volume Diagnosis.
ITC
I-De Huang, Pallav Gupta, Loganathan Lingappan, Vijay Gangaram
2017 — conf
A Test Pattern Quality Metric for Diagnosis of Multiple Stuck-at and Transition faults.
ACM Great Lakes Symposium on VLSI
Sarmad Tanwir, Michael S. Hsiao, Loganathan Lingappan
2016 — conf
Hardware-in-the-loop model-less diagnostic test generation.
HLDVT
Sarmad Tanwir, Michael S. Hsiao, Loganathan Lingappan
2015 A conf
Information-theoretic and statistical methods of failure log selection for improved diagnosis.
ITC
Sarmad Tanwir, Sarvesh Prabhu, Michael S. Hsiao, Loganathan Lingappan
2013 B conf
Test generation for circuits with embedded memories using SMT.
ETS
Sarvesh Prabhu, Michael S. Hsiao, Loganathan Lingappan, Vijay Gangaram
2012 Misc conf
A Novel SMT-Based Technique for LFSR Reseeding.
VLSI Design
Sarvesh Prabhu, Michael S. Hsiao, Loganathan Lingappan, Vijay Gangaram
2012 Misc conf
A SMT-based diagnostic test generation method for combinational circuits.
VTS
Sarvesh Prabhu, Michael S. Hsiao, Loganathan Lingappan, Vijay Gangaram
2011 — conf
An Efficient 2-Phase Strategy to Achieve High Branch Coverage.
Asian Test Symposium
Sarvesh Prabhu, Michael S. Hsiao, Saparya Krishnamoorthy, Loganathan Lingappan, Vijay Gangaram, Jim Grundy
2011 J jnl
Strategies for scalable symbolic execution-driven test generation for programs.
Sci. China Inf. Sci.
Saparya Krishnamoorthy, Michael S. Hsiao, Loganathan Lingappan
2010 — conf
Tackling the Path Explosion Problem in Symbolic Execution-Driven Test Generation for Programs.
Asian Test Symposium
Saparya Krishnamoorthy, Michael S. Hsiao, Loganathan Lingappan
2009 J jnl
Fast Enhancement of Validation Test Sets for Improving the Stuck-at Fault Coverage of RTL Circuits.
IEEE Trans. Very Large Scale Integr. Syst.
Loganathan Lingappan, Vijay Gangaram, Niraj K. Jha, Sreejit Chakravarty
2007 J jnl
A Test Generation Framework for Quantum Cellular Automata Circuits.
IEEE Trans. Very Large Scale Integr. Syst.
Pallav Gupta, Niraj K. Jha, Loganathan Lingappan
2007 J jnl
Efficient Design for Testability Solution Based on Unsatisfiability for Register-Transfer Level Circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Loganathan Lingappan, Niraj K. Jha
2007 Misc conf
Fast Enhancement of Validation Test Sets to Improve Stuck-at Fault Coverage for RTL circuits.
VLSI Design
Loganathan Lingappan, Vijay Gangaram, Niraj K. Jha
2007 J jnl
Satisfiability-Based Automatic Test Program Generation and Design for Testability for Microprocessors.
IEEE Trans. Very Large Scale Integr. Syst.
Loganathan Lingappan, Niraj K. Jha
2006 Misc conf
Improving the Performance of Automatic Sequential Test Generation by Targeting Hard-to-Test Faults.
VLSI Design
Loganathan Lingappan, Niraj K. Jha
2006 J jnl
Satisfiability-based test generation for nonseparable RTL controller-datapath circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Loganathan Lingappan, Srivaths Ravi, Niraj K. Jha
2006 A conf
Test generation for combinational quantum cellular automata (QCA) circuits.
DATE
Pallav Gupta, Niraj K. Jha, Loganathan Lingappan
2006 J jnl
Test-Volume Reduction in Systems-on-a-Chip Using Heterogeneous and Multilevel Compression Techniques.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Loganathan Lingappan, Srivaths Ravi, Anand Raghunathan, Niraj K. Jha, Srimat T. Chakradhar
2005 Misc conf
Heterogeneous and Multi-Level Compression Techniques for Test Volume Reduction in Systems-on-Chip.
VLSI Design
Loganathan Lingappan, Srivaths Ravi, Anand Raghunathan, Niraj K. Jha, Srimat T. Chakradhar
2005 Misc conf
Unsatisfiability Based Efficient Design for Testability Solution for Register-Transfer Level Circuits.
VTS
Loganathan Lingappan, Niraj K. Jha
2003 C conf
Test Generation for Non-separable RTL Controller-datapath Circuits using a Satisfiability based Approach.
ICCD
Loganathan Lingappan, Srivaths Ravi, Niraj K. Jha