Lita Yang - RankMe

14 papers A* 2A 1C 1Misc 1Journal 3Unranked 6

Year	Rank	Type	Title / Venue / Authors
2025	A	`conf`	A 3D Design Methodology for Integrated Wearable SoCs: Enabling Energy Efficiency and Enhanced Performance at Iso-Area Footprint. DATE Huseyin Ekin Sumbul, Arne Symons, Lita Yang, Huichu Liu, Tony F. Wu, Matheus Trevisan Moreira, Debabrata Mohapatra, Abhinav Agarwal, Kaushik Ravindran, Chris Thompson, Yuecheng Li, Edith Beigné
2024	—	`conf`	11.2 A 3D integrated Prototype System-on-Chip for Augmented Reality Applications Using Face-to-Face Wafer Bonded 7nm Logic at <2μm Pitch with up to 40% Energy Reduction at Iso-Area Footprint. ISSCC Tony F. Wu, Huichu Liu, Huseyin Ekin Sumbul, Lita Yang, Dipti Baheti, Jeremy Coriell, William Koven, Anu Krishnan, Mohit Mittal, Matheus Trevisan Moreira, Max Waugaman, Laurent Ye, Edith Beigné
2024	—	`conf`	Characterization and Design of 3D-Stacked Memory for Image Signal Processing on AR/VR Devices. MEMSYS Lita Yang, Changjung Kao, Sriseshan Srikanth, Huseyin Ekin Sumbul, Tony F. Wu, Huichu Liu, Edith Beigné
2022	J	`jnl`	Three-Dimensional Stacked Neural Network Accelerator Architectures for AR/VR Applications. IEEE Micro Lita Yang, Robert M. Radway, Yu-Hsin Chen, Tony F. Wu, Huichu Liu, Elnaz Ansari, Vikas Chandra, Subhasish Mitra, Edith Beigné
2020	A*	`conf`	Pushing the Limits of Narrow Precision Inferencing at Cloud Scale with Microsoft Floating Point. NeurIPS Bita Darvish Rouhani, Daniel Lo, Ritchie Zhao, Ming Liu, Jeremy Fowers, Kalin Ovtcharov, Anna Vinogradsky, Sarah Massengill, Lita Yang, Ray Bittner, Alessandro Forin, Haishan Zhu, Taesik Na, Prerak Patel, Shuai Che, Lok Chand Koppaka, Xia Song, Subhojit Som, Kaustav Das, Saurabh Tiwary, Steven K. Reinhardt, Sitaram Lanka, Eric S. Chung, Doug Burger
2019	J	`jnl`	An Always-On 3.8 $\mu$ J/86% CIFAR-10 Mixed-Signal Binary CNN Processor With All Memory on Chip in 28-nm CMOS. IEEE J. Solid State Circuits Daniel Bankman, Lita Yang, Bert Moons, Marian Verhelst, Boris Murmann
2018	—	`conf`	An always-on 3.8μJ/86% CIFAR-10 mixed-signal binary CNN processor with all memory on chip in 28nm CMOS. ISSCC Daniel Bankman, Lita Yang, Bert Moons, Marian Verhelst, Boris Murmann
2018	J	`jnl`	BinarEye: An Always-On Energy-Accuracy-Scalable Binary CNN Processor With All Memory On Chip in 28nm CMOS. CoRR Bert Moons, Daniel Bankman, Lita Yang, Boris Murmann, Marian Verhelst
2018	—	`conf`	BinarEye: An always-on energy-accuracy-scalable binary CNN processor with all memory on chip in 28nm CMOS. CICC Bert Moons, Daniel Bankman, Lita Yang, Boris Murmann, Marian Verhelst
2018	C	`conf`	Bit Error Tolerance of a CIFAR-10 Binarized Convolutional Neural Network Processor. ISCAS Lita Yang, Daniel Bankman, Bert Moons, Marian Verhelst, Boris Murmann
2018	A*	`conf`	TRIG: hardware accelerator for inference-based applications and experimental demonstration using carbon nanotube FETs. DAC Gage Hills, Daniel Bankman, Bert Moons, Lita Yang, Jake Hillard, Alex Kahng, Rebecca Park, Marian Verhelst, Boris Murmann, Max M. Shulaker, H.-S. Philip Wong, Subhasish Mitra
2017	—	`conf`	Approximate SRAM for Energy-Efficient, Privacy-Preserving Convolutional Neural Networks. ISVLSI Lita Yang, Boris Murmann
2017	—	`conf`	SRAM voltage scaling for energy-efficient convolutional neural networks. ISQED Lita Yang, Boris Murmann
2015	Misc	`conf`	Mixed-signal circuits for embedded machine-learning applications. ACSSC Boris Murmann, Daniel Bankman, Elaina Chai, Daisuke Miyashita, Lita Yang