Lisa M. Guerra

19 papers A* 2A 4C 1Misc 1Journal 7Unranked 4
YearRankTypeTitle / Venue / Authors
2000 J jnl
Cut-based functional debugging for programmable systems-on-chip.
IEEE Trans. Very Large Scale Integr. Syst.
Darko Kirovski, Miodrag Potkonjak, Lisa M. Guerra
1999 A* conf
Cycle and Phase Accurate DSP Modeling and Integration for HW/SW Co-Verification.
DAC
Lisa M. Guerra, Joachim Fitzner, Dipankar Talukdar, Chris Schläger, Bassam Tabbara, Vojin Zivojnovic
1999 J jnl
Improving the observability and controllability of datapaths foremulation-based debugging.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Darko Kirovski, Miodrag Potkonjak, Lisa M. Guerra
1999 A conf
Throughput optimization of general non-linear computations.
ICCAD
Inki Hong, Miodrag Potkonjak, Lisa M. Guerra
1998 A* conf
A Methodology for Guided Behavioral-Level Optimization.
DAC
Lisa M. Guerra, Miodrag Potkonjak, Jan M. Rabaey
1998 J jnl
Behavioral-level synthesis of heterogeneous BISR reconfigurable ASIC's.
IEEE Trans. Very Large Scale Integr. Syst.
Lisa M. Guerra, Miodrag Potkonjak, Jan M. Rabaey
1998 A conf
Functional debugging of systems-on-chip.
ICCAD
Darko Kirovski, Miodrag Potkonjak, Lisa M. Guerra
1997 J jnl
A partitioning scheme for optimizing interconnect power.
IEEE J. Solid State Circuits
Renu Mehra, Lisa M. Guerra, Jan M. Rabaey
1996 J jnl
Low-power architectural synthesis and the impact of exploiting locality.
J. VLSI Signal Process.
Renu Mehra, Lisa M. Guerra, Jan M. Rabaey
1996 J jnl
Performance optimization using template mapping for datapath-intensive high-level synthesis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Miguel R. Corazao, Marwan A. Khalaf, Lisa M. Guerra, Miodrag Potkonjak, Jan M. Rabaey
1996 J jnl
Permissible functions for multioutput components in combinational logic optimization.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Yosinori Watanabe, Lisa M. Guerra, Robert K. Brayton
1995 Misc conf
Design guidance in the power dimension.
ICASSP
Jan M. Rabaey, Lisa M. Guerra, Renu Mehra
1994 — conf
Concurrency characteristics in DSP programs.
ICASSP (2)
Lisa M. Guerra, Miodrag Potkonjak, Jan M. Rabaey
1993 — conf
Heterogeneous BISR techniques for yield and reliability enhancement using high level synthesis transformations.
ASAP
Miodrag Potkonjak, Lisa M. Guerra, Jan M. Rabaey
1993 — conf
High Level Synthesis Techniques for Efficient Built-In-Self Repair.
DFT
Lisa M. Guerra, Miodrag Potkonjak, Jan M. Rabaey
1993 A conf
High level synthesis for reconfigurable datapath structures.
ICCAD
Lisa M. Guerra, Miodrag Potkonjak, Jan M. Rabaey
1993 A conf
Instruction set mapping for performance optimization.
ICCAD
Miguel R. Corazao, Marwan A. Khalaf, Lisa M. Guerra, Miodrag Potkonjak, Jan M. Rabaey
1993 C conf
Logic Optimization with Multi-Output Gates.
ICCD
Yosinori Watanabe, Lisa M. Guerra, Robert K. Brayton
1992 — conf
An integrated system for rapid prototyping of high performance algorithm specific data paths.
ASAP
D. C. Chen, Lisa M. Guerra, E. H. Ng, Miodrag Potkonjak, D. P. Schultz, Jan M. Rabaey