Lirida A. B. Naviner

102 papers A 1B 4C 8Journal 30Unranked 59

Year	Rank	Type	Title / Venue / Authors
2024	J	`jnl`	Analysis of Combinational Circuit Failure Rate based on Graph Partitioning and Probabilistic Binomial Approach. J. Electron. Test. Esther Goudet, Fabio Sureau, Paul Breuil, Luis Peña Treviño, Lirida A. B. Naviner, Jean-Marc Daveau, Philippe Roche
2023	—	`conf`	Fast analysis of combinatorial netlists correctness rate based on binomial law and partitioning. LATS Esther Goudet, Luis Peña Treviño, Lirida A. B. Naviner, Jean-Marc Daveau, Philippe Roche
2022	B	`conf`	Minconvnets: a New Class of Multiplication-Less Neural Networks. ICIP Xuecan Yang, Sumanta Chaudhuri, Laurence Likforman, Lirida A. B. Naviner
2022	J	`jnl`	OPCoSA: an Optimized Product Code for space applications. Integr. David C. C. Freitas, Jarbas Silveira, César A. M. Marcon, Lirida A. B. Naviner, João Cesar M. Mota
2021	J	`jnl`	A survey of in-spin transfer torque MRAM computing. Sci. China Inf. Sci. Hao Cai, Bo Liu, Juntong Chen, Lirida A. B. Naviner, Yongliang Zhou, Zhen Wang, Jun Yang
2021	—	`conf`	Cryogenic In-MRAM Computing. NANOARCH Yaoru Hou, We Ge, Yanan Guo, Lirida A. B. Naviner, You Wang, Bo Liu, Jun Yang, Hao Cai
2021	—	`conf`	Hybrid MTJ-CMOS Integration for Sigma-Delta ADC. NANOARCH Yu-ang Wu, Lirida A. B. Naviner, Hao Cai
2021	J	`jnl`	MinConvNets: A new class of multiplication-less Neural Networks. CoRR Xuecan Yang, Sumanta Chaudhuri, Laurence Likforman, Lirida A. B. Naviner
2021	—	`conf`	Ultra-low Power Access Strategy for Process-Voltage-Temperature Aware STT-MRAM. ASICON You-You Zhang, Lirida A. B. Naviner, Hao Cai
2020	J	`jnl`	Magnetic Tunnel Junction Applications. Sensors Nilson Maciel, Elaine Crespo Marques, Lirida A. B. Naviner, Yongliang Zhou, Hao Cai
2020	—	`conf`	Quad-Approx CNNs for Embedded Object Detection Systems. ICECS Xuecan Yang, Sumanta Chaudhuri, Lirida A. B. Naviner, Laurence Likforman
2019	J	`jnl`	A Review of Sparse Recovery Algorithms. IEEE Access Elaine Crespo Marques, Nilson Maciel, Lirida A. B. Naviner, Hao Cai, Jun Yang
2019	—	`conf`	Comprehensive Pulse Shape Induced Failure Analysis in Voltage-Controlled MRAM. NANOARCH Mingyue Liu, Hao Cai, Menglin Han, Lei Xie, Jun Yang, Lirida A. B. Naviner
2019	C	`conf`	Deep Learning Approaches for Sparse Recovery in Compressive Sensing. ISPA Elaine Crespo Marques, Nilson Maciel, Lirida A. B. Naviner, Hao Cai, Jun Yang
2019	—	`conf`	Nonlinear Functions in Learned Iterative Shrinkage-Thresholding Algorithm for Sparse Signal Recovery. SiPS Elaine Crespo Marques, Nilson Maciel, Lirida A. B. Naviner, Hao Cai, Jun Yang
2019	J	`jnl`	Optimal asymmetrical back plane biasing for energy efficient digital circuits in 28 nm UTBB FD-SOI. Integr. Francisco Veirano, Lirida A. B. Naviner, Fernando Silveira
2018	—	`conf`	Compressed Sensing for Wideband HF Channel Estimation. ICFSP Elaine Crespo Marques, Nilson Maciel, Lirida A. B. Naviner, Hao Cai, Jun Yang
2018	—	`conf`	Design Space Exploration of Magnetic Tunnel Junction based Stochastic Computing in Deep Learning. ACM Great Lakes Symposium on VLSI You Wang, Yue Zhang, Youguang Zhang, Weisheng Zhao, Hao Cai, Lirida A. B. Naviner
2018	—	`conf`	Design, Synthesis and Application of A Novel Approximate Adder. MWSCAS Tian Ban, Baokun Wang, Lirida A. B. Naviner
2018	C	`conf`	Enabling Resilient Voltage-Controlled MeRAM Using Write Assist Techniques. ISCAS Hao Cai, You Wang, Wang Kang, Lirida A. B. Naviner, Weiwei Shan, Jun Yang, Weisheng Zhao
2018	—	`conf`	MRAM-on-FDSOI Integration: A Bit-Cell Perspective. ISVLSI Hao Cai, You Wang, Wang Kang, Lirida A. B. Naviner, Xinning Liu, Jun Yang, Weisheng Zhao
2018	—	`conf`	Probability aware fault-injection approach for SER estimation. LATS Fábio B. Armelin, Lirida A. B. Naviner, Roberto d'Amore
2018	—	`conf`	Reliability Emphasized MTJ/CMOS Hybrid Circuit Towards Ultra-Low Power. DCIS Hao Cai, Menglin Han, You Wang, Lirida A. B. Naviner, Xinning Liu, Jun Yang, Weisheng Zhao
2018	—	`conf`	Reliability evaluation of circuits designed in multi- and single-stage versions. LASCAS Rafael B. Schvittz, Matheus F. Pontes, Cristina Meinhardt, Denis Teixeira Franco, Lirida A. B. Naviner, Leomar S. da Rosa, Paulo F. Butzen
2018	J	`jnl`	Single-event transient effects on dynamic comparator in 28 nm FDSOI CMOS technology. Microelectron. Reliab. Nilson Maciel, Elaine Crespo Marques, Lirida A. B. Naviner, Hao Cai
2018	—	`conf`	Stability and Variability Emphasized STT-MRAM Sensing Circuit With Performance Enhancement. APCCAS Menglin Han, Hao Cai, Jun Yang, Lirida A. B. Naviner, You Wang, Weisheng Zhao
2017	J	`jnl`	Analysis of ageing effects on ARTIX7 XILINX FPGA. Microelectron. Reliab. Mariem Slimani, K. Benkalaia, Lirida A. B. Naviner
2017	—	`conf`	Asymmetrical length biasing for energy efficient digital circuits. LASCAS Francisco Veirano, Fernando Silveira, Lirida A. B. Naviner
2017	—	`conf`	Energy Efficient Magnetic Tunnel Junction Based Hybrid LSI Using Multi-Threshold UTBB-FD-SOI Device. ACM Great Lakes Symposium on VLSI Hao Cai, You Wang, Lirida A. B. Naviner, Wang Kang, Weisheng Zhao
2017	—	`conf`	Novel Pulsed-Latch Replacement in Non-Volatile Flip-Flop Core. ISVLSI Hao Cai, You Wang, Lirida A. B. Naviner, Weisheng Zhao
2017	J	`jnl`	Optimum nMOS/pMOS Imbalance for Energy Efficient Digital Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. Francisco Veirano, Lirida A. B. Naviner, Fernando Silveira
2016	—	`conf`	A novel circuit design of true random number generator using magnetic tunnel junction. NANOARCH You Wang, Hao Cai, Lirida A. B. Naviner, Jacques-Olivier Klein, Jianlei Yang, Weisheng Zhao
2016	J	`jnl`	A process-variation-resilient methodology of circuit design by using asymmetrical forward body bias in 28 nm FDSOI. Microelectron. Reliab. You Wang, Hao Cai, Lirida A. B. Naviner, Xiaoxuan Zhao, Yue Zhang, Mariem Slimani, Jacques-Olivier Klein, Weisheng Zhao
2016	—	`conf`	Approximate computing in MOS/spintronic non-volatile full-adder. NANOARCH Hao Cai, You Wang, Lirida A. B. Naviner, Zhaohao Wang, Weisheng Zhao
2016	C	`conf`	Design considerations for reliable OxRAM-based non-volatile flip-flops in 28nm FD-SOI technology. ISCAS Nenad Jovanovic, Olivier Thomas, Elisa Vianello, Bosko Nikolic, Lirida A. B. Naviner
2016	—	`conf`	Inserting permanent fault input dependence on PTM to improve robustness evaluation. SBCCI Rafael B. Schivittz, Rafael Fritz, Denis Teixeira Franco, Lirida A. B. Naviner, Cristina Meinhardt, Paulo F. Butzen
2016	J	`jnl`	Minimum Operating Voltage Due to Intrinsic Noise in Subthreshold Digital Logic in Nanoscale CMOS. J. Low Power Electron. Francisco Veirano, Fernando Silveira, Lirida A. B. Naviner
2016	—	`conf`	Pushing minimum energy limits by optimal asymmetrical back plane biasing in 28 nm UTBB FD-SOI. PATMOS Francisco Veirano, Lirida A. B. Naviner, Fernando Silveira
2016	J	`jnl`	Reliability analysis of hybrid spin transfer torque magnetic tunnel junction/CMOS majority voters. Microelectron. Reliab. Mariem Slimani, Paulo F. Butzen, Lirida A. B. Naviner, You Wang, Hao Cai
2015	J	`jnl`	A dual-rail compact defect-tolerant multiplexer. Microelectron. Reliab. Arwa Ben Dhia, Mariem Slimani, Hao Cai, Lirida A. B. Naviner
2015	J	`jnl`	A novel analytical method for defect tolerance assessment. Microelectron. Reliab. Mariem Slimani, Arwa Ben Dhia, Lirida A. B. Naviner
2015	—	`conf`	A tool for transient fault analysis in combinational circuits. ICECS Mariem Slimani, Lirida A. B. Naviner
2015	J	`jnl`	Accurate reliability analysis of concurrent checking circuits employing an efficient analytical method. Microelectron. Reliab. Ting An, Kaikai Liu, Hao Cai, Lirida A. B. Naviner
2015	—	`conf`	An energy efficient D2D LTE structure for PMR based on FlashLinQ. ISWCS Xavier Pons, Christophe Gruet, Eric Georgeaux, Lirida A. B. Naviner
2015	J	`jnl`	Compact thermal modeling of spin transfer torque magnetic tunnel junction. Microelectron. Reliab. You Wang, Hao Cai, Lirida A. B. Naviner, Yue Zhang, Jacques-Olivier Klein, Weisheng Zhao
2015	—	`conf`	D2D broadcast communications for 4G PMR networks. NTMS Xavier Pons Masbernat, Christophe Gruet, Eric Georgeaux, Lirida A. B. Naviner
2015	—	`conf`	Frequency and voltage effects on SER on a 65nm Sparc-V8 microprocessor under radiation test. IRPS Cyril Bottoni, Benjamin Coeffic, Jean-Marc Daveau, Gilles Gasiot, Fady Abouzeid, Sylvain Clerc, Lirida A. B. Naviner, Philippe Roche
2015	—	`conf`	Partial triplication of a SPARC-V8 microprocessor using fault injection. LASCAS Cyril Bottoni, Benjamin Coeffic, Jean-Marc Daveau, Lirida A. B. Naviner, Philippe Roche
2015	J	`jnl`	Ultra wide voltage range consideration of reliability-aware STT magnetic flip-flop in 28 nm FDSOI technology. Microelectron. Reliab. Hao Cai, You Wang, Lirida A. B. Naviner, W. S. Zhao
2014	—	`conf`	A defect-tolerant multiplexer using differential logic for FPGAs. MIXDES Arwa Ben Dhia, Mariem Slimani, Lirida A. B. Naviner
2014	C	`conf`	A hybrid reliability assessment method and its support of sequential logic modelling. IOLTS Samuel N. Pagliarini, Lirida A. B. Naviner, Jean-François Naviner, Dhiraj K. Pradhan
2014	—	`conf`	An energy efficient vertical handover decision algorithm. GLOBECOM Workshops Xavier Pons Masbernat, Agapi Mesodiakaki, Christophe Gruet, Lirida A. B. Naviner, Ferran Adelantado, Luis Alonso, Christos V. Verikoukis
2014	—	`conf`	Battery-aware network discovery algorithm for mobile terminals within heterogeneous networks. CAMAD Xavier Pons Masbernat, Saud Althunibat, Godfrey Kibalya, Christophe Gruet, Lirida A. B. Naviner, Fabrizio Granelli
2014	J	`jnl`	Compact model of magnetic tunnel junction with stochastic spin transfer torque switching for reliability analyses. Microelectron. Reliab. You Wang, Yue Zhang, Erya Deng, Jacques-Olivier Klein, Lirida A. B. Naviner, Weisheng Zhao
2014	C	`conf`	Comparative study of defect-tolerant multiplexers for FPGAs. IOLTS Arwa Ben Dhia, Mariem Slimani, Lirida A. B. Naviner
2014	—	`conf`	Cross logic: A new approach for defect-tolerant circuits. ICICDT Mariem Slimani, Arwa Ben Dhia, Lirida A. B. Naviner
2014	—	`conf`	Efficient computation of combinational circuits reliability based on probabilistic transfer matrix. ICICDT Lirida A. B. Naviner, Kaikai Liu, Hao Cai, Jean-François Naviner
2014	—	`conf`	Impact of Cluster Size on Routability, Testability and Robustness of a Cluster in a Mesh FPGA. ISVLSI Saif-Ur Rehman, Adrien Blanchardon, Arwa Ben Dhia, Mounir Benabdenbi, Roselyne Chotin-Avot, Lirida A. B. Naviner, Lorena Anghel, Habib Mehrez, Emna Amouri, Zied Marrakchi
2014	—	`conf`	Improving the robustness of a switch box in a mesh of clusters FPGA. LATW Arwa Ben Dhia, Mariem Slimani, Lirida A. B. Naviner
2014	—	`conf`	OxRAM-based non volatile flip-flop in 28nm FDSOI. NEWCAS Nenad Jovanovic, Olivier Thomas, Elisa Vianello, Jean-Michel Portal, Bosko Nikolic, Lirida A. B. Naviner
2013	—	`conf`	A defect-tolerant cluster in a mesh SRAM-based FPGA. FPT Arwa Ben Dhia, Saif-Ur Rehman, Adrien Blanchardon, Lirida A. B. Naviner, Mounir Benabdenbi, Roselyne Chotin-Avot, Emna Amouri, Habib Mehrez, Zied Marrakchi
2013	—	`conf`	A general cost-effective design structure for probabilistic-based noise-tolerant logic functions in nanometer CMOS technology. EUROCON Kaikai Liu, Ting An, Hao Cai, Lirida A. B. Naviner, Jean-François Naviner, Hervé Petit
2013	—	`conf`	Comparison of fault-tolerant fabless CLBs in SRAM-based FPGAs. LATW Arwa Ben Dhia, Lirida A. B. Naviner, Philippe Matherat
2013	—	`conf`	Evaluating CLB designs under multiple SETs in SRAM-based FPGAs. DFTS Arwa Ben Dhia, Lirida A. B. Naviner, Philippe Matherat
2013	—	`conf`	Modeling of transient faults and fault-tolerant design in nanoelectronics. MWSCAS Tian Ban, Jianxin Wang, Ting An, Lirida A. B. Naviner
2013	—	`conf`	Reliability analysis of combinational circuits with the influences of noise and single-event transients. DFTS Kaikai Liu, Hao Cai, Ting An, Lirida A. B. Naviner, Jean-François Naviner, Hervé Petit
2013	—	`conf`	Reliability assessment of combinational logic using first-order-only fanout reconvergence analysis. MWSCAS Samuel N. Pagliarini, Tian Ban, Lirida A. B. Naviner, Jean-François Naviner
2013	—	`conf`	Selective hardening against multiple faults employing a net-based reliability analysis. NEWCAS Samuel N. Pagliarini, Lirida A. B. Naviner, Jean-François Naviner
2013	—	`conf`	Single event transient mitigation through pulse quenching: Effectiveness at circuit level. ICECS Samuel N. Pagliarini, Lirida A. B. Naviner, Jean-François Naviner
2013	—	`conf`	Uplink energy efficiency in LTE systems. CAMAD Xavier Pons Masbernat, Raúl Palacios, Christophe Gruet, Lirida A. B. Naviner, Hugo Marques, Fabrizio Granelli, Jonathan Rodriguez
2012	C	`conf`	Analyzing and alleviating the impact of errors on an SRAM-based FPGA cluster. IOLTS Arwa Ben Dhia, Lirida A. B. Naviner, Philippe Matherat
2012	—	`conf`	Green solutions for future LTE PMR networks. CAMAD Xavier Pons Masbernat, Christophe Gruet, Frédéric Fraysse, Serge Contal, Lirida A. B. Naviner
2012	—	`conf`	Reliability analysis of a Reed-Solomon decoder. MWSCAS Kaikai Liu, Tian Ban, Lirida A. B. Naviner, Jean-François Naviner
2012	—	`conf`	Selective hardening methodology for combinational logic. LATW Samuel Nascimento Pagliarini, Lirida A. B. Naviner, Jean-François Naviner
2011	C	`conf`	An approach to reduce computational cost in combinatorial logic netlist reliability analysis using circuit clustering and conditional probabilities. IOLTS Josep Torras Flaquer, Jean-Marc Daveau, Lirida A. B. Naviner, Philippe Roche
2011	J	`jnl`	FIFA: A fault-injection-fault-analysis-based tool for reliability assessment at RTL level. Microelectron. Reliab. Lirida A. B. Naviner, Jean-François Naviner, G. G. dos Santos Jr., Elaine Crespo Marques, Nilson M. Paiva Jr.
2011	J	`jnl`	Progressive module redundancy for fault-tolerant designs in nanoelectronics. Microelectron. Reliab. Tian Ban, Lirida A. B. Naviner
2010	J	`jnl`	An efficient tool for reliability improvement based on TMR. Microelectron. Reliab. Elaine Crespo Marques, Lirida A. B. Naviner, Jean-François Naviner
2010	J	`jnl`	Fast reliability analysis of combinatorial logic circuits using conditional probabilities. Microelectron. Reliab. Josep Torras Flaquer, Jean-Marc Daveau, Lirida A. B. Naviner, Philippe Roche
2010	—	`conf`	Handling reconvergent paths using conditional probabilities in combinatorial logic netlist reliability estimation. ICECS Josep Torras Flaquer, Jean-Marc Daveau, Lirida A. B. Naviner, Philippe Roche
2010	—	`conf`	Level matrix propagation for reliability analysis of nano-scale circuits based on probabilistic transfer matrix. ISQED Hicham Ezzat, Lirida A. B. Naviner
2010	—	`conf`	On evaluating the signal reliability of self-checking arithmetic circuits. SBCCI Denis Teixeira Franco, Maí Correia Vasconcelos, Lirida A. B. Naviner, Jean-François Naviner
2010	J	`jnl`	Using error tolerance of target application for efficient reliability improvement of digital circuits. Microelectron. Reliab. G. G. dos Santos, Elaine Crespo Marques, Lirida A. B. Naviner, Jean-François Naviner
2009	C	`conf`	A 65 nm CMOS Digital Processor for Multi-mode Time Interleaved High-pass SigmaDelta A/D Converters. ISCAS Ali Beydoun, Van Tam Nguyen, Lirida A. B. Naviner, Patrick Loumeau
2008	—	`conf`	On the output events in concurrent error detection schemes. ICECS Maí Correia R. de Vasconcelos, Denis Teixeira Franco, Lirida A. B. Naviner, Jean-François Naviner
2008	J	`jnl`	Relevant metrics for evaluation of concurrent error detection schemes. Microelectron. Reliab. Maí Correia R. de Vasconcelos, Denis Teixeira Franco, Lirida A. B. Naviner, Jean-François Naviner
2008	—	`conf`	Reliability analysis of logic circuits based on signal probability. ICECS Denis Teixeira Franco, Maí Correia Vasconcelos, Lirida A. B. Naviner, Jean-François Naviner
2008	J	`jnl`	Signal probability for reliability evaluation of logic circuits. Microelectron. Reliab. Denis Teixeira Franco, Maí Correia Vasconcelos, Lirida A. B. Naviner, Jean-François Naviner
2006	J	`jnl`	An iterative reconfigurability approach for WCDMA high-data-rate communications. IEEE Wirel. Commun. Ioannis Krikidis, Jean-Luc Danger, Lirida A. B. Naviner
2006	J	`jnl`	Yield and reliability issues in nanoelectronic technologies. Ann. des Télécommunications Denis Teixeira Franco, Jean-François Naviner, Lirida A. B. Naviner
2005	—	`conf`	Design and hardware implementation of digital channel selection decimating filter for multistandard receiver. ICECS Khaled Grati, Adel Ghazel, Lirida A. B. Naviner
2005	—	`conf`	Heterogeneous implementation of a rake receiver for DS-CDMA communication systems. ICECS Daniel C. de Souza, Ioannis Krikidis, Lirida A. B. Naviner, Jean-Luc Danger, M. A. de Barros, B. G. A. Neto
2005	B	`conf`	Reconfigurable Implementation Issues of a Detection Scheme for DS-CDMA High Data Rate Connections. PIMRC Ioannis Krikidis, Jean-Luc Danger, Lirida A. B. Naviner
2004	B	`conf`	A finger configuration algorithm for a reconfigurable Rake receiver. WCNC Ioannis Krikidis, Jean-Luc Danger, Lirida A. B. Naviner
2003	B	`conf`	Hardware implementation issues of a BMS decoding approach for AG based codes. WCNC Zouhair M. Belkoura, Lirida A. B. Naviner
2002	J	`jnl`	Analog to digital conversion: technical aspects. Ann. des Télécommunications Patrick Loumeau, Jean-François Naviner, Hervé Petit, Lirida A. B. Naviner, Patricia Desgreys
2002	J	`jnl`	On design and implementation of a decimation filter for multistandard wireless transceivers. IEEE Trans. Wirel. Commun. Adel Ghazel, Lirida A. B. Naviner, Khaled Grati
2002	—	`conf`	Relaxed decimation filter specifications for wireless transceivers. ICECS Khaled Grati, Adel Ghazel, Lirida A. B. Naviner
2001	—	`conf`	Antialiasing filtering influences on ADC specifications for radio receivers. ICECS Elizabeth Colin, Patrick Loumeau, Lirida A. B. Naviner, Jean-François Naviner
2001	—	`conf`	Design and implementation of cascade decimation filter for radio communications. ICECS Khaled Grati, Adel Ghazel, Lirida A. B. Naviner, Faker Moatamri
2001	—	`conf`	Trade-off between antialiasing filter and analog-to-digital converters specifications in homodyne radio frequency receivers. VTC Fall Elizabeth Colin, Lirida A. B. Naviner, Patrick Loumeau, Jean-François Naviner
1999	A	`conf`	High-Performance Low-Cost Implementation of Two-Dimensional DCT Processor nn FPGA. FPGA Lirida A. B. Naviner, Jean-Luc Danger, C. Laurent