Lingxin Meng

17 papers C 3Journal 8Unranked 6
YearRankTypeTitle / Venue / Authors
2026 J jnl
A High-Precision Level-Crossing Pipelined ADC With Trigger-Sampled Backend Stage.
IEEE J. Solid State Circuits
Zexin Wang, Lingxin Meng, Menglian Zhao, Mengyu Li, Shuang Song, Zhangming Zhu, Zhichao Tan
2025 J jnl
A 0.7 V 4.2
IEICE Electron. Express
Junqi Liu, Menglian Zhao, Zhaonan Lu, Lingxin Meng, Zhichao Tan
2025 — conf
A 1V 9-86 fJ/Conv.Step 72.5dB-SNDR Level-Crossing Pipelined ADC with Triggered Sampling and Level Feedback.
CICC
Zexin Wang, Lingxin Meng, Menglian Zhao, Mengyu Li, Shuang Song, Zhichao Tan
2025 J jnl
A 93.6-dB SNDR Fully Dynamic CT-DT Noise-Shaping SAR ADC With Closed-Loop Capacitively Coupled Two-Stage FIA.
IEEE J. Solid State Circuits
Lingxin Meng, Shuang Song, Menglian Zhao, Zhichao Tan
2025 J jnl
An 871 nW 96.2 dB SNDR Pipelined Second-Order Noise-Shaping SAR ADC Employing Charge-Efficient CLS-Assisted Residue Amplifier.
IEEE Trans. Circuits Syst. I Regul. Pap.
Shan Zhang, Lingxin Meng, Zhaonan Lu, Shuang Song, Wanyuan Qu, Menglian Zhao, Zhichao Tan
2025 J jnl
MFFGCN: Multimodal Feature Fusion Graph Convolution Network for Radio Map Estimation With Uneven Spatial Sampling.
IEEE Trans. Mob. Comput.
Han Zhang, Yu Han, Lingxin Meng, Guan Gui, Wei Xiang, Yun Lin
2025 C conf
SQNR Improvement of Incremental Zoom ADCs with Raised-Order CoI Filter and Dither Injection.
ISCAS
Lingxin Meng, Menglian Zhao, Zhichao Tan
2024 C conf
A 0.5V 723nW 84.3dB-SNDR Dynamic Zoom ADC with CLS-Assisted Capacitively-Biased FIA.
ISCAS
Weiqiang Chen, Lingxin Meng, Yining Zhao, Menglian Zhao, Zhichao Tan
2024 — conf
A 93.6dB-SNDR 5kHz-BW Fully Dynamic Hybrid CT-DT Noise Shaping SAR ADC.
CICC
Lingxin Meng, Menglian Zhao, Zhichao Tan
2024 J jnl
A Partially Feedback NSSAR Embedded Third-Order Delta-Sigma Modulator With Gain-Boosted Two-Stage FIAs.
IEEE J. Solid State Circuits
Lingxin Meng, Junsheng Chen, Menglian Zhao, Zhichao Tan
2024 — conf
An 871nW 96.2dB-SNDR Pipelined NS SAR ADC Achieving 180.8dB-FoMSNDR with a Charge-Efficient CLS-Assisted Two-Stage FIA.
CICC
Shan Zhang, Lingxin Meng, Zhaonan Lu, Wanyuan Qu, Shuang Song, Menglian Zhao, Zhichao Tan
2023 J jnl
A 1.2-V 2.87-μ W 94.0-dB SNDR Discrete-Time 2-0 MASH Delta-Sigma ADC.
IEEE J. Solid State Circuits
Lingxin Meng, Yaopeng Hu, Yibo Zhao, Wanyuan Qu, Le Ye, Menglian Zhao, Zhichao Tan
2023 C conf
A 94.6dB-SNDR 50kHz-BW 1-1-1 MASH ADC Using OTA-FIA Based Integrators.
ISCAS
Xirui Hao, Junsheng Chen, Lingxin Meng, Menglian Zhao, Zhichao Tan
2023 — conf
An 18.2μW 101.1dB DR Fully-Dynamic ΔΣ ADC with Partially-Feedback Noise-Shaping Quantizer and CLS-Embedded Two-Stage FIAs.
ESSCIRC
Lingxin Meng, Junsheng Chen, Menglian Zhao, Zhichao Tan
2023 — conf
Low-Frequency Features Optimization for Transferability Enhancement in Radar Target Adversarial Attack.
ICANN (5)
Bo Peng, Bowen Peng, Jie Zhou, Xichen Huang, Lingxin Meng, Xunzhang Gao
2022 — conf
An Energy-Efficient Readout Circuit Based on Incremental Delta-Sigma ADC with Decimation Filter for CMOS Image Sensors.
APCCAS
Junsheng Chen, Lingxin Meng, Menglian Zhao, Zhichao Tan
2018 J jnl
Inverse optimal design of input-to-state stabilisation for affine nonlinear systems with input delays.
Int. J. Syst. Sci.
Xiushan Cai, Lingxin Meng, Wei Zhang, Leipo Liu